CN111969844A - Bootstrap charge pump high-voltage power supply generation circuit - Google Patents
Bootstrap charge pump high-voltage power supply generation circuit Download PDFInfo
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- CN111969844A CN111969844A CN202010888254.7A CN202010888254A CN111969844A CN 111969844 A CN111969844 A CN 111969844A CN 202010888254 A CN202010888254 A CN 202010888254A CN 111969844 A CN111969844 A CN 111969844A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
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Abstract
The invention provides a bootstrap charge pump high-voltage power supply generating circuit, comprising: a clock pulse generator; a capacitor Creg for supplying power to an external circuit; a boost switching power supply for generating a high voltage; a voltage modulator for generating a low voltage; two bootstrap charge pumps with the same structure are respectively connected with the clock pulse generator in a positive way and in a negative way; the bootstrap charge pump includes: a charging switch, a discharging switch, an auxiliary bootstrap circuit and a capacitor Cfly; the auxiliary bootstrap circuit is connected with the discharge switch and the charge switch and is used for controlling the on/off of the discharge switch and the charge switch according to an input clock pulse signal, and the discharge switch and the charge switch are not on/off at the same time; when the charging switch is switched on, the low voltage charges the Cfly through the charging switch; when the discharge switch is turned on, the Cfly is connected in parallel with Creg through the discharge switch and charges the Creg. The present invention only needs one clock phase to drive two bootstrap charge pumps to alternately charge the Creg.
Description
Technical Field
The invention relates to the field of high-voltage switch driving integrated circuits, in particular to a bootstrap charge pump high-voltage power supply generation circuit for supplying power to a high-side power tube driving circuit.
Background
In order to improve efficiency, a switch-type driving circuit such as a switching power supply, a motor drive or a typical half-bridge drive of a class D power amplifier is mainly configured by using high-side N-type power transistors (referred to as high-side power transistors in the present invention) connected in series. As shown in fig. 1, the high-side power transistor in the prior art is driven by a high-side driving circuit, and the high-side driving circuit is powered by a floating power domain composed of a floating power supply and a floating ground (output end). The voltage of the floating supply domain is held by a bootstrap capacitor. When the clock pulse generator outputs a low level, the low voltage charges the bootstrap capacitor through the diode. When the high-side power tube is opened, the output end is lifted, the floating power supply is lifted to be higher than the high voltage of the floating ground (the output end) by a low voltage, and the low voltage is used for supplying power to the high-side driving circuit. However, in the phase with a high output, the circuit in the floating power supply domain consumes power, and the voltage on the bootstrap capacitor decreases. When the driving output with normal pulse width or small pulse width is carried out, the power consumption on the bootstrap capacitor can be supplemented back in the phase with low output, and the system still keeps normal operation; however, in the case of a driving output with a large pulse width, the voltage on the bootstrap capacitor will continuously decrease due to insufficient compensation until the voltage is insufficient to maintain the normal operation of the high-side driving circuit, which causes system error, so that a very large bootstrap capacitor is usually required. In the limit situation, when 100% duty ratio is output, the bootstrap capacitor is only consumed and not supplemented, and the bootstrap capacitor is certainly incapable of normally working, so the system usually limits the maximum duty ratio. In addition, as shown in fig. 1, a bootstrap capacitor is needed for driving a high-side power transistor, and when a system needs to be driven by multiple channels in a system such as a full bridge or a motor formed by half bridges, and audio systems, the bootstrap capacitor needs to be very large.
In view of the above-mentioned shortcomings of the high-side driving power supply method, a power supply method without bootstrap capacitor and charge/discharge is also adopted in the prior art. As shown in fig. 2, the low voltage (from the input power source) is used by the high voltage power generation circuit to generate a very high voltage power domain that is higher than the high voltage that provides power to power the high side driver circuit. Because the power supply mode is uninterrupted, the traditional bootstrap capacitance mode which needs the supplementary phase to limit the maximum duty ratio does not occur. The very high voltage across the clamp circuit (as is known to those skilled in the art with respect to clamp circuits) creates a safe floating power domain that can power the high side driver circuit. The key to this approach is the high voltage power generation circuit. In the prior art, a high-voltage power supply for inputting a high-side power tube is generally generated by a switching power supply boosting mode or a charge pump boosting mode. Typical switching power supply boost circuits are shown in fig. 3a, which is advantageous in efficiency, but requires off-chip inductance and high power transistors and control circuitry (not shown in fig. 3 a), which is an additional significant area overhead and complexity to the overall system. A typical charge pump boost circuit is shown in fig. 3b, in which a low voltage VDD (from the input power) is used as the source, and a high voltage is generated by a cascade voltage doubling circuit, where Φ 1 and Φ 2 are low voltage clock signals with a phase difference of 180 degrees. The relationship between the output voltage Vout of the charge pump and the load current Iout is:
n is the number of stages of the voltage-multiplying circuit of the charge pump, f is the working frequency of the charge pump, and Cfly is the pump capacitor. From the above equation, when the required very high voltage is relatively high, for example, the low voltage (from the input power supply) is 4V, and the high voltage required to be input to the high-side power tube is 30V, it is necessary to generate a very high voltage of 34V or more from 4V, and a voltage multiplying circuit of more than ten stages is generally required. The method needs 2 clock phases, occupies a large area and is complex to implement.
Disclosure of Invention
The invention aims to provide a single-stage bootstrap charge pump high-voltage power supply generation circuit, which generates high voltage VH and low voltage VL according to an external power supply by a boost switching power supply and a voltage modulator, and directly obtains a very high voltage VUH (VH + VL) according to the high voltage VH and the low voltage VL to maintain the normal operation of an external high-side driving circuit. The invention only needs one clock phase and is not influenced by the clock pulse width, the clock pulse signal drives the two bootstrap charge pumps to alternately supply power to the capacitor Creg (used for discharging to a load), the capacitor Creg can be ensured to be maintained at a normal voltage, a high-voltage power supply generating circuit driven by a half bridge is greatly simplified, the area is saved, and the system stability is ensured.
In order to achieve the above object, the present invention provides a bootstrap charge pump high voltage power supply generating circuit, comprising:
a clock pulse generator for generating a clock pulse signal;
the capacitor Creg is used for supplying power to an external high-side driving circuit;
the boost switch power supply is used for generating a set high voltage, and the input end of the boost switch power supply is connected with an external power supply;
the voltage modulator is used for generating set low voltage, and the input end of the voltage modulator is connected with an external power supply;
the two bootstrap charge pumps with the same structure are respectively a first bootstrap charge pump and a second bootstrap charge pump;
the first bootstrap charge pump includes: a charging switch, a discharging switch, an auxiliary bootstrap circuit and a capacitor Cfly;
the auxiliary bootstrap circuit and the charging switch of the first bootstrap charge pump are connected with the clock pulse generator, and the auxiliary bootstrap circuit and the charging switch of the second bootstrap charge pump are connected with the clock pulse generator through an inverter INV 2;
the auxiliary bootstrap circuit is also connected with the discharge switch and the charge switch, and is used for controlling the on/off of the discharge switch and the charge switch according to the input clock pulse signal, and the discharge switch and the charge switch are not on/off at the same time; the first end of the capacitor Creg is connected with the discharge switch and used as a very high voltage reference ground; the second end of the capacitor Creg is connected with the output ends of the discharge switch and the boost switch power supply; both ends of the capacitor Cfly are connected with a discharge switch and a charge switch; the charging switch is also connected with the output end of the voltage modulator, and when the charging switch is switched on, the low voltage charges the capacitor Cfly through the charging switch; when the discharge switch is turned on, the capacitor Cfly is connected in parallel to the capacitor Creg through the discharge switch and charges the capacitor Creg.
When the clock pulse signal input into the bootstrap charge pump is at a high level, a charging switch of the bootstrap charge pump is turned on, and a discharging switch is turned off; when the clock pulse signal input into the bootstrap charge pump is at a low level, the charging switch of the bootstrap charge pump is turned off, and the discharging switch is turned on.
Preferably, the discharge switch is an N-type field effect transistor HMN 3; with the drain of HMN3 being the very high voltage reference ground.
Preferably, the charging switch comprises a diode D1, a capacitor C1, an N-type field effect transistor HMN 1; the anode of D1 and the source of HMN1 are connected with the output end of the voltage modulator; the first terminal of C1, the cathode of D1, the gate of HMN1 are interconnected; the drain of HMN1, the first end of Cfly, and the source of HMN3 are interconnected; the clock signal is input through the second terminal of C1.
Preferably, the auxiliary bootstrap circuit includes: the floating voltage modulator comprises diodes D2 and D3, capacitors C2, Creg _ aux, Cfly _ aux1 and Cfly _ aux2, N-type field effect transistors HMN2, HMN 4-HMN 7, MN1 and MN 2;
the positive electrode of D2, the positive electrode of D3, the source of HMN5 and the source of HMN6 are connected with the output end of the voltage modulator; the gate of HMN5, the gate of HMN6, the cathode of D2 are interconnected; the negative electrode of the D2 is connected with the grid electrode of the HNM7 through the C2; the source of HMN7 is grounded, and the drain of HMN6 is connected with the drain of HMN7 through Creg _ aux; the cathode of D3 is connected with the gate of HMN3, and the cathode of D3 is connected with the source of MN1 through Cfly _ aux 2; the source of the MN1 is connected with the drain of the HMN 7; the drain of the HMN5 is connected with the drain of the MN 1; the drain of MN1 is connected with the drain of HMN2 and the source of HMN4 through Cfly _ aux 1; the drain electrode of the HMN4 is connected with the output end of the boost switch power supply; the gate of the HMN4 is connected with the source of the MN 2; the gate of MN2 is connected with the drain of HMN1 and the source of HMN 3;
clock pulse signals are input through the gates of the HMNs 2 and 7; the drain of HMN2 is connected to the second end of Cfly, and the source of HMN2 is grounded;
the floating voltage modulator is connected with the drain of the HMN6, the gate of a node G, MN1 between the drain of the Creg _ aux and the drain of the MN2 and is used for controlling the on-off of the HMN3 and the HMN 4.
Preferably, the floating voltage modulator comprises PFETs MP1, MP2, HMP1, NFET HMN8, HMN9 and an inverter INV 1; the gate of MP1, the gate of MP2, the drain of MP2 and the source of HMP1 are connected with each other; the drain of MP1, the gate of HMP1, the drain of HMN8, the gate of MN1 and the drain of MN2 are connected with each other; the drain electrode of the HMP1 is connected with the drain electrode of the HMP 9; the source of HMN8 and the source of HMN9 are grounded; inputting a clock pulse signal through a gate of the HMN 8; the clock signal is input to the gate of the HMN9 through INV 1.
Preferably, HMN3, HMN4 are high pressure tubes.
Compared with the prior art, the invention has the beneficial effects that:
1) the bootstrap charge pump high-voltage power supply generation circuit is of a single-stage structure, so that the occupied area of the circuit is greatly saved, the complexity of the circuit is reduced, and the cost is saved;
2) the phase inverter is used for simultaneously generating a charging phase and a discharging phase by a single clock pulse signal, and respectively driving the two bootstrap charge pumps to alternately supply power to the capacitor Creg, so that the very high voltage output by the high-voltage power supply generation circuit can be stabilized, and the stable discharging to a load is realized;
3) the invention only needs one clock phase and is not influenced by the clock pulse width, thereby effectively ensuring the stability of the system.
Drawings
In order to more clearly illustrate the technical solution of the present invention, the drawings used in the description will be briefly introduced, and it is obvious that the drawings in the following description are an embodiment of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts according to the drawings:
FIG. 1 is a schematic diagram of a typical half-bridge driven charge pump of the prior art;
FIG. 2 is a schematic diagram of a charge pump employing a high voltage power supply circuit in the prior art;
FIG. 3a is a schematic diagram of a high voltage power supply generating circuit using a switching power supply boosting method in the prior art;
FIG. 3b is a schematic diagram of a high voltage power supply generating circuit using a charge pump boosting method in the prior art;
FIG. 4 is a schematic diagram of a bootstrap charge pump high voltage power supply generation circuit of the present invention;
FIG. 5 is a schematic diagram of the present invention for providing clock pulses to first and second bootstrap charge pumps;
FIG. 6 is a circuit diagram of a first bootstrap charge pump in accordance with the present invention;
FIG. 7 is an equivalent circuit diagram of the first bootstrap charge pump in the charging phase according to the embodiment of the present invention;
FIG. 8 is an equivalent circuit diagram of the first bootstrap charge pump in the discharging phase according to the embodiment of the present invention.
In the figure: 1. a boost switching power supply; 2. a voltage modulator; 3. a charging switch; 4. a discharge switch; 5. an auxiliary bootstrap circuit; 61. a first bootstrap charge pump; 62. a second bootstrap charge pump.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The present invention provides a bootstrap charge pump high voltage power supply generation circuit, as shown in fig. 4, comprising: a clock pulse generator (not shown), a capacitor Creg (as a very high-domain voltage-stabilizing capacitor), a boost switch power supply, a voltage modulator, and two bootstrap charge pumps with the same structure.
The clock pulse generator is used for generating a clock pulse signal;
the capacitor Creg is used for supplying power to an external high-side driving circuit so as to discharge to a load;
the input end of the boost switch power supply and the input end of the voltage modulator are both connected with an external power supply and are respectively used for generating set high voltage and low voltage;
the two bootstrap charge pumps are respectively a first bootstrap charge pump and a second bootstrap charge pump. As shown in fig. 4, the bootstrap charge pump includes: a charging switch, a discharging switch, an auxiliary bootstrap circuit and a capacitor Cfly. The auxiliary bootstrap circuit and the charging switch of the first bootstrap charge pump are connected with the clock pulse generator, and the auxiliary bootstrap circuit and the charging switch of the second bootstrap charge pump are connected with the clock pulse generator through an inverter INV2 (for generating a clock pulse signal opposite to the clock pulse signal). Therefore, the clock pulse signal and the opposite clock pulse signal respectively drive the first bootstrap charge pump and the second bootstrap charge pump, and the first bootstrap charge pump and the second bootstrap charge pump alternately charge the capacitor Creg.
The auxiliary bootstrap circuit is further connected with the discharging switch and the charging switch, and is used for controlling the on/off of the discharging switch and the charging switch according to the input clock pulse signal. When the clock pulse signal input into the bootstrap charge pump is at a high level, a charging switch of the bootstrap charge pump is turned on, and a discharging switch is turned off; when the clock pulse signal input into the bootstrap charge pump is at a low level, the charging switch of the bootstrap charge pump is turned off, and the discharging switch is turned on.
The first end of the capacitor Creg is connected with the discharge switch and used as a very high voltage reference ground; the second end of the capacitor Creg is connected with the output ends of the discharge switch and the boost switch power supply; both ends of the capacitor Cfly are connected with a discharge switch and a charge switch; the charging switch is also connected with the output end of the voltage modulator, when the charging switch is switched on, the low voltage charges the capacitor Cfly through the charging switch and supplements the capacitor in the auxiliary bootstrap circuit; when the discharge switch is turned on, the capacitor Cfly is connected in parallel to the capacitor Creg through the discharge switch and charges the capacitor Creg.
When the clock pulse signal input to the first bootstrap charge pump is at a high level, the clock pulse signal input to the second bootstrap charge pump is at a low level. At this time, the first bootstrap charge pump is in the complementary charge phase, the charging switch thereof is turned on, the capacitor Cfly of the first bootstrap charge pump is charged, and the capacitor in the auxiliary bootstrap circuit of the first bootstrap charge pump is complemented. The discharge switch of the first bootstrap charge pump is now off, and Cfly of the first bootstrap charge pump is disconnected from the capacitor Creg. The Cfly of the second bootstrap charge pump is connected in parallel with Creg to charge Creg.
When the clock pulse signal input to the first bootstrap charge pump is at a low level, the clock pulse signal input to the second bootstrap charge pump is at a high level. At this time, the charge switch of the first bootstrap charge pump is turned off, the discharge switch is turned on by a signal established by the auxiliary bootstrap circuit, the capacitor Cfly of the first bootstrap charge pump is raised above the high voltage, and the Cfly of the first bootstrap charge pump is connected in parallel with Creg to supplement charges to Creg. At this time, the clock pulse signal of the second bootstrap charge pump is at a high level, and Cfly of the second bootstrap charge pump is charged. Because the working phases of the first bootstrap charge pump and the second bootstrap charge pump are divided into a charging phase and a discharging phase, two bootstrap charge pump units are driven by clock pulse signals with opposite phases, and charges complement Creg in all the clock phases, so that the very high voltage Vreg is stabilized and discharged to a load. This increases the driving capability and reduces ripple at very high voltages.
As shown in fig. 6, the discharge switch is an N-type field effect transistor HMN 3; with the drain of HMN3 being the very high voltage reference ground.
As shown in fig. 6, the charging switch includes a diode D1, a capacitor C1, an N-type fet HMN 1; the anode of D1 and the source of HMN1 are connected with the output end of the voltage modulator; the first terminal of C1, the cathode of D1, and the gate of HMN1 are connected to node C; the drain of HMN1, the first end of Cfly, and the source of HMN3 are connected to node A; the clock signal is input through the second terminal of C1.
As shown in fig. 6, the auxiliary bootstrap circuit includes: the floating voltage modulator comprises diodes D2 and D3, capacitors C2, Creg _ aux, Cfly _ aux1 and Cfly _ aux2, N-type field effect transistors HMN2, HMN 4-HMN 7, MN1 and MN 2;
the positive electrode of D2, the positive electrode of D3, the source of HMN5 and the source of HMN6 are connected with the output end of the voltage modulator; the gate of HMN5, the gate of HMN6, the cathode of D2, and C2 are connected to node D; the negative electrode of the D2 is connected with the grid electrode of the HNM7 through the C2; the source of the HMN7 is grounded, the drain of the HMN6 is connected with the drain of the HMN7 through Creg _ aux, and the connection point of the drain of the HMN6 and the Creg _ aux is a node G; the negative electrode of the D3 is connected with the gate of the HMN 3; the connection point of the cathode of D3 and Cfly _ aux2 is a node F, and the cathode of D3 is connected with the source of MN1 through Cfly _ aux 2; the source of the MN1 is connected with the drain of the HMN 7; the drain of HMN5 and the drain of MN1 are connected to node E; the drain of MN1 is connected with the drain of HMN2 and the source of HMN4 through Cfly _ aux 1; the drain electrode of the HMN4 is connected with the output end of the boost switch power supply; the gate of the HMN4 is connected with the source of the MN 2; the gate of MN2 is connected with the drain of HMN1 and the source of HMN 3;
clock pulse signals are input through the gates of the HMNs 2 and 7; the drain of HMN2, the second end of Cfly, is connected to node B, and the source of HMN2 is grounded;
the floating voltage modulator is used for controlling the on-off of the HMN3 and the HMN4, and as shown in FIG. 6, the floating voltage modulator comprises P-type field effect transistors MP1, MP2, HMP1, N-type field effect transistors HMN8, HMN9 and an inverter INV 1; the gate of MP1, the gate of MP2, the drain of MP2, and the source of HMP1 are connected to node VF; the drain of MP1, the gate of HMP1, the drain of HMN8, the gate of MN1 and the drain of MN2 are connected with each other; the drain electrode of the HMP1 is connected with the drain electrode of the HMP 9; the source of HMN8 and the source of HMN9 are grounded; inputting a clock pulse signal through a gate of the HMN 8; the clock signal is input to the gate of the HMN9 through INV 1.
Example one
As shown in fig. 5, if only one phase clock is operating, the bootstrap charge pump output voltage drops by the following amount at the Φ 1 phase of the clock pulse signal:
the bootstrap charge pump output voltage drops by an amount equal to the Φ 2 phase of the clock pulse signal:
when the two-phase clock is changed to work, the ripples of phi 1 and phi 2 are the same
Where T is the clock period, ILoad(s)Is the load current.
The circuit diagram of the bootstrap charge pump is shown in fig. 6. The diode D1, the capacitor C1 and the N-type field effect transistor HMN1 form a charging switch. The charging switch, the HMN2 and the capacitor Cfly form a charging loop. And the N-type field effect transistor HMN3 is used as a discharge switch. The discharge switch, HMN4 and Cfly constitute a bootstrap discharge loop. The other part is an auxiliary bootstrap circuit, wherein the auxiliary bootstrap circuit comprises an N-type field effect transistor HMN5 and a capacitor Cfly _ aux1 to form a first auxiliary charging circuit, a diode D3 and a capacitor Cfly _ aux2 to form a second auxiliary charging circuit, and the Cfly _ aux1 and the Cfly _ aux2 to form an auxiliary bootstrap path. And the N-type field effect transistor HMN6, the HMN7 and the capacitor Creg _ aux form a third auxiliary charging loop. The diode D2, the capacitor C2, the HMN5 and the HMN6 form an auxiliary bootstrap switch. The PFETs MP1, MP2, HMP1, NFET HMN8, HMN9 and inverter INV1 constitute a floating voltage modulator. The Creg _ aux and a floating voltage modulator in a dashed line frame form an auxiliary floating power supply to supply power to an N-type field effect transistor MN1 for charge isolation and a bootstrap discharge switch HMN4, and the N-type field effect transistor MN2 is used for conducting clamping on the HMN 4.
When the input clock pulse signal is phi 1 phase (high level), the bootstrap charge pump is in the charging phase, HMN1, HMN5 and HMN6 are turned on, and the voltages of the node C and the node D are at the same time
VC/D＝VL-Vdio+VL＝2VL-Vdio
Meanwhile, when Φ 1 is high, HMN2 and HMN7 turn on, pulling node B, H low. Then the incoming low pressure VL will be established on Cfly by HMN1, HMN2, Cfly _ aux1 by HMN5, HMN7 on Creg _ aux by HMN 6. And establishes a voltage at Cfly _ aux2 that is one diode drop below the low voltage VL via D3 and HMN 7. The equivalent circuit of the bootstrap charge pump at this time is shown in fig. 7. At this time
VA＝VL
VE＝VL
VF＝VL-Vdio
VG＝VL
At this time Φ 1 is high, also being given to the HMN8 gate of the floating voltage modulator and to the HMN9 gate through inverter INV 1. HMN9 was off, as were MP2 and MP 1. VF determines to pull down to ground, MN1 turns off, isolating lower node H from charging node E. Since VA is low voltage, MN2 is turned on, and the I node is turned on through MN2 to VF, and the voltage of the I node is
VIB＝VVF-VB＝0
HMN4 is off. Since node F is lower than node A, the gate-source control voltage of HMN4 is
VFA＝VF-VA＝VL-Vdio-VL＝-Vdio
HMN3 is also turned off. As can be seen from the above explanation, the gate-source voltages of HMN3 and HMN4 are maintained in the low voltage domain and are turned off, and the drains are at high voltage, so HMN3 and HMN4 need to be implemented by high voltage transistors.
Example two
When the phase phi 1 is at a low level, the diodes D1 and D2 charge the C1 and C2, the conduction voltage drop of the diodes is Vdio, and the voltage of the power-saving C and D is
VC/D＝VL-Vdio
HMN1, HMN5, HMN6 have low source, gate-source voltage-Vdio (voltage drop caused by diodes D1, D2, D3), drain voltage higher than gate, and the three switches are off. The voltage of the C and D points is reduced by a low voltage VdioHMN1, HMN5, HMN6 are off, HMN2 and HMN7 are off, node B, H is floating, and nodes a, E, F, G remain at a certain voltage relative to nodes B, H because the amount of charge stored by the capacitors is unchanged. If Φ 1 is low, HMN8 of the floating voltage modulator is also low, HMN9 is high, and node VF is charged by Creg _ aux through conduction of MP1, because VF nodes are parasitic capacitors of fets (the capacitance of node VF is charged by Creg _ aux, and the capacitance seen by VF node is parasitic field effect capacitance). The rising of VF is for MN1, the gate of MN1 is high, node E remains high relative to node H, MN1 is on, H is pulled high by E, which is equivalent to MN1 shorting E and H into a non-isolated state, so Cfly _ aux1 and Cfly _ aux2 change from a parallel charging mode when clock Φ 1 is high to a series hold charge mode. At this time
VGB＝VE+VG＝2VL
VFB＝VE+VF＝2VL-Vdio
Since the charge held by Cfly is unchanged, so
VAB＝VL
The gate-source control voltage drop of HMN3 is
VFA＝VFB-VAB＝2VL-Vdio-VL＝VL-Vdio
HMN3 is on. VF being pulled up, node I builds up a high voltage relative to node B through MN2 which was originally conducting, causing HMN4 to turn on, since the gate voltage of MN2 is the voltage of node A, the I node voltage is clamped at
VIB＝VL-VThreshold _ MN2
Wherein VThreshold _ MN2Is the threshold voltage of MN 2. Voltage VIBIt can be ensured that HMN4 conducts well but still stays in a safe region for the gate-source control voltage of HMN 4. After HMN4 is turned on, the floating node B is shorted to the high voltage VL, so the Cfly, Cfly _ aux1, Cfly _ aux2, Creg _ aux are lifted up to the high voltage as a whole. Cfly _ aux1, Cfly _ aux2, and Creg _ aux maintain the discharge switch HMN3, HMN4 on, and Cfly charges up to the very high voltage, maintaining the voltage of the very high voltage Vreg. The equivalent circuit is shown in FIG. 8, and the output very high voltage is equal to VA，
VA＝VH+VL
When the clock pulse signal changes from low level to high level again, the HMN2, HMN7, HMN8 are turned on, the nodes B, H, and VF decrease from high voltage, the node B is grounded, the MN1 is disconnected, Cfly _ aux1 and Cfly _ aux2 are restored to be in parallel, and the whole bootstrap charge pump enters the second charging phase, and the process is circulated.
Referring to fig. 4 and 5, in the clock phase Φ 1 (high level) shown in fig. 5, Cfly of the first bootstrap charge pump supplements charge, and Cfly of the second bootstrap charge pump discharges to Creg; in the clock phase Φ 2 (low) shown in fig. 5, Cfly of the second bootstrap charge pump supplements the charge, and Cfly of the first bootstrap charge pump discharges to Creg. This results in the required stable high voltage supply over the entire time domain.
As can be seen from the above description, the bootstrap charge pump high-voltage power supply generation circuit of the present invention only utilizes the voltage generated by the single-phase clock to raise itself, so as to achieve the purpose of generating high voltage. Compared with the traditional inductance type boosting switch power supply circuit, the invention has the advantages of simplicity and area saving. Compared with the traditional cascade charge pump, the efficiency of the charge pump is high, each stage of the traditional cascade charge pump needs Cfly, and each stage generates an equivalent conduction voltage drop. The bootstrap charge pump only has one stage of conduction voltage drop and also only has one Cfly, and the rest auxiliary capacitors (such as C1, C2, Creg _ aux and Creg _ aux2) only drive the grid electrode of the field effect tube, so the capacitance value can be ignored compared with the Cfly. The invention has simple integral structure and strong robustness.
While the invention has been described with reference to specific embodiments, the invention is not limited thereto, and various equivalent modifications and substitutions can be easily made by those skilled in the art within the technical scope of the invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (7)
1. A bootstrap charge pump high voltage power supply generation circuit, comprising:
a clock pulse generator for generating a clock pulse signal;
the capacitor Creg is used for supplying power to an external high-side driving circuit;
the boost switch power supply is used for generating a set high voltage, and the input end of the boost switch power supply is connected with an external power supply;
the voltage modulator is used for generating set low voltage, and the input end of the voltage modulator is connected with an external power supply;
the two bootstrap charge pumps with the same structure are respectively a first bootstrap charge pump and a second bootstrap charge pump;
the first bootstrap charge pump includes: a charging switch, a discharging switch, an auxiliary bootstrap circuit and a capacitor Cfly;
the auxiliary bootstrap circuit and the charging switch of the first bootstrap charge pump are connected with the clock pulse generator, and the auxiliary bootstrap circuit and the charging switch of the second bootstrap charge pump are connected with the clock pulse generator through an inverter INV 2;
the auxiliary bootstrap circuit is also connected with the discharge switch and the charge switch, and is used for controlling the on/off of the discharge switch and the charge switch according to the input clock pulse signal, and the discharge switch and the charge switch are not on/off at the same time; the first end of the capacitor Creg is connected with the discharge switch and used as a very high voltage reference ground; the second end of the capacitor Creg is connected with the output ends of the discharge switch and the boost switch power supply; both ends of the capacitor Cfly are connected with a discharge switch and a charge switch; the charging switch is also connected with the output end of the voltage modulator, and when the charging switch is switched on, the low voltage charges the capacitor Cfly through the charging switch; when the discharge switch is turned on, the capacitor Cfly is connected in parallel to the capacitor Creg through the discharge switch and charges the capacitor Creg.
2. The bootstrap charge pump high-voltage power supply generation circuit of claim 1, wherein when the clock pulse signal inputted to the bootstrap charge pump is at a high level, the charge switch of the bootstrap charge pump is turned on, and the discharge switch is turned off; when the clock pulse signal input into the bootstrap charge pump is at a low level, the charging switch of the bootstrap charge pump is turned off, and the discharging switch is turned on.
3. The bootstrapped charge pump high voltage power supply generating circuit of claim 2, wherein said discharge switch is a N-type field effect transistor HMN 3; with the drain of HMN3 being the very high voltage reference ground.
4. The bootstrapped charge pump high voltage power supply generating circuit of claim 3, wherein said charge switch comprises a diode D1, a capacitor C1, an NFET HMN 1; the anode of D1 and the source of HMN1 are connected with the output end of the voltage modulator; the first terminal of C1, the cathode of D1, the gate of HMN1 are interconnected; the drain of HMN1, the first end of Cfly, and the source of HMN3 are interconnected; the clock signal is input through the second terminal of C1.
5. The bootstrapped charge pump high voltage power supply generating circuit of claim 4, wherein the auxiliary bootstrap circuit comprises: the floating voltage modulator comprises diodes D2 and D3, capacitors C2, Creg _ aux, Cfly _ aux1 and Cfly _ aux2, N-type field effect transistors HMN2, HMN 4-HMN 7, MN1 and MN 2;
the positive electrode of D2, the positive electrode of D3, the source of HMN5 and the source of HMN6 are connected with the output end of the voltage modulator; the gate of HMN5, the gate of HMN6, the cathode of D2 are interconnected; the negative electrode of the D2 is connected with the grid electrode of the HNM7 through the C2; the source of HMN7 is grounded, and the drain of HMN6 is connected with the drain of HMN7 through Creg _ aux; the cathode of D3 is connected with the gate of HMN3, and the cathode of D3 is connected with the source of MN1 through Cfly _ aux 2; the source of the MN1 is connected with the drain of the HMN 7; the drain of the HMN5 is connected with the drain of the MN 1; the drain of MN1 is connected with the drain of HMN2 and the source of HMN4 through Cfly _ aux 1; the drain electrode of the HMN4 is connected with the output end of the boost switch power supply; the gate of the HMN4 is connected with the source of the MN 2; the gate of MN2 is connected with the drain of HMN1 and the source of HMN 3;
clock pulse signals are input through the gates of the HMNs 2 and 7; the drain of HMN2 is connected to the second end of Cfly, and the source of HMN2 is grounded;
the floating voltage modulator is connected with the drain of the HMN6, the gate of a node G, MN1 between the drain of the Creg _ aux and the drain of the MN2 and is used for controlling the on-off of the HMN3 and the HMN 4.
6. The bootstrapped charge pump high voltage power supply generating circuit of claim 5, wherein the floating voltage modulator comprises PFETs MP1, MP2, HMP1, NFET HMN8, HMN9, and inverter INV 1; the gate of MP1, the gate of MP2, the drain of MP2 and the source of HMP1 are connected with each other; the drain of MP1, the gate of HMP1, the drain of HMN8, the gate of MN1 and the drain of MN2 are connected with each other; the drain electrode of the HMP1 is connected with the drain electrode of the HMP 9; the source of HMN8 and the source of HMN9 are grounded; inputting a clock pulse signal through a gate of the HMN 8; the clock signal is input to the gate of the HMN9 through INV 1.
7. The bootstrapped charge pump high voltage power supply generating circuit of claim 5, wherein the HMN3 and the HMN4 are high voltage pipes.
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| CN112684318A (en) * | 2020-12-17 | 2021-04-20 | 聚辰半导体股份有限公司 | Bootstrap type half-bridge driver common-mode voltage change rate tolerance testing device and method |
| CN114465469A (en) * | 2022-02-25 | 2022-05-10 | 电子科技大学 | Bootstrap charge pump with dead zone control function |
| CN114696614A (en) * | 2020-12-30 | 2022-07-01 | 圣邦微电子（北京）股份有限公司 | Bootstrap switch converter and driving circuit thereof |
| CN115102390A (en) * | 2021-10-08 | 2022-09-23 | 上海南芯半导体科技股份有限公司 | Charge pump supporting ultra-low voltage charging |
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| CN115102390A (en) * | 2021-10-08 | 2022-09-23 | 上海南芯半导体科技股份有限公司 | Charge pump supporting ultra-low voltage charging |
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| CN114465469B (en) * | 2022-02-25 | 2023-05-26 | 电子科技大学 | Bootstrap charge pump with dead zone control function |
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