CN111968578B - Display device - Google Patents

Display device Download PDF

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Publication number
CN111968578B
CN111968578B CN202010899787.5A CN202010899787A CN111968578B CN 111968578 B CN111968578 B CN 111968578B CN 202010899787 A CN202010899787 A CN 202010899787A CN 111968578 B CN111968578 B CN 111968578B
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display
initialization
sub
voltage
initialization voltage
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CN111968578A (en
Inventor
张金刚
解红军
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Hefei Visionox Technology Co Ltd
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Hefei Visionox Technology Co Ltd
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping

Abstract

The embodiment of the invention discloses a display device. The display device includes: the display panel is provided with a display area and a non-display area, the display area is divided into at least two sub-display areas, and each sub-display area comprises at least one row of pixel circuits; an initialization signal line connected to the pixel circuit; the display driving module is connected with the initialization signal line and outputs initialization voltage to the initialization signal line; the display driving module is used for outputting an initialization voltage with a voltage grade to the pixel circuit of each sub-display area in one frame, wherein the voltage grades of the initialization voltages output to different sub-display areas are different. According to the technical scheme of the embodiment of the invention, the display brightness of different sub-display areas is compensated through the initialization voltage, so that the display brightness uniformity of the display device is improved, and the display effect is optimized.

Description

Display device
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a display device.
Background
With the continuous development of display technology, the size of the existing display device is larger and larger, the resolution is higher and higher, and the display brightness requirement and the refresh rate requirement are also improved, which will cause the problem of uneven display brightness of the display device, so that the display uniformity is deteriorated, and the display effect of the display device is affected.
Disclosure of Invention
The embodiment of the invention provides a display device, which is used for improving the uniformity of display brightness of the display device and optimizing the display effect.
An embodiment of the present invention provides a display device, including:
the display panel is provided with a display area and a non-display area, the display area is divided into at least two sub-display areas, and each sub-display area comprises at least one row of pixel circuits;
an initialization signal line connected to the pixel circuit;
the display driving module is connected with the initialization signal line and outputs initialization voltage to the initialization signal line; the display driving module is used for outputting an initialization voltage with a voltage level to the pixel circuit of each sub-display area in one frame, wherein the voltage levels of the initialization voltages output to different sub-display areas are different.
Optionally, the non-display area is provided with a pad connected to the initialization signal line, and the display driving module is configured to output the initialization voltage in a time-division manner from the sub-display area far away from the pad to the sub-display area close to the pad within one frame, and the output initialization voltage sequentially increases or decreases.
Optionally, each of the sub-display regions includes an equal number of rows of the pixel circuits.
Optionally, the display driving module sequentially outputs the initialization voltages with a difference of a set difference from the sub-display region far from the pad to the sub-display region close to the pad.
Optionally, an absolute value of the setting difference is proportional to an average gray scale level of a frame of the display image.
Optionally, the display driving module includes: the device comprises a time schedule controller, a power circuit and an initialization voltage conversion module;
the time sequence controller is connected with the initialization voltage conversion module and is used for outputting frame synchronization signals and line synchronization signals corresponding to display images to the initialization voltage conversion module;
the power circuit is connected with the initialization voltage conversion module, the initialization voltage conversion module is connected with the initialization signal line, and the initialization voltage conversion module is used for converting the voltage provided by the power circuit into initialization voltage according to the frame synchronization signal and the line synchronization signal so as to output initialization voltage of different voltage grades to different sub-display areas.
Optionally, the timing controller is further configured to output an average grayscale level signal corresponding to the display image to the initialization voltage conversion module;
the initialization voltage conversion module is further used for adjusting the setting difference value of the initialization voltage corresponding to the pixel circuit rows of different sub-display areas according to the average gray scale level signal.
Optionally, the initialization voltage conversion module is further configured to control an absolute value of the setting difference to be proportional to an average gray scale level of the display image.
Optionally, the initialization voltage conversion module includes: the device comprises a line counting unit, a voltage conversion unit and a difference value calculation unit;
the line counting unit is connected with the voltage conversion unit and is used for counting according to the line synchronization signal and outputting a counting signal to the voltage conversion unit when the set number of the pixel circuit lines in one sub-display area is full;
the difference value determining unit is connected with the voltage converting unit and is used for outputting set difference values of the initialization voltages corresponding to the pixel circuits of different sub-display areas and adjusting the set difference values according to the average gray scale level signal;
the voltage conversion unit is used for sequentially converting the initialization voltage output to the pixel circuit of each sub-display area according to the frame synchronization signal, the counting signal and the set difference value.
Optionally, the display panel further comprises a light emitting unit, and the pixel circuit is connected to the light emitting unit;
the pixel circuit includes: the device comprises an initialization unit, a data writing unit, a storage capacitor and a driving unit;
the initialization unit is used for initializing the storage capacitor and the driving unit through the initialization voltage in an initialization stage;
the data writing unit is used for writing data voltage into the storage capacitor in a data writing stage;
the storage capacitor is used for storing the data voltage;
the driving unit is used for driving the light-emitting unit to emit light according to the data voltage stored by the storage capacitor.
According to the technical scheme of the embodiment of the invention, the display driving module is set to output the initialization voltage with a voltage grade to the pixel circuit of each sub-display area in one frame, wherein the voltage grades of the initialization voltages output to different sub-display areas are different. Because the initialization voltage and the display brightness have correlation, and the voltage grades of the initialization voltage of different sub-display areas are set to be different, the compensation of the display brightness of different sub-display areas through the initialization voltage is realized, the problem of uneven display brightness at two ends of a screen body caused by the voltage drop of the first power supply voltage ELVDD is solved, the problem of uneven display brightness of the screen body caused by the resistance-capacitance load of a data line is solved, the uniformity of the display brightness of the display device is improved, and the display effect is optimized. Compared with the prior art, the scheme also has the following beneficial effects: according to the scheme, a power supply voltage pin does not need to be additionally designed on the display panel, so that the manufacturing process of the display device is simplified, and the screen occupation ratio of the display device is not influenced; the scheme can set the initialization voltage Vref of different sub-display areas to different values, and can greatly compensate the display brightness difference caused by the more serious voltage drop of the first power voltage ELVDD or the data voltage; the scheme does not need to additionally increase a brightness compensation module in the pixel circuit, and the pixel aperture opening ratio is ensured.
Drawings
Fig. 1 is a schematic structural diagram of a display device according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of another display device provided in an embodiment of the invention;
FIG. 3 is a schematic waveform diagram of an operating signal according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of another exemplary operating signal waveform provided by an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a display driving module according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a pixel circuit according to an embodiment of the invention.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not to be construed as limiting the invention. It should be further noted that, for the convenience of description, only some structures related to the present invention are shown in the drawings, not all of them.
As described in the background art, the conventional display device has a problem of non-uniform display brightness, so that the display uniformity is deteriorated, thereby affecting the display effect of the display device. The inventor researches and finds that the reason for the problems is that: the display device includes a signal trace for providing a power supply voltage to each row of pixel circuits in the panel, such as a first power line for providing a first power supply voltage ELVDD, the first power line vertically extending from a power supply end region (e.g., a lower region of the panel) to a region away from the power supply end (e.g., an upper region of the panel). When the display device is operated, the first power voltage in the lower region of the panel is higher than the first power voltage in the upper region of the panel due to the trace resistance of the first power line, which is commonly referred to as power DROP (IR DROP). The difference of the first power supply voltage in different areas of the screen body causes different driving currents of pixels in each row, so that the display brightness in different areas of the screen body is higher, the display brightness in the upper area of the screen body is lower, and the display brightness of the screen body is uneven from top to bottom.
In addition, the pixel circuit comprises a source line (data line) led out from the driving chip to the screen body, the data line vertically extends from a region (such as a lower region of the screen body) close to the driving chip to a region (such as an upper region of the screen body) far away from the driving chip, so that the resistance-capacitance load (RC loading) on the data line is larger as the data line reaches the upper region of the screen body, the data voltage on the data line in different regions of the screen body is different, the charging degree of a storage capacitor in the pixel circuit is inconsistent, the charging degree of the storage capacitor influences the pixel brightness, the display brightness of the upper region and the lower region of the screen body is different, and the display brightness of the screen body is uneven. The characteristics of large size, high resolution and high refresh rate of the conventional display device also aggravate the phenomenon of uneven display brightness of the display device.
The prior art mainly has the following solutions to the problem of uneven display brightness: (1) a power supply voltage pin is designed on the top of the screen body, a flexible circuit board is bound, and then the flexible circuit board is connected with a power supply end through a patch cord to directly provide power supply voltage for a pixel circuit on the top of the screen body. The scheme has the disadvantages that the width of a non-display area at the top of the screen body is increased, the screen occupation ratio is reduced, and a binding procedure is additionally added; (2) the data voltage is compensated by the driving chip to compensate the IR DROP. However, the brightness compensation of this scheme is small in magnitude. (3) The addition of the compensation module in the pixel circuit performs brightness compensation, however, this increases the number of transistors in the pixel circuit, so that the pixel aperture ratio is reduced.
Based on the foregoing technical problem, an embodiment of the present invention provides a display device. Fig. 1 is a schematic structural diagram of a display device according to an embodiment of the present invention, and as shown in fig. 1, a display device 10 includes a display panel 100, an initialization signal line 10c, and a display driving module 200; the display panel 100 has a display area AA and a non-display area NAA, the display area AA is divided into at least two sub-display areas, and each sub-display area includes at least one row of pixel circuits 20; the initialization signal line 10c is connected to the pixel circuit 20; the display driving module 200 is connected to the initialization signal line 10c, and outputs an initialization voltage Vref to the initialization signal line 10 c; the display driving module 200 is configured to output an initialization voltage Vref having a voltage level to the pixel circuit 20 of each sub-display area within one frame, wherein the voltage levels of the initialization voltages Vref output by the display driving module 200 to different sub-display areas are different.
The Display device in the embodiment of the present invention may be an Active-matrix Organic light-emitting diode (AMOLED) Display device, an Organic light-emitting diode (OLED) Display device, a Liquid Crystal Display (LCD), and the like.
Specifically, referring to fig. 1, the display device 10 may include a plurality of scan lines (GL1 to GLk) extending in a row direction, a plurality of data lines (DL1 to DLj) extending in a column direction and crossing the scan lines, and the crossings of the scan lines and the data lines may define a plurality of pixel regions on the display panel 100, and a plurality of subpixels may be disposed in each pixel region on the display panel 100, and a plurality of subpixel arrays may be arranged in the display panel 100. When a scanning signal in the form of a pulse signal is input into the scanning line, a sub-pixel connected with the scanning line is opened, the opened sub-pixel can receive a data voltage signal transmitted by the data line, and the sub-pixel can perform luminous display with corresponding brightness according to the received data voltage signal.
The scan driving circuit 400 may include a plurality of cascaded shift registers, for example, so as to provide scan signals to the plurality of scan lines row by row and to select the scan lines row by row. The plurality of data lines may be electrically connected to the display driving module 200, and the display driving module 200 may provide a data voltage Vdata to the corresponding data lines, so as to drive the corresponding sub-pixels to perform light emitting display.
The sub-pixel may include a light emitting unit and a pixel circuit 20. The display device 10 further includes a first power line 10a, a second power line 10b, and an initialization signal line 10c, the pixel circuit 20 is connected to the first power line 10a, the second power line 10b, and the initialization signal line 10c, and the display driving module 200 may transmit a first power voltage ELVDD to the pixel circuit 20 through the first power line 10a, transmit a second power voltage ELVSS to the pixel circuit 20 through the second power line 10b, and transmit an initialization voltage Vref to the pixel circuit 20 through the initialization signal line 10 c. The pixel circuit 20 is constituted by a plurality of thin film transistors exemplarily including at least an initialization transistor, a data writing transistor, and a driving transistor, and the pixel circuit 20 is connected to the initialization signal line 10c through the initialization transistor, and the initialization transistor is configured to write an initialization voltage Vref on the initialization signal line 10c to the storage capacitor and the driving transistor in an initialization stage to initialize the gate potentials of the storage capacitor and the driving transistor by the initialization voltage Vref. The data writing transistor is used for writing a data voltage Vdata into the storage capacitor in a data writing stage, the storage capacitor is used for storing the data voltage Vdata, the first power voltage ELVDD on the first power line 10a and the second power voltage ELVSS on the second power line 10b provide power for the driving transistor to generate driving current, so that the driving transistor generates the driving current according to the data voltage Vdata stored in the storage capacitor, and the light-emitting unit is driven to emit light for display.
Referring to fig. 1, the display area AA may be divided into at least two sub-display areas along a row direction parallel to the pixel circuits 20, and fig. 1 schematically illustrates a case where the display area AA is divided into n sub-display areas, including a sub-display area D1 to a sub-display area Dn, for example, the present embodiment will be described. In the working timing when the display driving module 200 drives the display panel 100 to display a frame of picture, the initialization voltage Vref is output to each row of pixel circuits 20 in each sub display region row by row through the initialization signal line 10c from the sub display region D1 to the sub display region Dn, wherein the voltage levels of the initialization voltage Vref output to different sub display regions by the display driving module 200 are different, and the voltage values of the initialization voltage Vref corresponding to different voltage levels are different. The reason for this is that the initialization voltage Vref has a correlation with the display luminance of the light emitting cells in the display panel: in the initialization stage of the operation of the pixel circuit 20, the initialization voltage Vref is written into the storage capacitor to initialize the storage capacitor and the gate potential of the driving transistor, and in the data writing stage of the operation of the pixel circuit 20, the data voltage Vdata is written into the storage capacitor, so that the voltage stored in the storage capacitor is actually the integrated value of the initialization voltage Vref and the data voltage Vdata, and the driving transistor generates the driving current for driving the light emitting cell according to the integrated voltage of the initialization voltage Vref and the data voltage Vdata, so that the display luminance of the light emitting cell has a correlation with the initialization voltage Vref. The initialization voltage Vref is usually a negative value and is a voltage value less than or equal to the second power voltage ELVSS, and when each transistor in the pixel circuit 20 is a P-channel transistor, for the same data voltage, the smaller the initialization voltage Vref is, the larger the driving current generated by the driving transistor is, the higher the display luminance of the light emitting unit is, and the larger the initialization voltage Vref is, the smaller the driving current generated by the driving transistor is, and the lower the display luminance of the light emitting unit is.
The display driving module 200 outputs the initialization voltage Vref of different voltage levels to different sub-display areas within one frame, and for example, the initialization voltage Vref output by the display driving module 200 to the sub-display area close to one side of the display area AA is set to be greater than the initialization voltage Vref output to the sub-display area far from one side of the display driving module 200 in the display area AA, that is, the initialization voltage Vref of the sub-display area at the lower part of the screen is greater than the initialization voltage Vref of the sub-display area at the upper part of the screen. Since the first power line 10a generally extends from the power output terminal of the display driving module 200 to the display area AA along a row direction perpendicular to the pixel circuits 20 to provide the first power voltage ELVDD to each row of the pixel circuits 20, and the IR DROP exists on the first power line 10a, the first power voltage ELVDD of the sub-display area of the display area AA near the display driving module 200 is greater than the initialization voltage Vref of the sub-display area of the display area AA far from the display driving module 200, that is, the first power voltage ELVDD of the sub-display area at the lower portion of the panel is greater than the first power voltage ELVDD of the sub-display area at the upper portion of the panel, which may result in a display luminance of the sub-display area at the upper portion of the panel being lower than the display luminance of the sub-display area at the lower portion of the panel. In consideration of the correlation between the initialization voltage Vref and the display brightness, the present embodiment sets the initialization voltage Vref of the sub-display area at the upper portion of the panel, which is smaller than the initialization voltage Vref of the sub-display area at the lower portion of the panel, the accumulated values of the initialization voltage Vref and the data voltage Vdata in the pixel circuit 20 of the sub-display region at the upper portion of the panel body can be influenced, thereby influencing the driving current generated by the driving transistor, having the function of improving the driving current to improve the display brightness of the sub-display area on the upper part of the screen body, to compensate for the influence of the voltage drop of the first power voltage ELVDD on the display brightness of the sub-display region in the upper portion of the panel, therefore, the effect of improving the display brightness difference of the upper part and the lower part of the screen body is achieved, the problem of uneven display brightness of the screen body caused by the voltage drop of the first power supply voltage ELVDD is solved, the uniformity of the display brightness is improved, and the display effect of the display device is optimized.
For example, the display driving module 200 is configured to output the initialization voltage Vref to the sub-display area close to the display driving module 200 in the display area AA within one frame, which is smaller than the initialization voltage Vref output to the sub-display area far from the display driving module 200 in the display area AA, that is, the initialization voltage Vref of the sub-display area at the lower portion of the panel is smaller than the initialization voltage Vref of the sub-display area at the upper portion of the panel. As shown in fig. 1, since the data lines (DL1-DLj) generally extend from the data voltage output terminal of the display driving module 200 to the display area AA to provide data voltages to the pixel circuits 20 in each row, and RC loading exists on the data lines, the data voltage of the sub-display area close to one side of the display driving module 200 in the display area AA is greater than the data voltage of the sub-display area far from one side of the display driving module 200 in the display area AA, that is, the data voltage of the sub-display area at the lower portion of the panel is greater than the data voltage of the sub-display area at the upper portion of the panel, so that the charging amount of the storage capacitor of the sub-display area at the upper portion of the panel is less than the charging amount of the storage capacitor of the sub-display area at the lower portion of the panel. When each transistor in the pixel circuit 20 is a P-channel transistor, the data voltage is generally a negative value, and the smaller the data voltage, the smaller the charge amount of the storage capacitor, and the larger the driving current generated by the driving transistor, the higher the display luminance of the light emitting unit. The RC loading on the data line causes the display brightness of the sub-display area at the upper part of the screen body to be higher than that of the sub-display area at the lower part of the screen body. In consideration of the correlation between the initialization voltage Vref and the display brightness, the initialization voltage Vref of the sub-display area on the upper portion of the panel is set in the embodiment, and is larger than the initialization voltage Vref of the sub-display area on the lower portion of the panel, so that the integrated value of the initialization voltage Vref and the data voltage Vdata in the pixel circuit 20 of the sub-display area on the upper portion of the panel can be influenced, and the driving current generated by the driving transistor is influenced.
According to the technical scheme of the embodiment of the invention, the display driving module is set to output the initialization voltage with a voltage grade to the pixel circuit of each sub-display area in one frame, wherein the voltage grades of the initialization voltages output to different sub-display areas are different. Because the initialization voltage and the display brightness have correlation, and the voltage grades of the initialization voltage of different sub-display areas are set to be different, the compensation of the display brightness of different sub-display areas through the initialization voltage is realized, the problem of uneven display brightness at two ends of a screen body caused by the voltage drop of the first power supply voltage ELVDD is solved, the problem of uneven display brightness of the screen body caused by the resistance-capacitance load of a data line is solved, the uniformity of the display brightness of the display device is improved, and the display effect is optimized. Compared with the prior art, this scheme still has following beneficial effect: according to the scheme, a power supply voltage pin does not need to be additionally designed on the display panel, so that the manufacturing process of the display device is simplified, and the screen occupation ratio of the display device cannot be influenced; the scheme can set the initialization voltage Vref of different sub-display areas to different values, and can greatly compensate the display brightness difference caused by the more serious voltage drop of the first power voltage ELVDD or the data voltage; according to the scheme, a brightness compensation module is not required to be additionally added in the pixel circuit, and the pixel aperture opening ratio is ensured.
Continuing to refer to fig. 1, exemplarily, the non-display area NAA is provided with a pad 300 to which the initialization signal line 10c is connected, and the display driving module 200 is configured to time-divisionally output the initialization voltage Vref to the sub-display area from the sub-display area far from the pad 300 to the sub-display area near the pad 300 and sequentially increase or decrease the output initialization voltage Vref in one frame. Specifically, the initialization signal line 10c may be bound to the initialization voltage output terminal of the display driving module 200 through the pad 300. The bonding pad 300 is disposed in a region near the lower portion of the panel, and is far away from the sub-display region of the bonding pad 300, i.e., the sub-display region near the upper portion of the panel. The display driving module 200 sequentially increases or decreases the initialization voltage Vref outputted by the sub-display regions from the upper portion of the panel to the lower portion of the panel in a time-division manner within one frame. For example, the voltage value of the initialization voltage corresponding to the sub display region D1 is Vr1, the voltage value of the initialization voltage corresponding to the sub display region D2 is Vr2, and so on, the voltage value of the initialization voltage corresponding to the sub display region Dn is Vr n, then Vr1 > Vr 2. > Vr n, or Vr1 < Vr 2. < Vr n. The advantages of this embodiment are that:
on one hand, since the IR DROP exists on the first power line 10a, the first power voltage ELVDD supplied from the first power line 10a to the pixel circuits 20 of the sub-display area from the lower portion of the panel to the upper portion of the panel is sequentially decreased. For example, the voltage value of the first power voltage corresponding to the sub-display region D1 is E1, the voltage value of the first power voltage corresponding to the sub-display region D2 is E2, and so on, if the voltage value of the first power voltage corresponding to the sub-display region Dn is En, then E1 < E2 <. > En, which results in the display luminance from the sub-display region Dn to the sub-display region D1 becoming lower and lower. In the present embodiment, when Vr1 < Vr2 <. so < Vr n is set, since there is a correlation between the initialization voltage Vref and the display luminance, the smaller the initialization voltage Vref is, the higher the display luminance of the light emitting unit is, and the larger the initialization voltage Vref is, the lower the display luminance of the light emitting unit is, for the same data voltage. The initialization voltage Vref from the sub-display region Dn to the sub-display region D1 is sequentially reduced, so that the initialization voltage Vref sequentially increases the compensation value of the display brightness from the sub-display region Dn to the sub-display region D1, the influence of the voltage drop of the first power supply voltage ELVDD on the display brightness of each sub-display region is greatly compensated, and the uniformity of the display brightness of the whole display region is improved.
On the other hand, due to the RC loading on the data line, the data voltage Vdata supplied by the data line to the pixel circuits 20 in the sub-display region from the lower portion of the panel to the upper portion of the panel is sequentially reduced. For example, in a case where the display driving module supplies the same data voltage Vdata to the pixel circuits 20 of the sub-display regions, due to RC loading on the data line, the voltage value of the data voltage corresponding to the sub-display region D1 is Vd1, the voltage value of the data voltage corresponding to the sub-display region D2 is Vd2, and so on, and the voltage value of the data voltage corresponding to the sub-display region Dn is Vdn, Vd1 < Vd2 < > Vd2 > Vdn, which causes the display luminance from the sub-display region D1 to the sub-display region Dn to be lower and lower. In the present embodiment, when Vr1 > Vr2 > Vr n is set, since there is a correlation between the initialization voltage Vref and the display luminance, for the same data voltage, the smaller the initialization voltage Vref, the higher the display luminance of the light emitting unit, and the larger the initialization voltage Vref, the lower the display luminance of the light emitting unit. The initialization voltage Vref from the sub display region Dn to the sub display region D1 is sequentially increased, so that the display brightness compensation values of the sub display region Dn to the sub display region D1 are sequentially reduced by the initialization voltage Vref, the influence of the voltage drop of the data voltage Vdata on the display brightness of each sub display region is greatly compensated, and the uniformity of the display brightness of the whole display region is favorably improved.
Referring to fig. 1, in the present embodiment, the number of rows of the pixel circuits 20 included in each sub-display section is set to be equal. Illustratively, each of the sub display regions D1 through Dn includes an equal number of rows of pixel circuits 20. Specifically, if the resolution of the display panel 100 is X × Y, where X may be the number of sub-pixels or pixel circuits 20 in the row direction of the display panel 100, and Y may be the number of sub-pixels or pixel circuits 20 in the column direction of the display panel 100. Each sub-display area comprises at least one row of pixel circuits 20, i.e. Y ≧ n, and the display area AA may be divided into 2-Y sub-display areas. The number of rows of the pixel circuits 20 included in each sub-display area is set to be equal, so that the distribution length of the first power line 10a in each sub-display area is equal, the resistance of the signal trace is related to the length of the signal trace, and the resistance of the signal trace affects the voltage drop generated by the signal transmitted by the signal trace, therefore, the voltage drop generated by the first power line 10a in each sub-display area is aR, where a is the current value on the first power line 10a, and R is the resistance of the first power line 10a at the signal trace end of each sub-display area, that is, the first power voltage ELVDD on the first power line 10a sequentially generates the same voltage drop aR from the sub-display area Dn to the sub-display area D1. The advantage of this embodiment is that it is helpful to set different initialization voltages Vref outputted to the sub-display regions D1 to Dn by the display driving module 200 according to the same voltage drop generated by the first power voltage ELVDD in each sub-display region, so that the display brightness can be compensated by using different initialization voltages Vref more specifically according to the fixed voltage drop of the first power voltage ELVDD in each sub-display region, thereby improving the uniformity of the display brightness. Similarly, when the number of rows of the pixel circuits 20 included in each sub-display area is equal, the data voltage on the data line will also generate an equal voltage drop in each sub-display area.
With continued reference to fig. 1, in the present embodiment, the display driving module 200 is configured to output the initialization voltage Vref sequentially with a set difference Δ Vr from the sub-display region far from the pad 300 to the sub-display region near the pad 300. Specifically, the display driving module 200 may be configured to sequentially output the initialization voltage Vref to the sub display regions D1 to Dn by the setting difference Δ Vr. When the number of rows of the pixel circuits 20 included in each sub display region is equal, the first power supply voltage ELVDD on the first power supply line 10a sequentially generates the same voltage drop aR from the sub display region Dn to the sub display region D1, and if the variation trend of the initialization voltage Vref is also sequentially decreased by the setting difference Δ Vr (for example, Δ Vr is a positive value) from the sub display region Dn to the sub display region D1, the variation trend of the first power supply voltage ELVDD and the initialization voltage Vref is close: the smaller the voltage drop aR of the first power voltage ELVDD, the larger the value of the first power voltage ELVDD, the higher the display luminance of the light emitting unit, the smaller the compensation amplitude of the required display luminance, and the larger the initialization voltage Vref can be set, the closer the region of the sub display region D1, the larger the voltage drop aR of the first power voltage ELVDD, the smaller the value of the first power voltage ELVDD, the lower the display luminance of the light emitting unit, the larger the compensation amplitude of the required display luminance, and the smaller the initialization voltage Vref can be set. Therefore, the setting of the display driving module 200 is that the setting difference Δ Vr is sequentially decreased from the sub-display area far away from the pad 300 to the sub-display area near the pad 300 by the output initialization voltage Vref, which is helpful to compensate the display brightness difference caused by the voltage drop trend of the first power voltage ELVDD more specifically, so as to improve the uniformity of the display brightness of the full screen. Similarly, when the number of rows of the pixel circuits 20 included in each sub-display area is equal, the data voltage on the data line will also generate an equal voltage drop in each sub-display area, and the display driving module 200 is set to output the initialization voltage Vref to sequentially increase the set difference value Δ Vr from the sub-display area far away from the pad 300 to the sub-display area near the pad 300, which is helpful to compensate the display brightness difference caused by the data voltage more specifically according to the voltage drop trend of the data voltage, so as to improve the uniformity of the display brightness of the full screen.
Referring to fig. 1, exemplarily, the display driving module 200 is configured to output the initialization voltage Vref sequentially different from the sub display region far from the pad 300 to the sub display region near the pad 300 in proportion to the absolute value of the setting difference Δ Vr to the average gray scale level of one frame of the display image based on the above embodiment. For example, referring to fig. 1, the average gray scale level of the display image represents the average gray scale level corresponding to the display image when a color RGB display image is converted into a gray scale image, and the higher the average gray scale level of the display image is, the higher the display luminance of the light emitting unit in the sub-pixel is, and the larger the current value of the corresponding first power voltage ELVDD is. Conversely, the lower the average gray scale level of the displayed image, the lower the brightness level of the displayed image, and the lower the display brightness of the light emitting unit in the sub-pixel, the smaller the current value on the corresponding first power voltage ELVDD. When the number of rows of the pixel circuits 20 included in each sub-display area is equal, assuming that the average gray scale level of the currently displayed image is Gn, the current value on the corresponding first power line 10a at the gray scale level is a, the resistance of the first power line 10a at the signal line end of each sub-display area is R, and the voltage drop generated by the first power voltage ELVDD at each sub-display area is aR, the voltage drop generated by the first power voltage ELVDD from the sub-display area Dn to the sub-display area D1 is naR; if the average gray scale level of the currently displayed image is Gn + b (b > 0), the current value of the corresponding first power line 10a at the gray scale level is 2a, the resistance of the first power line 10a at the signal line end of each sub-display area is R, and the voltage drop generated by the first power voltage ELVDD in each sub-display area is aR, the voltage drop generated by the first power voltage ELVDD from the sub-display areas Dn to the sub-display area D1 is 2 naR. Therefore, the larger the average gray scale level of the displayed image is, the larger the voltage drop of the first power supply voltage ELVDD is, the larger the difference between the display brightness at the upper part and the lower part of the screen body is, the larger the absolute value of the setting difference value Δ Vr of the initialization voltage Vref set in this embodiment is, the larger the absolute value of the setting difference value Δ Vr is when the average gray scale level of the displayed image is larger, and the smaller the initialization voltage Vref sequentially decreases from the sub-display region Dn to the sub-display region D1 according to the absolute value of the setting difference value Δ Vr, so that the larger the compensation amplitude of the display brightness of each sub-display region by the initialization voltage Vref is, the better the compensation effect of the initialization voltage Vref for the problem of the dark and the bright on the screen body is, and the uniformity of the display brightness of the display device is further improved.
Fig. 2 is a schematic structural diagram of another display device according to an embodiment of the present invention, and as shown in fig. 2, in this embodiment, the setting of the display driving module 200 includes: a timing controller 210, a power circuit 220, and an initialization voltage conversion module 230; the timing controller 210 is connected to the initialization voltage conversion module 230, and the timing controller 210 is configured to output a frame synchronization signal Vsync and a row synchronization signal Hsync corresponding to a display image to the initialization voltage conversion module 230; the power circuit 220 is connected to an initialization voltage conversion module 230, the initialization voltage conversion module 230 is connected to an initialization signal line 10c, and the initialization voltage conversion module 230 is configured to convert the voltage provided by the power circuit 220 into an initialization voltage Vref according to a frame synchronization signal Vsync and a row synchronization signal Hsync, so as to output the initialization voltage Vref of different voltage levels to different sub-display regions.
It should be noted that fig. 1 and fig. 2 only illustrate the case where the display driving module 200 is disposed on the display panel 100, and the first power line 10a, the second power line 10b and the initialization signal line 10c are respectively connected to corresponding signal output terminals on the display driving module 200 through pad connections. In practical applications, the display driving module 200 may be disposed outside the display panel 100, and for example, the display driving module 200 is bound to a flexible circuit board, and is connected to the first power line 10a, the second power line 10b and the initialization signal line 10c through the flexible circuit board, so as to provide corresponding voltage signals to the first power line 10a, the second power line 10b and the initialization signal line 10c through the display driving module 200.
Fig. 3 is a schematic waveform diagram of an operating signal according to an embodiment of the present invention, which may be specifically a schematic waveform diagram of a frame synchronization signal Vsync and a row synchronization signal Hsync output by the timing controller 210 and a schematic waveform diagram of an initialization voltage Vref output by the display driving module 200 in the display device shown in fig. 2. The present embodiment is described with reference to fig. 2 and fig. 3, specifically, when the display device performs display, the timing controller 210 is configured to receive signals for controlling display of a display image, including a frame synchronization signal Vsync for controlling a start timing of scanning a frame of a display screen and a line synchronization signal Hsync for controlling a start timing of scanning each line of the pixel circuits 20 when performing line-by-line scanning. The power supply circuit 220 serves to output the first power supply voltage ELVDD and the second power supply voltage ELVSS to the display panel 100 and output a voltage to the initialization voltage conversion module 230 so that the initialization voltage conversion module 230 converts the voltage into the initialization voltage Vref.
Illustratively, in conjunction with fig. 2 and 3, during an operation phase in which the display driving module 200 drives the display panel 100 to display a frame of picture, the timing controller 210 outputs a frame synchronization signal Vsync and a row synchronization signal Hsync to the initialization voltage conversion module 230, and at a time T0 after a low level signal in the frame synchronization signal Vsync comes, the operation phase T1 to display a frame of picture starts, and the initialization voltage conversion module 230 starts to operate. In the first phase t1 of the scanning sub-display area D1, the voltage value of the initialization voltage Vref output by the display driving module 200 to each pixel circuit 20 in the sub-display area D1 is Vr 1. After the initialization voltage conversion module 230 determines that the pixel circuits 20 in the sub-display area D1 complete scanning according to the row synchronization signal Hsync, in the first phase t2 of scanning the sub-display area D2, the voltage value Vr1 of the initialization voltage Vref is converted, and the converted voltage value Vr2 of the initialization voltage Vref is output to the pixel circuits 20 in the sub-display area D2, where Vr2 is Vr1- Δ Vr, where Δ Vr is a set difference Δ Vr, and Δ Vr is a positive value, for example. After the initialization voltage conversion module 230 determines that the pixel circuits 20 in each row in the sub display area Dn-1 complete scanning according to the row synchronization signal Hsync, the voltage value Vr n-1 of the initialization voltage Vref is converted at the nth stage tn of the scanning sub display area Dn, and the converted voltage value Vr n of the initialization voltage Vref is output to the pixel circuits 20 in each row in the sub display area Dn, wherein Vr n is Vr n-1- Δ Vr. In the working phase T1 of displaying a frame of picture, the display driving module 200 outputs the initialization voltages with the sequential phase difference setting Δ Vr in a time-sharing manner from the sub-display region D1 to the sub-display region Dn, so as to improve the problem of non-uniform display of the display device due to the voltage drop of the first power voltage ELVDD on the first power line 10a, and further improve the uniformity of the display brightness.
Fig. 4 is a schematic diagram of waveforms of another operating signal provided by the embodiment of the present invention, and fig. 4 schematically illustrates another output waveform of the initialization voltage signal, that is, the display driving module 200 outputs the initialization voltage sequentially different by the setting difference Δ Vr in a time-sharing manner from the sub display region D1 to the sub display region Dn, where the setting difference Δ Vr is a negative value. The working principle of the display driving module 200 corresponding to fig. 3 and fig. 4 is the same, and the difference is only that the initialization voltage output by the display driving module 200 is different, and specifically, the working principle can refer to the content in the above embodiments, and is not repeated here. The advantage of this embodiment is that the display driving module 200 is controlled to output the initialization voltage with a larger voltage level first and then output the initialization voltage with a lower voltage level to balance the brightness of the whole screen within one frame, so as to improve the pixel charging difference caused by the voltage drop of the data voltage on the data line of the display device, thereby improving the problem of uneven display brightness of the screen.
Referring to fig. 2, the timing controller 210 is further configured to output an average gray scale Signal Ctrl Signal corresponding to a display image to the initialization voltage conversion module 230; the initialization voltage conversion module 230 is further configured to adjust the setting difference Δ Vr of the initialization voltages Vref corresponding to the pixel circuit rows of different sub-display areas according to the average gray scale Signal Ctrl Signal. Specifically, when the display device displays, the timing controller 210 may further receive a Signal including image information of a display image, for example, an average gray scale Signal Ctrl, where the average gray scale Signal Ctrl includes average gray scale level information of the display image, and the initialization voltage conversion module 230 may further adjust the setting difference Δ Vr of the initialization voltages Vref corresponding to the pixel circuit rows in different sub-display areas according to the average gray scale level information in the average gray scale Signal Ctrl. For example, the initialization voltage conversion module 230 may control the absolute value of the setting difference Δ Vr to be proportional to the average gray scale level of the displayed image. That is, the larger the average gradation level of the displayed image is, the larger the absolute value of the setting difference Δ Vr is, and the smaller the average gradation level of the displayed image is, the smaller the absolute value of the setting difference Δ Vr is. The larger the average gray scale level of the displayed image is, the larger the current value on the first power line 10a is, the larger the voltage drop generated by each sub-display region of the first power voltage ELVDD on the first power line 10a is, and the larger the display luminance difference of the display device screen body is, the larger the absolute value of the setting difference value Δ Vr can be set by the initialization voltage conversion module 230, so as to improve the display luminance compensation amplitude of each sub-display region by the initialization voltage Vref, and further improve the display luminance uniformity of the display device. Conversely, in the same way, the smaller the average gray scale level of the displayed image is, the smaller the display brightness difference of the display device screen body is, and the smaller the absolute value of the setting difference Δ Vr is set by the initialization voltage conversion module 230, so as to reduce the display brightness compensation amplitude of the initialization voltage Vref to each sub-display region.
Fig. 5 is a schematic structural diagram of a display driving module according to an embodiment of the present invention, and as shown in fig. 5, the initialization voltage conversion module 230 is exemplarily configured to include: a line counting unit 231, a voltage converting unit 232, and a difference value determining unit 233; the line counting unit 231 is connected to the voltage converting unit 232, and the line counting unit 231 is configured to count according to the line synchronizing signal Hsync, and output a counting signal to the voltage converting unit 232 when the set number of pixel circuit lines in one sub-display region is full; the difference determining unit is connected to the voltage converting unit 232, and the difference determining unit 233 is configured to output a set difference Δ Vr of the initialization voltages Vref corresponding to the pixel circuits 20 in different sub-display areas, and adjust the set difference Δ Vr according to the average gray scale level Signal Ctrl Signal; the voltage conversion unit 232 is configured to sequentially convert the initialization voltage Vref, which is output to the pixel circuits 20 of each sub display area, according to the frame synchronization signal Vsync, the count signal, and the setting difference Δ Vr.
Specifically, in the working phase when the display driving module 200 drives the display panel 100 to display a frame, the timing controller 210 outputs the frame synchronization Signal Vsync to the initialization voltage conversion module 230, outputs the line synchronization Signal Hsync to the line counting unit 231, and outputs the average gray scale level Signal Ctrl Signal to the difference determination unit 233, in combination with fig. 2 and 5. The initialization voltage conversion module 230 starts to operate according to the enabling of the frame synchronization signal Vsync, the line counting unit 231 counts according to the line synchronization signal Hsync, and determines whether the set number of pixel circuit lines of the corresponding sub-display area is scanned currently according to the counting result, wherein the set number of pixel circuit lines is the number of pixel circuit lines corresponding to the sub-display area. Every time the row counting unit 231 counts the set number of rows of pixel circuits of one sub-display area, it outputs a signal to the voltage converting unit 232, so that the voltage converting unit 232 converts the voltage provided by the power circuit 220 into the initialization voltage Vref corresponding to the next sub-display area. The difference determining unit 233 may adjust the setting difference Δ Vr according to the average gray scale level of the display image in the average gray scale level Signal Ctrl Signal, such that an absolute value of the setting difference Δ Vr is proportional to the average gray scale level of the display image, and determine a compensation amplitude of the initialization voltage Vref for the display luminance according to the average gray scale level of the display image, thereby improving the problem of non-uniform display luminance of the display panel caused by the voltage drop of the first power voltage ELVDD or the voltage drop of the data voltage.
Fig. 6 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention, and as shown in fig. 6, the display panel 100 further includes a light emitting unit 140, and the pixel circuit 20 is connected to the light emitting unit 140; the pixel circuit 20 includes: an initialization unit 110, a data writing unit 120, a storage capacitor C, and a driving unit 130; the initialization unit 110 is configured to initialize the storage capacitor C and the driving unit 130 by an initialization voltage Vref in an initialization stage; the data writing unit 120 is configured to write a data voltage into the storage capacitor C in a data writing phase; the storage capacitor C is used for storing data voltage Vdata; the driving unit 130 is configured to drive the light emitting unit 140 to emit light according to the data voltage stored in the storage capacitor C.
Fig. 6 schematically shows a case where the pixel circuit 20 is a 7T1C pixel circuit, that is, the pixel circuit includes 7 thin film transistors and 1 storage capacitor. Referring to fig. 1 and 6, the initialization unit 110 illustratively includes a first transistor T1, the data writing unit 120 includes a second transistor T2, the driving unit 130 includes a third transistor T3, the light emitting unit 140 includes a light emitting device D1, and the light emitting device D1 may be an organic light emitting diode. Alternatively, the pixel circuit 20 further includes a fourth transistor T4 for threshold voltage compensation, a fifth transistor T5 for light emission control, a sixth transistor T6, and a seventh transistor T7 for initializing the anode potential of the light emitting device D1.
With reference to fig. 1 and 6, the operation of the pixel circuit 20 includes at least an initialization phase, a data writing phase, and a light emitting phase. In the initialization stage, the first transistor T1 is in a conducting state, and the display driving module 200 determines the voltage value of the initialization voltage Vref corresponding to the pixel circuit 20 in the row according to the sub-display area where the pixel circuit 20 is located and the average gray scale level of the current display frame, so as to output the initialization voltage Vref to the initialization signal line 10 c. The initialization voltage Vref on the initialization signal line 10C is written into the second pole of the storage capacitor C and the gate of the third transistor T3 through the first transistor T1, and the potentials of the second pole of the storage capacitor C and the gate of the third transistor T3 are initialized, so as to avoid the influence of the residual charge of the previous frame of display image on the current frame of display image. In the data writing phase, the second transistor T2 is turned on, and the data voltage Vdata on the data line is written into the storage capacitor C through the second transistor T2, and the data voltage Vdata is stored through the storage capacitor C. In the light emitting period, the fifth transistor T5 and the sixth transistor T6 are turned on, the first power voltage ELVDD on the first power line 10a and the second power voltage ELVSS on the second power line 10b supply power for generating a driving current to the third transistor T3, the third transistor T3 generates the driving current according to the integrated value of the initialization voltage Vref and the data voltage Vdata, and the light emitting device D1 is driven to emit light. Therefore, the integrated value of the initialization voltage Vref and the data voltage Vdata determines the display brightness of the light emitting device D1, and the embodiment of the invention outputs different initialization voltages Vref to the pixel circuits 20 in each row of different sub-display regions in a time-sharing manner from the sub-display region D1 to the sub-display region Dn through the display driving module 200, so as to specifically compensate the display brightness of each sub-display region through the initialization voltage Vref, thereby improving the problem of uneven screen display brightness caused by the voltage drop of the first power voltage ELVDD or the voltage drop of the data voltage.
It is to be noted that the foregoing description is only exemplary of the invention and that the principles of the technology may be employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims (9)

1. A display device, comprising:
the display panel is provided with a display area and a non-display area, the display area is divided into at least two sub-display areas, and each sub-display area comprises at least one row of pixel circuits;
an initialization signal line connected to the pixel circuit;
the display driving module is connected with the initialization signal line and outputs initialization voltage to the initialization signal line; the display driving module is used for outputting an initialization voltage with a voltage level to the pixel circuit of each sub-display area in one frame, wherein the voltage levels of the initialization voltages output to different sub-display areas are different;
the non-display area is provided with a bonding pad connected with the initialization signal line, and the display driving module is used for outputting the initialization voltage in a time-sharing manner from the sub-display area far away from the bonding pad to the sub-display area close to the bonding pad in one frame, and the output initialization voltage is sequentially increased or decreased;
the pixel circuit comprises an initialization transistor, a storage capacitor and a driving transistor, the pixel circuit is connected with the initialization signal line through the initialization transistor, and the initialization transistor is used for writing the initialization voltage on the initialization signal line into the storage capacitor and the grid electrode of the driving transistor in an initialization stage so as to initialize the grid electrode potentials of the storage capacitor and the driving transistor through the initialization voltage.
2. The display device according to claim 1, wherein each of the sub-display sections includes the same number of rows of the pixel circuits.
3. The display device according to claim 1, wherein the display driving module sequentially outputs the initialization voltages different by a set difference from the sub-display region far from the bonding pad to the sub-display region near the bonding pad.
4. The display device according to claim 3, wherein an absolute value of the setting difference is proportional to an average gray scale level of a frame of a display image.
5. The display device according to claim 1, wherein the display driving module comprises: the device comprises a time schedule controller, a power supply circuit and an initialization voltage conversion module;
the time sequence controller is connected with the initialization voltage conversion module and is used for outputting frame synchronization signals and line synchronization signals corresponding to display images to the initialization voltage conversion module;
the power circuit is connected with the initialization voltage conversion module, the initialization voltage conversion module is connected with the initialization signal line, and the initialization voltage conversion module is used for converting the voltage provided by the power circuit into initialization voltage according to the frame synchronization signal and the line synchronization signal so as to output initialization voltage of different voltage grades to different sub-display areas.
6. The display device according to claim 5, wherein the timing controller is further configured to output an average gray scale level signal corresponding to the display image to the initialization voltage conversion module;
the initialization voltage conversion module is further used for adjusting the setting difference value of the initialization voltage corresponding to the pixel circuit rows of different sub-display areas according to the average gray scale level signal.
7. The display device according to claim 6, wherein the initialization voltage conversion module is further configured to control an absolute value of the setting difference to be proportional to an average gray scale level of the display image.
8. The display device according to claim 7, wherein the initialization voltage conversion module comprises: the device comprises a line counting unit, a voltage conversion unit and a difference value calculation unit;
the line counting unit is connected with the voltage conversion unit and used for counting according to the line synchronization signal and outputting a counting signal to the voltage conversion unit when the set pixel circuit line number of one sub-display area is full;
the difference value determining unit is connected with the voltage converting unit and is used for outputting set difference values of the initialization voltages corresponding to the pixel circuits of different sub-display areas and adjusting the set difference values according to the average gray scale level signal;
the voltage conversion unit is used for sequentially converting the initialization voltage output to the pixel circuit of each sub-display area according to the frame synchronization signal, the counting signal and the set difference value.
9. The display device according to claim 1, wherein the display panel further comprises a light-emitting unit, and wherein the pixel circuit is connected to the light-emitting unit;
the pixel circuit includes: the device comprises an initialization unit, a data writing unit, a storage capacitor and a driving unit;
the initialization unit is used for initializing the storage capacitor and the driving unit through the initialization voltage in an initialization stage;
the data writing unit is used for writing data voltage into the storage capacitor in a data writing stage;
the storage capacitor is used for storing the data voltage;
the driving unit is used for driving the light-emitting unit to emit light according to the data voltage stored by the storage capacitor.
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