CN111966015A - Signal sampling method, circuit and equipment - Google Patents
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- CN111966015A CN111966015A CN202010821281.2A CN202010821281A CN111966015A CN 111966015 A CN111966015 A CN 111966015A CN 202010821281 A CN202010821281 A CN 202010821281A CN 111966015 A CN111966015 A CN 111966015A
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Abstract
The invention discloses a signal sampling method, a circuit and a device, which pre-configure the signal period T of a sampled signal and the sampling period T of a sampling signalsT + Δ T; when the generation of the sampled signal is triggered according to the signal period, the AD chip is controlled to sample the sampled signal according to the sampling period to obtain a sampling signal xsnX (nT + n Δ t) ═ x (n Δ t); based on sampled signals [ x ] combined in time orders1,xs2,xs3,...,xsn]And obtaining a sampling signal with delta t as a sampling interval. Therefore, the signal sampled at the nth T + nth delta t moment can be equivalently used as the signal sampled at the nth delta t moment based on the periodic variation characteristic of the sampled signal, so that the aim of acquiring the high-frequency signal by using the low-frequency sampling signal is fulfilled by an equivalent sampling method, a high-frequency AD chip is not needed, and the sampling requirement can be met by using a common low-frequency AD chip, so that the signal sampling cost is saved.
Description
Technical Field
The present invention relates to the field of signal sampling, and in particular, to a signal sampling method, circuit and device.
Background
Currently, most signals in a device are sampled, stored, analyzed, and applied, including analog signals that vary periodically. In the prior art, for an Analog signal that changes periodically, a signal sampling method generally uses an AD (Analog-to-digital) chip to sample the Analog signal, and converts the Analog signal into a digital signal for a subsequent circuit to use. However, as the frequency of signals in the device is higher and higher, the sampling frequency requirement of these high-frequency signals is also higher and higher, and the sampling requirement is usually met by selecting an AD chip with a higher sampling frequency, but the AD chip with a higher sampling frequency is expensive, which results in higher signal sampling cost.
Therefore, how to provide a solution to the above technical problem is a problem that needs to be solved by those skilled in the art.
Disclosure of Invention
The invention aims to provide a signal sampling method, a circuit and equipment, based on the periodic variation characteristic of a sampled signal, a signal sampled at the time of nT + n delta t can be equivalently used as a signal sampled at the time of n delta t, so that the aim of acquiring a high-frequency signal by using a low-frequency sampling signal is fulfilled by an equivalent sampling method, and a high-frequency AD chip is not needed in the case, and a common low-frequency AD chip can meet the sampling requirement, thereby saving the signal sampling cost.
In order to solve the above technical problem, the present invention provides a signal sampling method, including:
presetting a signal period T of a sampled signal and a sampling period T of a sampling signals＝T+Δt；
When the generation of the sampled signal is triggered according to the signal period, an AD chip is controlled to sample the sampled signal according to the sampling period, and a sampling signal x is obtainedsnX (nT + n Δ t) ═ x (n Δ t); wherein n +1 is the sampling frequency;
based on sampled signals [ x ] combined in time orders1,xs2,xs3,...,xsn]And obtaining a sampling signal with delta t as a sampling interval.
Preferably, the process of controlling the AD chip to sample the sampled signal according to the sampling period while triggering the generation of the sampled signal according to the signal period includes:
generating a signal trigger pulse according to the signal period, and generating a sampling trigger pulse according to the sampling period;
and sending the signal trigger pulse to a signal sending module, and sending the sampling trigger pulse to an AD chip, so that the signal sending module triggers the generation of the sampled signal in the signal period, and the AD chip samples the sampled signal according to the sampling period.
Preferably, the process of generating a signal trigger pulse according to the signal period and generating a sampling trigger pulse according to the sampling period includes:
configuring a PLL for generating a pulse signal in advance according to the signal period and the sampling period;
and based on a reference clock provided by an external crystal oscillator, generating a path of signal trigger pulse sent to the signal sending module and a path of sampling trigger pulse sent to the AD chip by using the PLL.
Preferably, the signal sampling method further comprises:
the one-time sampling times of the AD chip are set by configuring a register which is used for representing the one-time sampling times in the AD chip.
Preferably, the signal sampling method further comprises:
and storing the sampling signal sampled by the AD chip for subsequent transmission or processing.
In order to solve the above technical problem, the present invention further provides a signal sampling circuit, including:
the signal receiving module is used for receiving the sampled signal;
the AD chip is connected with the output end of the signal receiving module;
a controller respectively connected with the signal transmission module and the AD chip for pre-configuring the signal period T of the sampled signal and the sampling period T of the sampling signalsT + Δ T; controlling the signal sending module to trigger the generation of the sampled signal according to the signal period, and controlling an AD chip to sample the sampled signal according to the sampling period to obtain a sampling signal xsnX (nT + n Δ t) ═ x (n Δ t); based on sampled signals [ x ] combined in time orders1,xs2,xs3,...,xsn]Obtaining at sampling intervals of Δ tSampling a signal; wherein n +1 is the number of samples.
Preferably, the controller includes:
the PLL is respectively connected with the signal sending module and the AD chip, is configured in advance according to the signal period and the sampling period, and is used for generating a path of signal trigger pulse sent to the signal sending module and a path of sampling trigger pulse sent to the AD chip based on a reference clock provided by an external crystal oscillator, so that the signal sending module triggers the generation of a sampled signal in the signal period, and the AD chip samples the sampled signal according to the sampling period;
the AD configuration module is connected with the AD chip and used for setting the one-time sampling times of the AD chip by configuring a register which is used for representing the one-time sampling times in the AD chip;
and the RAM is connected with the AD chip and is used for storing the sampling signal sampled by the AD chip for subsequent transmission or processing.
Preferably, the signal transmission module includes:
a transmitting antenna;
the pre-trigger circuit is respectively connected with the PLL and the transmitting antenna and is used for controlling the transmitting antenna to send electromagnetic waves in the signal period to irradiate a target object after receiving signal trigger pulses generated by the PLL;
correspondingly, the signal receiving module comprises:
the receiving antenna is used for receiving an echo signal returned by the target object;
and the signal amplification circuit is respectively connected with the receiving antenna and the AD chip and is used for amplifying the echo signal and sending the amplified echo signal to the AD chip as the sampled signal.
Preferably, the controller is embodied as an FPGA.
In order to solve the above technical problem, the present invention further provides a device, which includes a signal sending module and any one of the above signal sampling circuits.
The invention provides a signal sampling method, which is characterized in that a signal period T of a sampled signal and a sampling period T of a sampling signal are configured in advancesT + Δ T; when the generation of the sampled signal is triggered according to the signal period, the AD chip is controlled to sample the sampled signal according to the sampling period to obtain a sampling signal xsnX (nT + n Δ t) ═ x (n Δ t); based on sampled signals [ x ] combined in time orders1,xs2,xs3,...,xsn]And obtaining a sampling signal with delta t as a sampling interval. Therefore, the signal sampled at the nth T + nth delta t moment can be equivalently used as the signal sampled at the nth delta t moment based on the periodic variation characteristic of the sampled signal, so that the aim of acquiring the high-frequency signal by using the low-frequency sampling signal is fulfilled by an equivalent sampling method, a high-frequency AD chip is not needed, and the sampling requirement can be met by using a common low-frequency AD chip, so that the signal sampling cost is saved.
The invention also provides a signal sampling circuit and a device, which have the same beneficial effects as the signal sampling method.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed in the prior art and the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
Fig. 1 is a flowchart of a signal sampling method according to an embodiment of the present invention;
fig. 2 is an equivalent sampling schematic diagram provided in an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a signal sampling circuit according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a signal sampling circuit according to an embodiment of the present invention.
Detailed Description
The core of the invention is to provide a signal sampling method, a circuit and equipment, based on the periodic variation characteristic of the sampled signal, the signal sampled at the nth T + nth delta t time can be equivalently used as the signal sampled at the nth delta t time, so that the aim of acquiring a high-frequency signal by using a low-frequency sampling signal is fulfilled by an equivalent sampling method, and in this case, a high-frequency AD chip is not needed, and a common low-frequency AD chip can meet the sampling requirement, thereby saving the signal sampling cost.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, fig. 1 is a flowchart of a signal sampling method according to an embodiment of the present invention.
The signal sampling method comprises the following steps:
step S1: presetting a signal period T of a sampled signal and a sampling period T of a sampling signals＝T+Δt。
Step S2: when the generation of the sampled signal is triggered according to the signal period, the AD chip is controlled to sample the sampled signal according to the sampling period to obtain a sampling signal xsn＝x(nT+nΔt)＝x(nΔt)。
Step S3: based on sampled signals [ x ] combined in time orders1,xs2,xs3,...,xsn]And obtaining a sampling signal with delta t as a sampling interval.
Specifically, the signal sampling principle is as follows: referring to FIG. 2, assume that the sampled signal is x (T), the sampled signal is a periodic signal with a period T, and let the sampling period be TsAt the 1 st sampling, i.e. at T0, the signal x is obtaineds0X (0); the signal x is obtained by sampling at the 2 nd sample, i.e. T + Δ Ts1X (T + Δ T), since the sampled signal is a periodic signalNumber, so xs1X (T + Δ T) ═ x (Δ T); the signal x is sampled at the 3 rd sampling, i.e. T2T +2 Δ Ts2X (2T +2 Δ T) ═ x (2 Δ T), and so on, and the signal x is obtained by sampling at the n +1 th sampling, i.e. at T ═ nT + n Δ TsnX (nT + n Δ t) ═ x (n Δ t). It can be seen that the samples [ x ] are combined in time orders1,xs2,xs3,...,xsn]The composed sampling waveform is the same as the sampling waveform with the sampling interval of delta t, but is broadened in time, and thus the sampling signals [ x ] are combined in time sequences1,xs2,xs3,...,xsn]The method can be equivalent to a sampling signal with delta t as a sampling interval, so that a signal with the same waveform as the original sampled signal can be recovered, and the sampling requirement of a high-frequency signal can be met.
Based on this, the present application configures in advance a signal period T of a sampled signal and a sampling period T of a sampling signalsT + delta T, triggering the generation of the sampled signal according to the signal period T, and simultaneously controlling the AD chip according to the sampling period TsSampling the sampled signal by T + delta T to obtain a sampling signal xsnX (nT + n Δ t) x (n Δ t), and then according to the sampling signals [ x ] combined in time orders1,xs2,xs3,...,xsn]And the sampling signal with delta t as the sampling interval is obtained, so that the aim of acquiring the high-frequency signal by using the low-frequency sampling signal is fulfilled by an equivalent sampling method, the requirement on the sampling frequency is greatly reduced, and the requirements on data storage and data transmission are also reduced.
It should be noted that, the selection of Δ t is important, and Δ t must be small enough to acquire all frequency components of the sampled signal, and as for the specific selection of Δ t, the application is not particularly limited herein and is set according to actual requirements.
The invention provides a signal sampling method, which is characterized in that a signal period T of a sampled signal and a sampling period T of a sampling signal are configured in advancesT + Δ T; when the sampled signal is triggered to be generated according to the signal period, the AD chip is controlled to sample the sampled signal according to the sampling period to obtain a sampling signalNumber xsnX (nT + n Δ t) ═ x (n Δ t); based on sampled signals [ x ] combined in time orders1,xs2,xs3,...,xsn]And obtaining a sampling signal with delta t as a sampling interval. Therefore, the signal sampled at the nth T + nth delta t moment can be equivalently used as the signal sampled at the nth delta t moment based on the periodic variation characteristic of the sampled signal, so that the aim of acquiring the high-frequency signal by using the low-frequency sampling signal is fulfilled by an equivalent sampling method, a high-frequency AD chip is not needed, and the sampling requirement can be met by using a common low-frequency AD chip, so that the signal sampling cost is saved.
On the basis of the above-described embodiment:
as an alternative embodiment, a process of controlling an AD chip to sample a sampled signal according to a sampling period while triggering generation of the sampled signal according to the signal period includes:
generating a signal trigger pulse according to the signal period, and generating a sampling trigger pulse according to the sampling period;
and sending the signal trigger pulse to a signal sending module, and sending the sampling trigger pulse to an AD chip so as to generate a sampled signal under the trigger signal period of the signal sending module and sample the sampled signal according to the sampling period by the AD chip.
Specifically, the signal trigger pulse is generated according to the signal period T and sent to the signal sending module, the signal sending module triggers the generation of the sampled signal in the signal period T based on the signal trigger pulse, and meanwhile, the signal sending module generates the sampled signal according to the sampling period TsGenerating sampling trigger pulse according to T + delta T, and sending the sampling trigger pulse to an AD chip, wherein the AD chip realizes the sampling period T based on the sampling trigger pulsesThe sampled signal is sampled at T + Δ T.
As an alternative embodiment, the process of generating the signal trigger pulse according to the signal period and generating the sampling trigger pulse according to the sampling period includes:
a PLL configured in advance for generating a pulse signal according to a signal period and a sampling period;
based on a reference clock provided by an external crystal oscillator, a PLL is utilized to generate a path of signal trigger pulse sent to a signal sending module and a path of sampling trigger pulse sent to an AD chip.
Specifically, the method can be used for determining the sampling period T according to the signal period T and the sampling period T in advancesA PLL (Phase Locked Loop) for generating a pulse signal is configured such that the PLL generates two pulse signals based on a reference clock supplied from an external crystal oscillator: signal trigger pulse corresponding to signal period T and sampling period TsAnd (3) a sampling trigger pulse corresponding to T + delta T (the frequency difference between the signal trigger pulse and the sampling trigger pulse is 1/delta T), the signal trigger pulse is sent to the signal sending module, and the sampling trigger pulse is sent to the AD chip.
As an alternative embodiment, the signal sampling method further includes:
the one-time sampling times of the AD chip are set by configuring a register which is used for expressing the one-time sampling times in the AD chip.
Further, the corresponding performance of the AD chip can be set by configuring a register in the AD chip, for example, by configuring a register in the AD chip for indicating the number of one-time sampling times, the number of one-time sampling times of the AD chip, that is, the number of next one-time sampling times in a single sampling period, is set.
As an alternative embodiment, the signal sampling method further includes:
and storing the sampling signal sampled by the AD chip for subsequent transmission or processing.
Furthermore, the sampling signal obtained by sampling the AD chip may be stored, for example, temporarily stored in a Random Access Memory (RAM), so as to facilitate subsequent transmission or processing.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a signal sampling circuit according to an embodiment of the present invention.
The signal sampling circuit includes:
a signal receiving module 1, configured to receive a sampled signal;
the AD chip 2 is connected with the output end of the signal receiving module 1;
a controller 3 connected with the signal transmission module and the AD chip 2 respectively for configuring the signal period T of the sampled signal and the sampling period T of the sampling signal in advancesT + Δ T; controlling the signal sending module to trigger the generation of the sampled signal according to the signal period, and controlling the AD chip 2 to sample the sampled signal according to the sampling period to obtain a sampling signal xsnX (nT + n Δ t) ═ x (n Δ t); based on sampled signals [ x ] combined in time orders1,xs2,xs3,...,xsn]Obtaining a sampling signal with delta t as a sampling interval; wherein n +1 is the number of samples.
Specifically, the signal sampling circuit of this application includes signal reception module 1, AD chip 2 and controller 3, and its theory of operation is:
the signal sending module is used for triggering the generation of a sampled signal, the signal receiving module 1 is used for receiving the sampled signal triggered and generated by the signal sending module, sending the received sampled signal to the AD chip 2, and the AD chip 2 samples the sampled signal. The signal period of the sampled signal generated by the signal sending module and the sampling period of the sampled signal sampled by the AD chip 2 are both controlled by the controller 3, and for the specific control principle of the controller 3, reference is made to the above embodiment of the signal sampling method, which is not described herein again.
On the basis of the above-described embodiment:
referring to fig. 4, fig. 4 is a schematic structural diagram of a signal sampling circuit according to an embodiment of the present invention.
As an alternative embodiment, the controller 3 includes:
the PLL31 is respectively connected with the signal sending module and the AD chip 2, and is configured in advance according to a signal period and a sampling period, and is used for generating a path of signal trigger pulse sent to the signal sending module and a path of sampling trigger pulse sent to the AD chip 2 based on a reference clock provided by an external crystal oscillator, so that a sampled signal in the signal sending module trigger signal period is generated, and the AD chip 2 samples the sampled signal according to the sampling period;
the AD configuration module 32 is connected to the AD chip 2 and configured to set the sampling times of the AD chip 2 by configuring a register in the AD chip 2 for indicating the sampling times of one time;
and the RAM33 is connected to the AD chip 2 and is used for storing the sampling signal sampled by the AD chip 2 for subsequent transmission or processing.
Specifically, the controller 3 of the present application includes a PLL31, an AD configuration module 32, and a RAM33, where the AD configuration module 32 and the AD chip 2 may be specifically connected through an SPI (Serial Peripheral Interface) Interface, and for the rest of the description, reference is made to the above embodiment of the signal sampling method, which is not described herein again.
As an alternative embodiment, the signal transmission module includes:
a transmitting antenna;
the pre-trigger circuit is respectively connected with the PLL31 and the transmitting antenna and is used for controlling the transmitting antenna to transmit electromagnetic waves in a signal period to irradiate the target object after receiving a signal trigger pulse generated by the PLL 31;
accordingly, the signal receiving module 1 includes:
the receiving antenna 11 is used for receiving an echo signal returned by the target object;
and the signal amplifying circuit 12 is connected to the receiving antenna 11 and the AD chip 2, and is configured to amplify the echo signal and send the amplified echo signal to the AD chip 2 as a sampled signal.
Specifically, the signal sampling circuit of the present application can be specifically applied to positioning devices, such as radars, and the working principle of the positioning device is as follows: the target object is irradiated by the transmitted electromagnetic wave and the echo signal returned by the target object is received, so that the spatial position information of the target object is measured.
Based on this, the signal sending module includes a transmitting antenna and a pre-trigger circuit, the signal receiving module 1 includes a receiving antenna 11 and a signal amplifying circuit 12, and its working principle is:
the PLL31 generates a signal trigger pulse sent to the pre-trigger circuit and a sampling trigger pulse sent to the AD chip 2 based on a reference clock provided by an external crystal oscillator. After receiving the signal trigger pulse, the pre-trigger circuit controls the transmitting antenna to transmit electromagnetic waves in a signal period to irradiate the target object, and the electromagnetic waves return echo signals after encountering the target object (the signal period of the echo signals is the same as that of the electromagnetic waves, and the transmitting and returning speed of the electromagnetic waves is high). The receiving antenna 11 receives an echo signal returned from the target object, and sends the echo signal to the signal amplifying circuit 12. The signal amplifying circuit 12 amplifies the echo signal, and sends the amplified echo signal as a sampled signal to the AD chip 2, and the AD chip 2 samples the sampled signal according to a sampling period after receiving the sampling trigger pulse.
As an alternative embodiment, the controller 3 is embodied as an FPGA.
Specifically, the controller 3 may be implemented by, but not limited to, an FPGA (Field-Programmable Gate Array), and the application is not particularly limited herein.
The application also provides equipment which comprises a signal sending module and any one of the signal sampling circuits.
For the introduction of the device provided in the present application, reference is made to the above embodiments of the signal sampling circuit, which are not repeated herein.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A method of sampling a signal, comprising:
presetting a signal period T of a sampled signal and a sampling period T of a sampling signals＝T+Δt；
When the generation of the sampled signal is triggered according to the signal period, an AD chip is controlled to sample the sampled signal according to the sampling period, and a sampling signal x is obtainedsnX (nT + n Δ t) ═ x (n Δ t); wherein n +1 is the sampling frequency;
based on sampled signals [ x ] combined in time orders1,xs2,xs3,...,xsn]And obtaining a sampling signal with delta t as a sampling interval.
2. The signal sampling method according to claim 1, wherein controlling an AD chip to sample the sampled signal according to the sampling period while triggering generation of the sampled signal according to the signal period comprises:
generating a signal trigger pulse according to the signal period, and generating a sampling trigger pulse according to the sampling period;
and sending the signal trigger pulse to a signal sending module, and sending the sampling trigger pulse to an AD chip, so that the signal sending module triggers the generation of the sampled signal in the signal period, and the AD chip samples the sampled signal according to the sampling period.
3. The signal sampling method of claim 2, wherein generating a signal trigger pulse according to the signal period and generating a sampling trigger pulse according to the sampling period comprises:
configuring a PLL for generating a pulse signal in advance according to the signal period and the sampling period;
and based on a reference clock provided by an external crystal oscillator, generating a path of signal trigger pulse sent to the signal sending module and a path of sampling trigger pulse sent to the AD chip by using the PLL.
4. The signal sampling method of claim 1, further comprising:
the one-time sampling times of the AD chip are set by configuring a register which is used for representing the one-time sampling times in the AD chip.
5. The signal sampling method of claim 1, further comprising:
and storing the sampling signal sampled by the AD chip for subsequent transmission or processing.
6. A signal sampling circuit, comprising:
the signal receiving module is used for receiving the sampled signal;
the AD chip is connected with the output end of the signal receiving module;
a controller respectively connected with the signal transmission module and the AD chip for pre-configuring the signal period T of the sampled signal and the sampling period T of the sampling signalsT + Δ T; controlling the signal sending module to trigger the generation of the sampled signal according to the signal period, and controlling an AD chip to sample the sampled signal according to the sampling period,obtaining a sampled signal xsnX (nT + n Δ t) ═ x (n Δ t); based on sampled signals [ x ] combined in time orders1,xs2,xs3,...,xsn]Obtaining a sampling signal with delta t as a sampling interval; wherein n +1 is the number of samples.
7. The signal sampling circuit of claim 6, wherein the controller comprises:
the PLL is respectively connected with the signal sending module and the AD chip, is configured in advance according to the signal period and the sampling period, and is used for generating a path of signal trigger pulse sent to the signal sending module and a path of sampling trigger pulse sent to the AD chip based on a reference clock provided by an external crystal oscillator, so that the signal sending module triggers the generation of a sampled signal in the signal period, and the AD chip samples the sampled signal according to the sampling period;
the AD configuration module is connected with the AD chip and used for setting the one-time sampling times of the AD chip by configuring a register which is used for representing the one-time sampling times in the AD chip;
and the RAM is connected with the AD chip and is used for storing the sampling signal sampled by the AD chip for subsequent transmission or processing.
8. The signal sampling circuit of claim 7, wherein the signal transmission module comprises:
a transmitting antenna;
the pre-trigger circuit is respectively connected with the PLL and the transmitting antenna and is used for controlling the transmitting antenna to send electromagnetic waves in the signal period to irradiate a target object after receiving signal trigger pulses generated by the PLL;
correspondingly, the signal receiving module comprises:
the receiving antenna is used for receiving an echo signal returned by the target object;
and the signal amplification circuit is respectively connected with the receiving antenna and the AD chip and is used for amplifying the echo signal and sending the amplified echo signal to the AD chip as the sampled signal.
9. The signal sampling circuit of claim 6, wherein the controller is embodied as an FPGA.
10. An apparatus comprising a signal transmission module and a signal sampling circuit as claimed in any one of claims 6 to 9.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103064057A (en) * | 2012-12-26 | 2013-04-24 | 北京遥测技术研究所 | Method of improving multipoint time-difference positioning accuracy |
| CN107809241A (en) * | 2017-11-07 | 2018-03-16 | 晶晨半导体(上海)股份有限公司 | A kind of frequency dividing adjusting method of PLL |
-
2020
- 2020-08-14 CN CN202010821281.2A patent/CN111966015A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103064057A (en) * | 2012-12-26 | 2013-04-24 | 北京遥测技术研究所 | Method of improving multipoint time-difference positioning accuracy |
| CN107809241A (en) * | 2017-11-07 | 2018-03-16 | 晶晨半导体(上海)股份有限公司 | A kind of frequency dividing adjusting method of PLL |
Non-Patent Citations (2)
| Title |
|---|
| 庄戌堃: "基于探地雷达的道路层厚检测算法研究", 《中国优秀硕士学位论文全文数据库 工程科技II辑》 * |
| 李栋等: "一种基于时间拓展方式的实时采样接收算法", 《中国科学》 * |
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Application publication date: 20201120 |