CN111949583A - Single-wire bidirectional communication system and communication method - Google Patents
Single-wire bidirectional communication system and communication method Download PDFInfo
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- 230000005540 biological transmission Effects 0.000 claims abstract description 37
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- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
Abstract
The application discloses a single-wire two-way communication system and a communication method, wherein the communication method comprises the following steps: in the monitoring mode, when any one of the master controller or the slave controller does not monitor that the other side sends an announcement signal, data is sent, wherein the priority of the master controller is higher than that of the slave controller; when the master controller detects the announcement signal sent by the slave controller, the master controller sends the announcement signal again and sends data to the slave controller; when the slave controller detects the announcement signal sent by the master controller, the slave controller switches to a receiving mode to receive the data sent by the master controller. The communication method can realize bidirectional communication of a single data line, reduces occupation of transmission port resources, and sets master-slave priority, ensures the directionality of data transmission, avoids data collision caused by data transmission of both the master and the slave simultaneously, and improves the reliability of data transmission.
Description
Technical Field
The invention belongs to the technical field of data communication, and particularly relates to a single-wire bidirectional communication system and a communication method.
Background
In the two-way data transmission between two devices on the circuit board, for example, between an MCU and a certain functional module or between two MCUs, the design is difficult because the chip is occupied by a communication port and the IO port resources are not tight, and the circuit board area is increased by selecting the devices with abundant pins, the overall cost is increased, and the integration level of the device is affected. At present, at least two wires are needed to realize bidirectional communication between commonly used components, such as UART or SPI communication interfaces, which occupy more interface resources of the components.
Disclosure of Invention
Objects of the invention
In order to overcome the above disadvantages, the present invention provides a single-wire bidirectional communication system and a communication method based on the communication system, so as to solve the technical problems that the existing components occupy more communication ports during bidirectional transmission, the size of the components is large, the integration is not facilitated, and the reliability of data transmission is low.
(II) technical scheme
In order to achieve the above object, one aspect of the present application provides the following technical solutions:
a communication method based on a single-wire two-way communication system, the communication method based on the single-wire two-way communication system comprising: the communication method comprises the following steps that a main controller with transistors, a secondary controller with transistors and a pull-up resistor are arranged, the transistors are respectively connected with the main controller and the secondary controller through bases, collectors of the two transistors are connected in a two-way communication mode through a data line, emitters of the two transistors are respectively grounded, one end of the pull-up resistor is connected with the data line, the other end of the pull-up resistor is connected with a power supply anode, and the communication method comprises the following steps:
in the monitoring mode, when any one of the master controller or the slave controller does not monitor that the other side sends an announcement signal, data is sent, wherein the priority of the master controller is higher than that of the slave controller;
when the master controller detects the announcement signal sent by the slave controller, the master controller sends the announcement signal again and sends data to the slave controller;
when the slave controller detects the announcement signal sent by the master controller, the slave controller switches to a receiving mode to receive the data sent by the master controller.
The communication method realizes two-way communication through a single data line, reduces the occupation of transmission port resources, reduces the number of transmission ports, reduces the whole volume of components, improves the integration level of the components, and avoids data conflict, the communication method sets master-slave priority, stipulates that a master controller and/or a slave controller need to monitor whether a declaration signal sent by the other party exists on the data line before sending data, when the master controller monitors that the declaration signal sent by the slave controller exists on the data line, the master controller can send the declaration signal again to prompt the slave controller to switch into a receiving mode to receive data, and when the slave controller monitors that the declaration signal sent by the slave controller does not exist on the data line, the master controller sends data to the master controller, thereby ensuring the directionality of data transmission and avoiding data conflict caused by sending data by the master controller and the slave, the reliability of data transmission is improved.
In some embodiments, before entering the monitoring mode, when the master controller and/or the slave controller needs to send data, the master controller and/or the slave controller sends an announcement signal to the outside, and the master and the slave monitor whether the announcement signal sent by the other party exists on the data line, so that whether the other party is going to send data can be known, and a prejudgment can be made in advance to avoid data collision.
In some embodiments, when the announcement signal transmission is completed and in the listening mode, when any one of the master controller and the slave controller does not listen to the announcement signal transmitted by the other side, the master controller transmits the announcement signal again, the slave controller transmits the announcement signal again and enters the listening mode again, wherein the duration of the announcement signal transmitted again by the master controller is longer than the duration of the announcement signal transmitted again by the slave controller, and the master and the slave can avoid that the master and the slave simultaneously transmit the announcement signal and synchronously enter the listening mode by transmitting the announcement signals with different durations again, so that the two sides cannot listen to the announcement signal transmitted by the other side, and the transmitted data is collided.
In some embodiments, when any controller finishes sending data or receiving data, the controller is switched to a monitoring mode, and the master controller and the slave controller are kept in a monitoring state for a long time, so that whether the other side sends a control right announcement signal can be monitored as far as possible, and the timeliness of information transmission is improved.
In some embodiments, in the listening mode, further comprising: when any controller is operated internally, the access refusing signal is sent outwards, and the condition that the master controller and the slave controller are interrupted by data transmitted by the other party when the calculation of the master controller and the slave controller is complex can be avoided by sending the access refusing signal, so that the operation speed of the master controller and the slave controller and the operation accuracy are ensured.
In some embodiments, when an asserted signal is sent, the master or slave controller sends a high level to its own transistor to pull down the data line from a high level to a low level for a predetermined period of time, respectively.
In some embodiments, when the master or slave controller enters the listening mode, the master or slave controller continuously sends a low level to the base of its own transistor, keeping the data line at a high level.
In some embodiments, the master or slave controller continues to send a high to its own transistor when the access signal is denied.
Drawings
FIG. 1 is a schematic of the architecture of the communication system of the present invention;
fig. 2 is a transmission state diagram of a second case of the communication method according to the present invention;
fig. 3 is a transmission state diagram of a third case of the communication method according to the present invention;
fig. 4 is a transmission state diagram of a fourth case of the communication method according to the invention;
fig. 5 is a transmission state diagram of a fifth case of the communication method according to the present invention;
fig. 6 is a transmission state diagram of a sixth case of the communication method according to the present invention;
fig. 7 is a flow chart of a slave controller of a communication method according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the accompanying drawings in conjunction with the following detailed description. It should be understood that the description is intended to be exemplary only, and is not intended to limit the scope of the present invention. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present invention.
Referring to fig. 1, a communication method according to the present invention includes:
a communication method based on a single-wire two-way communication system, the communication method based on the single-wire two-way communication system comprising: the transistor is connected with the master controller and the slave controller through bases, collectors of the two transistors are connected through a data line in a bidirectional communication mode, emitters of the two transistors are grounded respectively, one end of the pull-up resistor is connected with the data line, and the other end of the pull-up resistor is connected with a power supply anode.
The communication method comprises the following steps:
in the monitoring mode, when any one of the master controller or the slave controller does not monitor that the other side sends an announcement signal, data is sent, wherein the priority of the master controller is higher than that of the slave controller;
when the master controller detects the announcement signal sent by the slave controller, the master controller sends the announcement signal again and sends data to the slave controller, and at the moment, the master controller preempts the control right sent by the data line;
when the slave controller detects the announcement signal sent by the master controller, the slave controller switches to a receiving mode to receive the data sent by the master controller, and at the moment, the slave controller preempts the control right sent by the data line.
According to the method and the device, the data conflict caused when both sides send data at the same time is avoided by setting the transmission mode of the master-slave priority, and the reliability of data transmission is improved.
Specifically, when the master controller or the slave controller needs to send data to the outside each time, the master controller or the slave controller needs to send an announcement signal to the outside first, then enters a monitoring mode, monitors whether the other side sends the announcement signal in the monitoring mode, if the announcement signal sent by the other side is not monitored, the other side does not have a data sending requirement, the master controller or the slave controller can send data to the outside, and if the announcement signal sent by the other side is monitored, the master controller or the slave controller carries out data transmission according to the master-slave priority transmission mode.
Specifically, in the aspect of a communication system, when a master controller or a slave controller sends an announcement signal to the outside, the master controller or the slave controller sends a high level to the base of a transistor respectively to turn on the transistor, the level of a data line is pulled low after the transistor is turned on, when the master controller or the slave controller finishes announcement signal sending and needs to enter a monitoring mode, the master controller or the slave controller sends a low level to the base respectively to turn off the transistor, the data line is kept at the high level under the input of a power supply anode after the transistor is turned off, and a master side and a slave side can know whether the other side sends the announcement signal or not by detecting the level change on the data line, specifically, the holding time of the announcement signal is set to be 3 Tbit. The detection time length of the master and the slave is determined according to the set duration bit length of the announcement signal and is at least 1 bit.
Specifically, there may be a case where both the master and the slave simultaneously transmit the announcement signal and both enter the listening mode, in this case, although neither the master controller nor the slave controller listens to the announcement signal transmitted by the other side, it is mistaken that there is no data transmission demand for the other side, and in this case, if both sides simultaneously transmit data, data collision may be caused.
In order to avoid the situation, when the master controller and the slave controller send the announcement signal for the first time and monitor that the other side does not send the announcement signal, the master controller sends the announcement signal again, the slave controller sends the announcement signal again and enters the monitoring mode again, and the duration of the announcement signal sent again by the master controller is longer than the duration of the announcement signal sent again by the slave controller. Therefore, even if the master controller and the slave controller simultaneously send the affidavit signal for the first time, the slave controller can enter a monitoring mode after sending the affidavit signal for the second time due to the fact that the duration time ratio of the affidavit signal sent by the master and the slave is different, the slave controller can be guaranteed to be capable of detecting the affidant signal sent by the master controller for the second time, transmission conflict caused by simultaneous sending of data is avoided, specifically, the duration time of the affidant signal sent by the master controller for the first time is 3Tbit, the duration time of the affidant signal sent by the slave controller for the second time is 6Tbit, and the duration time of the affidant signal sent by the slave controller for the first time and the second time.
It should be noted that: the time length of the announcement signal can be set according to the actual communication situation.
Specifically, after the master controller or the slave controller finishes sending data or receiving data, the master controller or the slave controller switches to the monitoring mode, and performs preemption of the data line control right of the next round again.
Preferably, in the monitoring mode, when the master controller and/or the slave controller perform high-speed operation internally, the master controller and/or the slave controller can also send an access denial signal outwards, and when the other side detects the access denial signal sent by the other side, data cannot be sent to the other side, so that data transmission interruption of the other side can be avoided, and the operation speed and the operation accuracy of the master controller and the slave controller are ensured. Specifically, when the access denial signal needs to be sent, the master controller or the slave controller continuously drives the data line to be at a low level.
Referring to fig. 2-7, the control right of the master and the slave competing for the data line is divided into the following 6 cases:
in the first case: both the master controller and the slave controller have no data transmission requirements, both the master controller and the slave controller are in a monitoring state at the moment, and the data wire keeps high level.
In the second case: the master controller has a data transmission requirement, the slave controller has no data transmission requirement, and the master controller sends data to the outside after sending the announcement signals twice;
in the third case: the master controller has no data transmission requirement, the slave controller has a data transmission requirement, and the slave controller sends data outwards after sending the announcement signal twice and not monitoring the announcement signal sent by the master controller;
in a fourth case: the master controller and the slave controller have data transmission requirements, the master controller sends a declaration signal in advance before the slave controller, the master controller sends data after sending the declaration signal for the second time, the slave controller monitors the declaration signal sent by the master controller at least once and then converts the declaration signal into an input mode, and the master controller waits for the data to be sent;
in the fifth case: the master controller and the slave controller have data transmission requirements, the slave controller sends out an announcement signal in advance of the master controller, and the slave controller can be converted into an input mode after monitoring the announcement signal sent by the master controller at least once and waits for receiving data output by the master controller;
in the sixth case: the master controller and the slave controller have data transmission requirements, both sides send out first announcement signals at the same time and both sides do not monitor the announcement signals sent by the other side for the first time, when the slave controller monitors the announcement signals sent by the master controller for the second time, the slave controller is converted into a receiving state, and the master controller sends out data.
Specifically, the communication coding mode of the data may be determined according to the resource allocation of both parties, and may be a return-to-zero code, a non-return-to-zero code, a modulation code, and the like, which is not limited in the present invention. It should be noted that the present invention is not limited to setting the frame structure and baud rate of asynchronous transmission, but the present invention is not limited to setting the frame structure and baud rate of asynchronous transmission, which is required to be based on the reference clock accuracy of both communication parties and the length of transmission data.
Several logic coding modes and data transmission frame structure recommended by the invention
1. The frame structure of asynchronous serial non-return-to-zero code non-response mode:
when no data is transmitted, the data line is driven to be high level;
when data is transmitted, the low level of the 1-bit code element time value represents 0 and is defined as an initial bit;
after the start bit, non-return-to-zero data with fixed bit length is continuously transmitted, and the data length is determined by baud rate precision.
The high level of the 1bit code element value after the data bits represents 1 and is defined as a stop bit;
the high level after the stop bit represents the end of a data frame and the data line is in an idle state.
For a bus controller, the idle state of the data line longer than one frame duration is considered to give up the control right of the data line and enter a monitoring mode; for the data receiver, the data reception is considered to be finished, and the listening state is entered.
After each data frame is sent, a receiving party does not need to give out a response signal.
2. Asynchronous serial non-return-to-zero response mode frame structure:
when no data is transmitted, the data line is driven to be high level;
when data is transmitted, the low level of the 1-bit code element time value represents 0 and is defined as an initial bit;
after the start bit, non-return-to-zero data with fixed bit length is continuously transmitted, and the data length is determined by baud rate precision.
The high level of the 1bit code element value after the data bits represents 1 and is defined as a stop bit;
a response signal of 3-bit code element time value is followed after the stop bit, during the first bit of the response signal, the data transmitting side firstly changes the output port of the driving data line into a receiving state temporarily, and secondly, the receiving port of the data receiving side is changed into an output state temporarily from the original receiving (input) state and outputs the output state as a high level (1); during the second bit period of the response signal, the original data receiver outputs a low level (0) to the data line to represent that the data frame sent by the original sender is received, and the original data receiver outputs a high level (1) or the data line is pulled up to the high level (1), so that the original data sender receives the high level (1) to indicate that the original data receiver does not receive the latest data frame; during the third bit of the response signal, the original receiving party firstly changes the output port of the driving data line back to the original receiving state, and secondly, the original sending party changes the temporary receiving port back to the original output state and outputs the temporary receiving port as a high level (1);
after three bits of response signals are continuously transmitted, the state of the data line and the states of the original data transmitting port and the original data receiving port return to the state of the stop bit period before the response signals, the transmitting port is in an output state and outputs a high level (1), the port of the data receiving port is in an input port, the data line is in a high level (1) state, and the whole data bus enters a high level idle state to represent the end of a data frame. After one stop bit in each data frame is sent, a three-bit response signal must be followed, the end of the response signal represents the end of the whole data frame, and the bus enters an idle state.
For the control side of the bus, the idle state of the data line longer than one frame duration means that the control right of the data line is abandoned and the data line enters a monitoring state; for the data receiver, the data reception is considered to be finished, and the listening state is entered.
3. Frame structure of asynchronous serial phase modulation code non-response mode
An idle state: when no data is transmitted, the data line is driven to be high level;
logic "0" and "1" represent: when data are transmitted, the data line is driven to be in a low level, the beginning of the data bit is represented by a falling edge from the high level to the low level, the duration of the low level represents the value of the data bit, the duration of the low level is less than N tau and represents logic 0, the duration of the low level is greater than M tau and represents logic 1, the interval value of greater than or equal to N tau and less than or equal to M tau is a noise tolerance range and represents error codes, wherein tau represents minimum time measurement and is related to the time reference and the precision of both communication sides. The rising edge of the data line transitioning from low to high represents the end of the bit symbol.
bit interval: the high state with a finite duration is allowed to exist between the data bits as an idle state gap for the data line. The limited time period should be less than the minimum waiting time for the sender to relinquish the drive right to the data line.
4. Asynchronous serial phase modulation code response mode frame structure
An idle state: when no data is transmitted, the data line is driven to be high level;
logic "0" and "1" represent: when data are transmitted, the data line is driven to be in a low level, the beginning of the data bit is represented by a falling edge from the high level to the low level, the duration of the low level represents the value of the data bit, the duration of the low level is less than N tau and represents logic 0, the duration of the low level is greater than M tau and represents logic 1, the interval value of greater than or equal to N tau and less than or equal to M tau is a noise tolerance range and represents error codes, wherein tau represents minimum time measurement and is related to the time reference and the precision of both communication sides. The rising edge of the data line transitioning from low to high represents the end of the bit symbol.
bit interval: the high state with a finite duration is allowed to exist between the data bits as an idle state gap for the data line. The limited time period should be less than the minimum waiting time for the sender to relinquish the drive right to the data line.
The answer state includes three time phases: a first time stage Tr, a transmitting party interface conversion stage and a receiving party interface conversion stage; and answering a bit time stage Tack and a third time stage Rt, namely a transmitter interface rotation stage and a receiver interface rotation stage.
Tr stage: after the sender finishes sending the last data bit, the original sending port is modified into a receiving port in the shortest time as possible, and the sending port is in a ready state of receiving data; if the receiver receives the data of the sender, the receiver changes the receiving port of the receiver into a sending port and outputs high level after the receiver finishes receiving the last data bit and the original sending end is changed into a receiving state;
after the original receiving port of the Tack is changed into a sending state and outputs high level, the correct response '1' (or the reverse) and the error response '0' (or the reverse) can be received according to whether the data of the original data sending party is received or not to make response, and the time of the response bit is larger than a value with the longest code element time value in the logic 0 and the logic 1.
Rt stage: after the receiver finishes answering, the sending state of the receiving port of the original receiver is changed to a normal receiving state in the shortest time as far as possible and is in a receiving ready state; and after the sending port of the original sender receives the response signal and waits for the port state of the original receiver to be reset to the receiving state and to be in the receiving ready state, the sending port of the original sender is changed to the original sending state and outputs high level.
The original sender enters a response receiving state after the last data bit is sent, and when no effective response signal is received in the (Tr + TACK + Rt) time gap, the receiver is indicated to fail to receive the data of the sender.
It is to be understood that the above-described embodiments of the present invention are merely illustrative of or explaining the principles of the invention and are not to be construed as limiting the invention. Therefore, any modification, equivalent replacement, improvement and the like made without departing from the spirit and scope of the present invention should be included in the protection scope of the present invention. Further, it is intended that the appended claims cover all such variations and modifications as fall within the scope and boundaries of the appended claims or the equivalents of such scope and boundaries.
Claims (8)
1. A communication method based on a single-wire two-way communication system, the communication method based on the single-wire two-way communication system comprising: the communication method comprises the following steps that a main controller with a transistor, a secondary controller with a transistor and a pull-up resistor are arranged, the transistors are respectively connected with the main controller and the secondary controller through bases, collectors of the two transistors are in bidirectional communication connection through a data line, emitters of the two transistors are respectively grounded, one end of the pull-up resistor is connected with the data line, and the other end of the pull-up resistor is connected with a power supply anode, and the communication method comprises the following steps:
in a monitoring mode, when any one of the master controller or the slave controller does not monitor an announcement signal sent by the other side, data is sent, wherein the priority of the master controller is higher than that of the slave controller;
when the master controller detects an announcement signal sent by the slave controller, the master controller sends the announcement signal again and sends data to the slave controller;
when the slave controller detects an announcement signal sent by the master controller, the slave controller is switched to a receiving mode to receive data sent by the master controller.
2. The communication method according to claim 1, wherein before entering the listening mode, when the master controller and/or the slave controller needs to transmit data, the master controller and/or the slave controller transmits the announcement signal to the outside.
3. The communication method according to claim 2, wherein in the listening mode, when the master controller or the slave controller needs to send data outwards, and when either the master controller or the slave controller does not listen to an announcement signal sent by the other, the master controller sends the announcement signal again, and the slave controller sends the announcement signal again and enters the listening mode again, wherein the duration of the announcement signal sent again by the master controller is longer than the duration of the announcement signal sent again by the slave controller.
4. The communication method according to claim 3, wherein the switching to the listening mode is performed after the data transmission or reception of any one of the controllers is completed.
5. The communication method according to any one of claims 1 to 4, wherein in the listening mode, an access denial signal is transmitted to deny a counterpart from transmitting data when any one of the controllers operates internally.
6. The communication method according to claim 1, wherein when an asserted signal is sent, the master controller or the slave controller sends a high level to the transistors of itself for a predetermined period of time to pull down the data lines from a high level to a low level, respectively.
7. The communication method according to claim 6, wherein when the master controller or the slave controller enters a listening mode, the master controller or the slave controller continuously sends a low level to the base of the transistor of the master controller or the slave controller, so that the data line is kept at a high level.
8. The communication method according to claim 6 or 7, wherein the master controller or slave controller continuously sends a high level to the transistor of itself when the access rejection signal is asserted.
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