CN111948475A - Passive wireless arrester on-line monitoring system - Google Patents

Passive wireless arrester on-line monitoring system Download PDF

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Publication number
CN111948475A
CN111948475A CN202010783485.1A CN202010783485A CN111948475A CN 111948475 A CN111948475 A CN 111948475A CN 202010783485 A CN202010783485 A CN 202010783485A CN 111948475 A CN111948475 A CN 111948475A
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amplifier
resistor
diode
signal
capacitor
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周正超
高照
朱洋凯
何红军
姜国连
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Nanjing Litongda Electrical Technology Co ltd
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Nanjing Litongda Electrical Technology Co ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • GPHYSICS
    • G08SIGNALLING
    • G08CTRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
    • G08C17/00Arrangements for transmitting signals characterised by the use of a wireless electrical link
    • G08C17/02Arrangements for transmitting signals characterised by the use of a wireless electrical link using a radio link

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  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
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Abstract

The invention discloses a passive wireless arrester online monitoring system, which relates to the technical field of electric power and comprises a server, a wireless concentrator and a plurality of arrester online monitoring devices, solves the technical problem of wireless online monitoring of arresters, adopts LORA wireless local area network communication, does not need to lay a communication line on site, supports the whole-station LORA wireless network coverage of a single data concentrator, can maximally collect online monitoring data signals of distributed arresters of a transformer substation, and effectively avoids possible interference risks to secondary equipment connected with the arrester online monitoring devices when suffering lightning stroke by adopting a passive wireless working mode.

Description

Passive wireless arrester on-line monitoring system
Technical Field
The invention relates to the technical field of electric power, in particular to a passive wireless lightning arrester online monitoring system.
Background
The online monitoring device for the lightning arrester and the capacitive equipment is suitable for monitoring the state of metal oxide lightning arresters (MOAs) in various voltage levels in a power system, and is used for monitoring the action times and time, leakage total current and resistive current of the lightning arresters. The metal oxide arrester is an important overvoltage protection electric appliance in a power system, and along with long-time operation, an arrester valve plate can be degraded due to factors such as thermal damage, resonance overvoltage, internal moisture and the like, so that the arrester is damaged and even explodes.
As the lightning arresters are distributed and dispersed in the transformer substation, a power line and a communication line need to be laid in the conventional lightning arrester online monitoring device and system, and the problems of complex wiring, high power taking difficulty and high cable distance cost exist.
Disclosure of Invention
The invention aims to provide a passive wireless lightning arrester on-line monitoring system, which solves the technical problem of wireless on-line monitoring of lightning arresters.
In order to achieve the purpose, the invention adopts the following technical scheme:
the utility model provides a passive wireless arrester on-line monitoring system, includes server, wireless concentrator and several arrester on-line monitoring device, and all arrester on-line monitoring devices all communicate with wireless concentrator through 485 modules, through 4G wireless network communication between wireless concentrator and the server.
The online monitoring device of the lightning arrester comprises a LORA module, a CPU, a power supply circuit, a battery circuit, a display module, an AD sampling circuit, a counting circuit, a wireless communication module and a wired communication module, wherein the LORA module, the display module, the AD sampling circuit, the counting circuit, the wireless communication module and the wired communication module are all electrically connected with the CPU, and the AD sampling circuit is also electrically connected with the counting circuit;
the power supply circuit and the battery circuit supply power for the LORA module, the CPU, the display module, the AD sampling circuit, the counting circuit, the wireless communication module and the wired communication module;
the AD sampling circuit collects current signals on the lightning arrester;
the circuit principle of the wireless concentrator is the same as that of the lightning arrester on-line monitoring device, and the lightning arrester on-line monitoring device is communicated with the wireless concentrator through a LORA module or a wired communication module of the lightning arrester on-line monitoring device.
Preferably, a GTM-8000 power equipment operation and maintenance diagnosis platform is deployed in the server.
Preferably, the AD sampling circuit includes an AD module U23, a current change sampling circuit, a current collection interface P2, and a filter circuit;
the current change sampling circuit comprises a current transformer T1, a capacitor C45, a resistor R62, a capacitor C47, an amplifier U24A, a capacitor C31, a capacitor C48, a resistor R54 and a capacitor C37, wherein pins 1 and 2 of the current transformer T1 collect current change signals on a line where the lightning arrester is located, pins 4 and 6 are connected with a ground wire, the positive input end of the amplifier U24A is connected with the negative input end of the amplifier U24A, the negative input end of the amplifier U24A is connected with the output end of the amplifier U24A, the capacitor C45 is a filter capacitor on pins 6 and 4 of the current transformer T1, the capacitor C47 is a filter capacitor at the positive input end of the amplifier U24A, the capacitor C31 and the capacitor C48 are respectively a power supply end of the amplifier U24A and a filter capacitor on the ground wire, the output end of the amplifier U24A outputs voltage signals A through the resistor AI A, and the capacitor C A is used for filtering the full;
the voltage signal AI3 is input to an AD acquisition port of the AD module U23;
the 1 pin and the 2 pin of the current acquisition interface P2 are connected with a main current signal and a current signal AI1 output by the lightning arrester, and the main current signal comprises a current signal AI + and a current signal AI-;
the filter circuit comprises a first-order low-pass filter circuit formed by an amplifier U22A and peripheral current thereof, an amplifier chip U37 and peripheral circuit thereof and an amplifier U22B, wherein the positive input end of the amplifier U22A is connected with a ground wire through a resistor R56, and the negative input end of the amplifier U22A is connected with a current signal AI1 through a resistor R45; when the current signal AI1 enters one end of the resistor R45, the current signal AI is also connected to the ground through the TVS tube TVS 2;
the output end of the amplifier U22A outputs a SIGNAL _2 SIGNAL through a resistor R57, the amplifier U22A is connected with one end of a resistor R52 through a resistor R57, and the other end of the resistor R52 is connected with the positive input end of an amplifier chip U37;
the amplifier chip U37 and peripheral circuits thereof form a current signal amplifying circuit;
the pin 5 of the amplifier U37 is the output end thereof, the pin 5 of the amplifier U37 is connected with the positive input end of the amplifier U22B through a resistor R55, the positive input end of the amplifier U22B is also connected with the ground wire through a resistor R70, the negative input end of the amplifier U22B is connected with the output end of the amplifier U22B, and a capacitor C20 is positioned in a filter capacitor of the positive input end of the amplifier U22B;
the output end of the amplifier U22B outputs a SIGNAL _1 SIGNAL;
the SIGNAL _1 SIGNAL and the SIGNAL _2 SIGNAL are respectively connected to two AD inputs of the AD module U23.
Preferably, the counting circuit comprises a voltage discrimination circuit, a first counting circuit and a second counting circuit;
the voltage discrimination circuit comprises bridges D12-D15, an amplifier U38, a diode D11, a capacitor C65, a resistor R114, a resistor R117, a field-effect tube Q1, a resistor R118, an amplifier U36, a resistor R115 and a resistor R116, wherein the input ends of the bridges D12-D15 are respectively connected with the current signal AI + and the current signal AI-, the output end of the bridges D12-D15 is respectively connected with a ground wire and a pin 3 of the amplifier U38, a pin 1 and a pin 2 of the amplifier U38 are both connected with the anode of the diode D11, and the cathode of the diode D11 is connected with a pin 3 of the amplifier U36;
the D pole of the field effect transistor Q1 is connected with the negative pole of the diode D11 through the resistor R117, the G pole is connected with one IO port of the CPU, the S pole is connected with the ground wire, and the resistor R118 is connected between the G pole and the S pole of the field effect transistor Q1;
the cathode of the diode D11 is also connected with the ground wire through a resistor R114 and a capacitor C65 which are connected in parallel;
pins 1 and 2 of the amplifier U36 are both connected with pin 5 of the amplifier U36, the resistor R115 and the resistor R116 form a voltage dividing resistor circuit on pin 6 of the amplifier U36, and pin 7 of the amplifier U36 outputs a Pulse _ Catch signal;
the first counting circuit comprises an amplifier OPB1A, a resistor R A, a diode DA A, a capacitor C A, a comparator UA1A, a resistor R A and a Schmitt trigger U A, a Pulse _ Catch signal is input to a negative input end of the amplifier OPB1A through the resistor R A, the resistor R A and the resistor R A form a peripheral circuit of the amplifier OPB1A, an output end of the amplifier OPB1A is connected with a positive input end of the comparator UA1A through the resistor R A, a negative input end of the comparator UA1A is connected with a ground wire, a positive input end of the comparator UA1A is also connected with a negative electrode of the diode DA A, a positive input end of the diode DA A is connected with a positive power supply, the capacitor C A is a positive input end of the comparator DA A, a positive input end of the comparator DA A is connected with a filter U A, and a filter pin of the Schmitt trigger U A is connected with a filter U A, a 4-pin output DIAN1 signal of a Schmidt trigger U60, a DIAN1 signal is input to an IO port of the CPU, and a resistor R46 is a pull-up resistor of an output end of a comparator UA 1A;
the second counting circuit comprises an amplifier OPB1B, a resistor R B, a diode DA B, a capacitor C B, a comparator UA1B, a resistor R B and a Schmitt trigger U B, a SIGNAL _1 SIGNAL is input to a negative input end of the amplifier OPB1B through the resistor R B, the resistor R B and the resistor R B form a peripheral circuit of the amplifier OPB1B, an output end of the amplifier OPB1B is connected with a positive input end of the comparator UA1B through the resistor R B, a negative input end of the comparator UA1B is connected with a ground wire, a positive input end of the comparator UA1B is also connected with a negative electrode of the diode DA B, a positive electrode of the diode DA B is connected with a ground wire, a positive electrode of the diode DA B is also connected with a negative electrode of the diode DA B, a positive electrode of the diode DA B is connected with a source, the capacitor C B is connected with a positive input end of the comparator UA 381, a filter pin of the Schmitt trigger U B is connected with a filter pin of the Schmitt trigger U B, the 4-pin of the schmitt trigger U61 outputs a DIAN2 signal, a DIAN2 signal is input to an IO port of the CPU, and a resistor R53 is a pull-up resistor at the output terminal of the comparator UA 1A.
Preferably, the model of the AD module is AD7606 BSTZ; the models of the amplifier U38, the amplifier U36, the amplifier U24A, the amplifier U22A and the amplifier U22B are AD 822; the amplifier chip U37 is AD627 AR; the models of the amplifier OPB1B and the amplifier OPB1A are both OP4177 AR; the comparator UA1B and the comparator UA1A are both LM393 DR; the models of the Schmitt trigger U61 and the Schmitt trigger U60 are both SN74LVC1G14 DBV;
the CPU is STM32F407ZGT6, the LORA module is SX1268, the display module is an LCD display screen, and the wireless communication module is USR-GPRS232-7S 2; the model of the wired communication module is MAX485 ESA.
Preferably, the power supply circuit comprises a positive and negative 15 negative voltage stabilizing module, a 5V voltage stabilizing module and a 3.3V voltage stabilizing module; the positive and negative 15 negative voltage stabilizing module is used for supplying power to the AD sampling circuit and the counting circuit, and the 5V voltage stabilizing module is used for supplying power to the wireless communication module, the wired communication module and the AD module; and the 3.3V voltage stabilizing module supplies power to the CPU.
Preferably, the battery circuit includes a diode D400, a diode D402, a diode D405, a battery B400, a resistor R400, and a resistor R401, a negative electrode of the battery B400 is connected to a ground line, a positive electrode of the diode D402 is connected to a positive electrode of the diode D402, a negative electrode of the diode D402 is connected to a VBAT pin of the CPU, a negative electrode of the diode D405 is connected to the VBAT pin of the CPU, a positive electrode of the diode D405 is connected to the power supply output by the 3.3V regulator module, a capacitor C403 is a filter capacitor of the positive electrode of the diode D405, a negative electrode of the diode D400 is connected to the positive electrode of the battery B400, a negative electrode of the diode D400 is connected to the negative electrode of the battery B400 through the resistor R401, and a positive.
The passive wireless online monitoring system for the lightning arrester solves the technical problem of wireless online monitoring of the lightning arrester, adopts LORA wireless local area network communication, does not need to lay a communication line on site, supports the whole LORA wireless network coverage of a single data concentrator, can collect online monitoring data signals of the distributed lightning arrester of a transformer substation to the maximum extent, and effectively avoids possible interference risks to secondary equipment connected with the online monitoring equipment of the lightning arrester when the lightning arrester is struck by lightning by adopting a passive wireless working mode.
Drawings
FIG. 1 is a system architecture diagram of the present invention;
fig. 2 is a block diagram of the circuit diagram of the on-line monitoring device of the wireless concentrator or lightning arrester according to the invention;
FIG. 3 is a circuit diagram of a current change sampling circuit of the present invention;
FIG. 4 is a circuit diagram of a filter circuit of the present invention;
FIG. 5 is a circuit diagram of the voltage discrimination circuit of the present invention;
FIG. 6 is a circuit diagram of a first counting circuit and a second counting circuit of the present invention;
fig. 7 is a circuit diagram of a battery circuit of the present invention.
Detailed Description
As shown in fig. 1-7, the passive wireless arrester on-line monitoring system comprises a server, a wireless concentrator and a plurality of arrester on-line monitoring devices, wherein all the arrester on-line monitoring devices are communicated with the wireless concentrator through 485 modules, and the wireless concentrator is communicated with the server through a 4G wireless network.
The online monitoring device of the lightning arrester comprises a LORA module, a CPU, a power supply circuit, a battery circuit, a display module, an AD sampling circuit, a counting circuit, a wireless communication module and a wired communication module, wherein the LORA module, the display module, the AD sampling circuit, the counting circuit, the wireless communication module and the wired communication module are all electrically connected with the CPU, and the AD sampling circuit is also electrically connected with the counting circuit;
the power supply circuit and the battery circuit supply power for the LORA module, the CPU, the display module, the AD sampling circuit, the counting circuit, the wireless communication module and the wired communication module;
the AD sampling circuit collects current signals on the lightning arrester;
the circuit principle of the wireless concentrator is the same as that of the lightning arrester on-line monitoring device, and the lightning arrester on-line monitoring device is communicated with the wireless concentrator through a LORA module or a wired communication module of the lightning arrester on-line monitoring device.
Preferably, a GTM-8000 power equipment operation and maintenance diagnosis platform is deployed in the server.
Preferably, the AD sampling circuit includes an AD module U23, a current change sampling circuit, a current collection interface P2, and a filter circuit;
the current change sampling circuit comprises a current transformer T1, a capacitor C45, a resistor R62, a capacitor C47, an amplifier U24A, a capacitor C31, a capacitor C48, a resistor R54 and a capacitor C37, wherein pins 1 and 2 of the current transformer T1 collect current change signals on a line where the lightning arrester is located, pins 4 and 6 are connected with a ground wire, the positive input end of the amplifier U24A is connected with the negative input end of the amplifier U24A, the negative input end of the amplifier U24A is connected with the output end of the amplifier U24A, the capacitor C45 is a filter capacitor on pins 6 and 4 of the current transformer T1, the capacitor C47 is a filter capacitor at the positive input end of the amplifier U24A, the capacitor C31 and the capacitor C48 are respectively a power supply end of the amplifier U24A and a filter capacitor on the ground wire, the output end of the amplifier U24A outputs voltage signals A through the resistor AI A, and the capacitor C A is used for filtering the full;
the current signal collected by the current transformer T1 is input to an amplifier circuit formed by an amplifier U24A, amplified by an amplifier U24A, input to an AD module U23 for digital-to-analog conversion, and the converted model is input to the CPU.
The voltage signal AI3 is input to an AD acquisition port of the AD module U23;
the 1 pin and the 2 pin of the current acquisition interface P2 are connected with a main current signal and a current signal AI1 output by the lightning arrester, and the main current signal comprises a current signal AI + and a current signal AI-;
in the embodiment, monitoring signals of the lightning arrester are acquired by two external transformers, wherein one transformer is used for monitoring leakage current, and the other transformer is used for monitoring lightning frequency of the lightning arrester;
the main current signal is a secondary signal output by a high-voltage signal of a bus connected with the lightning arrester through a power transformer, and the current signal AI + and the current signal AI-are in phase with the high-voltage signal of the bus connected with the lightning arrester and are in proportion to the amplitude.
The voltage signal AI3 is a voltage signal of the main current signal, and in the embodiment, the main current signal and the voltage signal AI3 are also collected by a transformer;
the filter circuit comprises a first-order low-pass filter circuit formed by an amplifier U22A and peripheral current thereof, an amplifier chip U37 and peripheral circuit thereof and an amplifier U22B, wherein the positive input end of the amplifier U22A is connected with a ground wire through a resistor R56, and the negative input end of the amplifier U22A is connected with a current signal AI1 through a resistor R45; when the current signal AI1 enters one end of the resistor R45, the current signal AI is also connected to the ground through the TVS tube TVS 2;
the current signal AI1 corresponds to the leakage current signal of the lightning arrester, and the medium loss of the lightning arrester is calculated through the phase difference between the current signal AI1 and the voltage signal AI3, so that whether the lightning arrester is damaged or not is judged.
The output end of the amplifier U22A outputs a SIGNAL _2 SIGNAL through a resistor R57, the amplifier U22A is connected with one end of a resistor R52 through a resistor R57, and the other end of the resistor R52 is connected with the positive input end of an amplifier chip U37;
the amplifier chip U37 and peripheral circuits thereof form a current signal amplifying circuit;
the pin 5 of the amplifier U37 is the output end thereof, the pin 5 of the amplifier U37 is connected with the positive input end of the amplifier U22B through a resistor R55, the positive input end of the amplifier U22B is also connected with the ground wire through a resistor R70, the negative input end of the amplifier U22B is connected with the output end of the amplifier U22B, and a capacitor C20 is positioned in a filter capacitor of the positive input end of the amplifier U22B;
the output end of the amplifier U22B outputs a SIGNAL _1 SIGNAL;
the SIGNAL _1 SIGNAL and the SIGNAL _2 SIGNAL are respectively connected to two AD inputs of the AD module U23.
FIG. 4 shows a second amplification of the input SIGNAL AI1, the first amplification being used to measure a large current SIGNAL, i.e., SIGNAL _2 SIGNAL, and the second amplification being used to measure a small leakage current SIGNAL, i.e., SIGNAL _1 SIGNAL
The filter circuit of the invention adopts a first-order low-pass filter composed of an amplifier U22A for filtering, one path of an output signal is input into an AD module U23 for analog-to-digital conversion, the other path of the output signal is input into an amplifier chip U37 for amplification, and the amplified signal is used for activating a second counting circuit, wherein the amplified signal is subjected to impedance matching by a voltage follower composed of the amplifier U22B.
Preferably, the counting circuit comprises a voltage discrimination circuit, a first counting circuit and a second counting circuit;
the voltage discrimination circuit comprises bridges D12-D15, an amplifier U38, a diode D11, a capacitor C65, a resistor R114, a resistor R117, a field-effect tube Q1, a resistor R118, an amplifier U36, a resistor R115 and a resistor R116, wherein the input ends of the bridges D12-D15 are respectively connected with the current signal AI + and the current signal AI-, the output end of the bridges D12-D15 is respectively connected with a ground wire and a pin 3 of the amplifier U38, a pin 1 and a pin 2 of the amplifier U38 are both connected with the anode of the diode D11, and the cathode of the diode D11 is connected with a pin 3 of the amplifier U36;
the current signal AI + and the current signal AI-are both provided by an external transformer and are used for monitoring lightning stroke current for counting.
The circuit between the amplifier U38 and the FET Q1 is a pulse capture circuit for capturing the highest peak of the lightning pulse, its output impedance is very high and the level discharge is relatively slow, and the FET Q1 is used to accelerate the discharge to prepare for capturing the next lightning pulse.
The D pole of the field effect transistor Q1 is connected with the negative pole of the diode D11 through the resistor R117, the G pole is connected with one IO port of the CPU, the S pole is connected with the ground wire, and the resistor R118 is connected between the G pole and the S pole of the field effect transistor Q1;
the cathode of the diode D11 is also connected with the ground wire through a resistor R114 and a capacitor C65 which are connected in parallel;
pins 1 and 2 of the amplifier U36 are both connected with pin 5 of the amplifier U36, the resistor R115 and the resistor R116 form a voltage dividing resistor circuit on pin 6 of the amplifier U36, and pin 7 of the amplifier U36 outputs a Pulse _ Catch signal;
the voltage discrimination circuit of the invention firstly rectifies the current signal AI + and the current signal AI-by the electric bridge D12-D15, then amplifies by the amplifier U38, and then compares the voltage follower formed by the amplifier U36 with the voltage comparator to output a Pulse signal Pulse _ Catch signal, wherein the Pulse signal is used for triggering the first counting circuit;
the amplifier U36 is formed by integrating two amplifiers, and forms a voltage follower and a voltage comparator according to the connection mode shown in fig. 5.
The first counting circuit comprises an amplifier OPB1A, a resistor R A, a diode DA A, a capacitor C A, a comparator UA1A, a resistor R A and a Schmitt trigger U A, a Pulse _ Catch signal is input to a negative input end of the amplifier OPB1A through the resistor R A, the resistor R A and the resistor R A form a peripheral circuit of the amplifier OPB1A, an output end of the amplifier OPB1A is connected with a positive input end of the comparator UA1A through the resistor R A, a negative input end of the comparator UA1A is connected with a ground wire, a positive input end of the comparator UA1A is also connected with a negative electrode of the diode DA A, a positive input end of the diode DA A is connected with a positive power supply, the capacitor C A is a positive input end of the comparator DA A, a positive input end of the comparator DA A is connected with a filter U A, and a filter pin of the Schmitt trigger U A is connected with a filter U A, a 4-pin output DIAN1 signal of a Schmidt trigger U60, a DIAN1 signal is input to an IO port of the CPU, and a resistor R46 is a pull-up resistor of an output end of a comparator UA 1A;
the first counting circuit is used for counting the zero-crossing change of the current signal AI + and the current signal AI-, the amplifier OPB1A amplifies the signal Pulse _ Catch and then compares the amplified signal Pulse _ Catch with a zero-crossing comparator formed by a comparator UA1A, the final output result is input to a pin 2 of a Schmitt trigger U60 to trigger the Schmitt trigger U60, and the output result of the Schmitt trigger U60 is input to an IO port of a CPU.
The schmitt trigger U60 in the first counter is released by a release circuit formed by a field effect transistor Q1.
The lightning signal is held by the counting circuit, and when the counting is finished by detecting the rising edge, the lightning signal is released through the Q1 to wait for the next recounting.
The second counting circuit comprises an amplifier OPB1B, a resistor R B, a diode DA B, a capacitor C B, a comparator UA1B, a resistor R B and a Schmitt trigger U B, a SIGNAL _1 SIGNAL is input to a negative input end of the amplifier OPB1B through the resistor R B, the resistor R B and the resistor R B form a peripheral circuit of the amplifier OPB1B, an output end of the amplifier OPB1B is connected with a positive input end of the comparator UA1B through the resistor R B, a negative input end of the comparator UA1B is connected with a ground wire, a positive input end of the comparator UA1B is also connected with a negative electrode of the diode DA B, a positive electrode of the diode DA B is connected with a ground wire, a positive electrode of the diode DA B is also connected with a negative electrode of the diode DA B, a positive electrode of the diode DA B is connected with a source, the capacitor C B is connected with a positive input end of the comparator UA 381, a filter pin of the Schmitt trigger U B is connected with a filter pin of the Schmitt trigger U B, the 4-pin of the schmitt trigger U61 outputs a DIAN2 signal, a DIAN2 signal is input to an IO port of the CPU, and a resistor R53 is a pull-up resistor at the output terminal of the comparator UA 1A.
The circuit principle of the second counting circuit is the same as that of the first counting circuit, and the second counting circuit is triggered by a SIGNAL _1 SIGNAL.
The input of the DIAN1 signal is Pulse Catch, which is used for lightning Pulse counting. The input SIGNAL of the DIAN2 SIGNAL is SIGNAL _1, which is used to measure the operating frequency of the lightning arrester leakage current.
Preferably, the model of the AD module is AD7606 BSTZ; the models of the amplifier U38, the amplifier U36, the amplifier U24A, the amplifier U22A and the amplifier U22B are AD 822; the amplifier chip U37 is AD627 AR; the models of the amplifier OPB1B and the amplifier OPB1A are both OP4177 AR; the comparator UA1B and the comparator UA1A are both LM393 DR; the models of the Schmitt trigger U61 and the Schmitt trigger U60 are both SN74LVC1G14 DBV;
the CPU is STM32F407ZGT6, the LORA module is SX1268, the display module is an LCD display screen, and the wireless communication module is USR-GPRS232-7S 2; the model of the wired communication module is MAX485 ESA.
Preferably, the power supply circuit comprises a positive and negative 15 negative voltage stabilizing module, a 5V voltage stabilizing module and a 3.3V voltage stabilizing module; the positive and negative 15 negative voltage stabilizing module is used for supplying power to the AD sampling circuit and the counting circuit, and the 5V voltage stabilizing module is used for supplying power to the wireless communication module, the wired communication module and the AD module; and the 3.3V voltage stabilizing module supplies power to the CPU.
Preferably, the battery circuit includes a diode D400, a diode D402, a diode D405, a battery B400, a resistor R400, and a resistor R401, a negative electrode of the battery B400 is connected to a ground line, a positive electrode of the diode D402 is connected to a positive electrode of the diode D402, a negative electrode of the diode D402 is connected to a VBAT pin of the CPU, a negative electrode of the diode D405 is connected to the VBAT pin of the CPU, a positive electrode of the diode D405 is connected to the power supply output by the 3.3V regulator module, a capacitor C403 is a filter capacitor of the positive electrode of the diode D405, a negative electrode of the diode D400 is connected to the positive electrode of the battery B400, a negative electrode of the diode D400 is connected to the negative electrode of the battery B400 through the resistor R401, and a positive.
The battery circuit of the invention is a battery for a real-time clock.
The invention is also provided with an internal power supply lithium battery which outputs 24V to supply power for the lightning arrester on-line monitoring device.
The passive wireless online monitoring system for the lightning arrester solves the technical problem of wireless online monitoring of the lightning arrester, adopts LORA wireless local area network communication, does not need to lay a communication line on site, supports the whole LORA wireless network coverage of a single data concentrator, can collect online monitoring data signals of the distributed lightning arrester of a transformer substation to the maximum extent, and effectively avoids possible interference risks to secondary equipment connected with the online monitoring equipment of the lightning arrester when the lightning arrester is struck by lightning by adopting a passive wireless working mode.

Claims (7)

1. The utility model provides a passive wireless arrester on-line monitoring system which characterized in that: the system comprises a server, a wireless concentrator and a plurality of lightning arrester on-line monitoring devices, wherein all the lightning arrester on-line monitoring devices are communicated with the wireless concentrator through 485 modules, and the wireless concentrator is communicated with the server through a 4G wireless network;
the online monitoring device of the lightning arrester comprises a LORA module, a CPU, a power supply circuit, a battery circuit, a display module, an AD sampling circuit, a counting circuit, a wireless communication module and a wired communication module, wherein the LORA module, the display module, the AD sampling circuit, the counting circuit, the wireless communication module and the wired communication module are all electrically connected with the CPU, and the AD sampling circuit is also electrically connected with the counting circuit;
the power supply circuit and the battery circuit supply power for the LORA module, the CPU, the display module, the AD sampling circuit, the counting circuit, the wireless communication module and the wired communication module;
the AD sampling circuit collects current signals on the lightning arrester;
the circuit principle of the wireless concentrator is the same as that of the lightning arrester on-line monitoring device, and the lightning arrester on-line monitoring device is communicated with the wireless concentrator through a LORA module or a wired communication module of the lightning arrester on-line monitoring device.
2. The passive wireless lightning arrester on-line monitoring system according to claim 1, characterized in that: and deploying a GTM-8000 power equipment operation and maintenance diagnosis platform in the server.
3. The passive wireless lightning arrester on-line monitoring system according to claim 1, characterized in that: the AD sampling circuit comprises an AD module U23, a current change sampling circuit, a current acquisition interface P2 and a filter circuit;
the current change sampling circuit comprises a current transformer T1, a capacitor C45, a resistor R62, a capacitor C47, an amplifier U24A, a capacitor C31, a capacitor C48, a resistor R54 and a capacitor C37, wherein pins 1 and 2 of the current transformer T1 collect current change signals on a line where the lightning arrester is located, pins 4 and 6 are connected with a ground wire, the positive input end of the amplifier U24A is connected with the negative input end of the amplifier U24A, the negative input end of the amplifier U24A is connected with the output end of the amplifier U24A, the capacitor C45 is a filter capacitor on pins 6 and 4 of the current transformer T1, the capacitor C47 is a filter capacitor at the positive input end of the amplifier U24A, the capacitor C31 and the capacitor C48 are respectively a power supply end of the amplifier U24A and a filter capacitor on the ground wire, the output end of the amplifier U24A outputs voltage signals A through the resistor AI A, and the capacitor C A is used for filtering the full;
the voltage signal AI3 is input to an AD acquisition port of the AD module U23;
the 1 pin and the 2 pin of the current acquisition interface P2 are connected with a main current signal and a current signal AI1 output by the lightning arrester, and the main current signal comprises a current signal AI + and a current signal AI-;
the filter circuit comprises a first-order low-pass filter circuit formed by an amplifier U22A and peripheral current thereof, an amplifier chip U37 and peripheral circuit thereof and an amplifier U22B, wherein the positive input end of the amplifier U22A is connected with a ground wire through a resistor R56, and the negative input end of the amplifier U22A is connected with a current signal AI1 through a resistor R45; when the current signal AI1 enters one end of the resistor R45, the current signal AI is also connected to the ground through the TVS tube TVS 2;
the output end of the amplifier U22A outputs a SIGNAL _2 SIGNAL through a resistor R57, the amplifier U22A is connected with one end of a resistor R52 through a resistor R57, and the other end of the resistor R52 is connected with the positive input end of an amplifier chip U37;
the amplifier chip U37 and peripheral circuits thereof form a current signal amplifying circuit;
the pin 5 of the amplifier U37 is the output end thereof, the pin 5 of the amplifier U37 is connected with the positive input end of the amplifier U22B through a resistor R55, the positive input end of the amplifier U22B is also connected with the ground wire through a resistor R70, the negative input end of the amplifier U22B is connected with the output end of the amplifier U22B, and a capacitor C20 is positioned in a filter capacitor of the positive input end of the amplifier U22B;
the output end of the amplifier U22B outputs a SIGNAL _1 SIGNAL;
the SIGNAL _1 SIGNAL and the SIGNAL _2 SIGNAL are respectively connected to two AD inputs of the AD module U23.
4. The passive wireless lightning arrester on-line monitoring system according to claim 3, characterized in that: the counting circuit comprises a voltage discrimination circuit, a first counting circuit and a second counting circuit;
the voltage discrimination circuit comprises bridges D12-D15, an amplifier U38, a diode D11, a capacitor C65, a resistor R114, a resistor R117, a field-effect tube Q1, a resistor R118, an amplifier U36, a resistor R115 and a resistor R116, wherein the input ends of the bridges D12-D15 are respectively connected with the current signal AI + and the current signal AI-, the output end of the bridges D12-D15 is respectively connected with a ground wire and a pin 3 of the amplifier U38, a pin 1 and a pin 2 of the amplifier U38 are both connected with the anode of the diode D11, and the cathode of the diode D11 is connected with a pin 3 of the amplifier U36;
the D pole of the field effect transistor Q1 is connected with the negative pole of the diode D11 through the resistor R117, the G pole is connected with one IO port of the CPU, the S pole is connected with the ground wire, and the resistor R118 is connected between the G pole and the S pole of the field effect transistor Q1;
the cathode of the diode D11 is also connected with the ground wire through a resistor R114 and a capacitor C65 which are connected in parallel;
pins 1 and 2 of the amplifier U36 are both connected with pin 5 of the amplifier U36, the resistor R115 and the resistor R116 form a voltage dividing resistor circuit on pin 6 of the amplifier U36, and pin 7 of the amplifier U36 outputs a Pulse _ Catch signal;
the first counting circuit comprises an amplifier OPB1A, a resistor R A, a diode DA A, a capacitor C A, a comparator UA1A, a resistor R A and a Schmitt trigger U A, a Pulse _ Catch signal is input to a negative input end of the amplifier OPB1A through the resistor R A, the resistor R A and the resistor R A form a peripheral circuit of the amplifier OPB1A, an output end of the amplifier OPB1A is connected with a positive input end of the comparator UA1A through the resistor R A, a negative input end of the comparator UA1A is connected with a ground wire, a positive input end of the comparator UA1A is also connected with a negative electrode of the diode DA A, a positive input end of the diode DA A is connected with a positive power supply, the capacitor C A is a positive input end of the comparator DA A, a positive input end of the comparator DA A is connected with a filter U A, and a filter pin of the Schmitt trigger U A is connected with a filter U A, a 4-pin output DIAN1 signal of a Schmidt trigger U60, a DIAN1 signal is input to an IO port of the CPU, and a resistor R46 is a pull-up resistor of an output end of a comparator UA 1A;
the second counting circuit comprises an amplifier OPB1B, a resistor R B, a diode DA B, a capacitor C B, a comparator UA1B, a resistor R B and a Schmitt trigger U B, a SIGNAL _1 SIGNAL is input to a negative input end of the amplifier OPB1B through the resistor R B, the resistor R B and the resistor R B form a peripheral circuit of the amplifier OPB1B, an output end of the amplifier OPB1B is connected with a positive input end of the comparator UA1B through the resistor R B, a negative input end of the comparator UA1B is connected with a ground wire, a positive input end of the comparator UA1B is also connected with a negative electrode of the diode DA B, a positive electrode of the diode DA B is connected with a ground wire, a positive electrode of the diode DA B is also connected with a negative electrode of the diode DA B, a positive electrode of the diode DA B is connected with a source, the capacitor C B is connected with a positive input end of the comparator UA 381, a filter pin of the Schmitt trigger U B is connected with a filter pin of the Schmitt trigger U B, the 4-pin of the schmitt trigger U61 outputs a DIAN2 signal, a DIAN2 signal is input to an IO port of the CPU, and a resistor R53 is a pull-up resistor at the output terminal of the comparator UA 1A.
5. The passive wireless lightning arrester online monitoring system according to claim 4, characterized in that: the model of the AD module is AD7606 BSTZ; the models of the amplifier U38, the amplifier U36, the amplifier U24A, the amplifier U22A and the amplifier U22B are AD 822; the amplifier chip U37 is AD627 AR; the models of the amplifier OPB1B and the amplifier OPB1A are both OP4177 AR; the comparator UA1B and the comparator UA1A are both LM393 DR; the models of the Schmitt trigger U61 and the Schmitt trigger U60 are both SN74LVC1G14 DBV;
the CPU is STM32F407ZGT6, the LORA module is SX1268, the display module is an LCD display screen, and the wireless communication module is USR-GPRS232-7S 2; the model of the wired communication module is MAX485 ESA.
6. The passive wireless lightning arrester online monitoring system according to claim 4, characterized in that: the power supply circuit comprises a positive and negative 15-voltage stabilizing module, a 5V voltage stabilizing module and a 3.3V voltage stabilizing module; the positive and negative 15 negative voltage stabilizing module is used for supplying power to the AD sampling circuit and the counting circuit, and the 5V voltage stabilizing module is used for supplying power to the wireless communication module, the wired communication module and the AD module; and the 3.3V voltage stabilizing module supplies power to the CPU.
7. The passive wireless lightning arrester on-line monitoring system according to claim 6, characterized in that: the battery circuit comprises a diode D400, a diode D402, a diode D405, a battery pack B400, a resistor R400 and a resistor R401, wherein the cathode of the battery pack B400 is connected with a ground wire, the anode of the battery pack B400 is connected with the anode of the diode D402, the cathode of the diode D402 is connected with the VBAT pin of the CPU, the cathode of the diode D405 is connected with the VBAT pin of the CPU, the anode of the diode D405 is connected with a power supply output by the 3.3V voltage stabilizing module, a capacitor C403 is a filter capacitor of the anode of the diode D405, the cathode of the diode D400 is connected with the anode of the battery pack B400, the cathode of the diode D400 is connected with the cathode of the battery pack B400 through the resistor R401, and the anode of the diode D.
CN202010783485.1A 2020-08-06 2020-08-06 Passive wireless arrester on-line monitoring system Pending CN111948475A (en)

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Application publication date: 20201117