CN1119359A - Semiconductor composite element, and method of detecting abnormal conditions in an inverter device having the element - Google Patents
Semiconductor composite element, and method of detecting abnormal conditions in an inverter device having the element Download PDFInfo
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- CN1119359A CN1119359A CN95100274A CN95100274A CN1119359A CN 1119359 A CN1119359 A CN 1119359A CN 95100274 A CN95100274 A CN 95100274A CN 95100274 A CN95100274 A CN 95100274A CN 1119359 A CN1119359 A CN 1119359A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
- H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
- H02H7/122—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for inverters, i.e. dc/ac converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K17/082—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
- H03K17/0828—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit in composite switches
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
- G01R19/16566—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533
- G01R19/16571—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533 comparing AC or DC current with one threshold, e.g. load current, over-current, surge current or fault current
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K2017/0806—Modifications for protecting switching circuit against overcurrent or overvoltage against excessive temperature
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
- Power Conversion In General (AREA)
- Protection Of Static Devices (AREA)
Abstract
A semiconductor composite element in which abnormal conditions of overcurrent, control supply voltage reduction and overheat are detected, and different abnormality signals are outputted according to the respective abnormal conditions thus detected. The semiconductor composite element includes: abnormal condition detecting device for detecting the overcurrent and control supply voltage reduction of any one or all of the plurality of semiconductor switching elements and the overheat of the semiconductor composite element. An abnormality signal generating device is provided for producing different abnormality signals according to the respective abnormal conditions detected by the abnormal condition detecting device.
Description
The present invention relates to the semiconductor subassembly that in such as equipment such as inverters, adopts, in this assembly, can detect overcurrent, control voltage reduces and abnormal conditions such as overheated, and export different abnormal signals according to the abnormal conditions that detect separately, the invention still further relates to the method that in comprising the inverter of this semiconductor subassembly, detects these abnormal conditions.
Fig. 5 is the block diagram of a common semiconductor subassembly internal structure.In Fig. 5, label 20 expression semiconductor subassemblies; 21a represents a positive side control power end; 21b represents minus side control power end; 22a represents a positive side control common port; 22b represents minus side control common port; 23a represents a positive side signal input end; 23b represents a minus side signal input end; 24a represents a positive side abnormal signal output; 24b represents a minus side abnormal signal output; 25a represents a positive side dc supply input; 25b represents a minus side dc supply input; 26 expressions, one ac power output; 27a represents a positive side semiconductor switch element (it is a transistor); And 27b represents a negative side semiconductor switch element (it also is a transistor).In addition, in Fig. 5, label 28a represents a positive side diode; 28b represents a minus side diode; 29a represents a positive side transistor current detector; 29b represents a minus side transistor current detector; 30a represents a positive side transistor drive circuit; 30b represents a minus side transistor driver circuit; 31a represents a positive side transistor current foldback circuit; 31b represents a minus side transistor current foldback circuit; 32a represents that a positive side control supply power voltage reduces protective circuit; 32b represents that minus side control supply power voltage reduces protective circuit; 33 expressions, one Temperature Detector is in order to detect the temperature of semiconductor subassembly 20; 34 expressions, one overheating protection circuit; 35 expressions, one first logic sum gate circuit, as long as receive any one signal in the output signal of positive side transistor current foldback circuit 31a and positive side control supply power voltage protective circuit 32a, this OR circuit just produces an output signal; And 36 expressions, one second logic sum gate circuit, as long as receive any one signal in the output signal of minus side transistor current foldback circuit 31b and minus side control supply power voltage protective circuit 32b, this OR circuit just produces an output signal.
In the common semiconductor subassembly of so forming 20, the control signal of not connecting positive side transistor 27a and minus side transistor 27b is simultaneously delivered to positive side signal input end and minus side signal input end respectively, thereby transistor 27a and 27b are alternately switched on and off by positive side transistor drive circuit 30a and minus side transistor driver circuit 30b, utilize alternating current to flow through transistor and provide AC power at ac power output 26.
In this working method, the electric current that flows in positive side transistor 27a and minus side transistor 27b is detected by positive side current detector 29a and minus side current detector 29b respectively.By positive side current foldback circuit 31a and minus side current foldback circuit 31b determine so to detect electric current whether unusual, promptly whether surpass a predetermined value.In case it is unusual to detect overcurrent, positive side current foldback circuit 31a (or minus side current foldback circuit 31b) just delivers to the positive side transistor drive circuit 30a (or minus side transistor driver circuit 30b) that is attached thereto to an abnormal signal.According to receiving abnormal signal, positive side transistor drive circuit 30a (or minus side transistor driver circuit 30b) just disconnect positive side transistor 27a (or minus side transistor 27b) to cut off its electric current no matter add to the control signal of positive side (or minus side) signal input end 23a (or 23b).Meanwhile, positive side current foldback circuit 31a (or minus side current foldback circuit 31b) delivers to positive side abnormal signal output 24a (or minus side abnormal signal output 24b) to abnormal signal by the first logic sum gate element 35 (or second logic sum gate element 36).
On the other hand; be added in the control supply power voltage between positive side control power end 21a and the positive side control common port 22a and be added in minus side control power end 21b and minus side control common port 22b between the control supply power voltage reduce protective circuit 32a and minus side control supply power voltage by positive side control supply power voltage respectively and reduce protective circuit 32b and read, thereby determine whether the control supply power voltage is unusual less than a predetermined value.In case the control supply power voltage takes place to be reduced unusually; similar to the mode of above-mentioned detection overcurrent, positive side control supply power voltage reduces protective circuit 32a (or minus side control supply power voltage reduces protective circuit 32b) abnormal signal is delivered to positive side transistor drive circuit 30a (or load transistor drive circuit 30b).According to the abnormal signal that receives, positive side transistor drive circuit 30a (or minus side transistor driver circuit 30b) disconnect positive side transistor 27a (or minus side transistor 27b) to cut off electric current no matter deliver to the control signal of positive side (or minus side) signal input end 23a (or 23b).Meanwhile, positive side control supply power voltage reduces protective circuit 32a (or minus side control supply power voltage reduces protective circuit 32b) and by the first logic sum gate element 35 (or second logic sum gate element 36) abnormal signal is delivered to positive side abnormal signal output 24a (or minus side abnormal signal output 24b).
The temperature of semiconductor subassembly 20 is detected by Temperature Detector 33.Overheating protection circuit 34 determine so to detect temperature whether surpass a predetermined value and be unusual.In case detect heat anomaly, overheating protection circuit 34 is just delivered to minus side transistor driver circuit 30b to an abnormal signal.According to the abnormal signal that receives, minus side transistor driver circuit 30b disconnect minus side transistor 27b to cut off electric current no matter add to the control signal of minus side signal input end 23b.Meanwhile, overheating protection circuit 34 is delivered to minus side abnormal signal output 24b to abnormal signal by the second logic sum gate element 36.
As described above, in common semiconductor subassembly, for detect overcurrent, the control supply power voltage reduces and overheated these three kinds of abnormal conditions, be respectively detect electric current, voltage and temperature and predetermined value make comparisons, with definite these detect value whether unusual; And in case determine among electric current, voltage and the temperature any one and have when unusual, eliminate abnormal conditions with regard to the output abnormality signal.Yet this semiconductor subassembly has such problem, promptly can't discern special abnormal conditions by the abnormal signal of output.
Made the present invention for eliminating the problems referred to above that common semiconductor subassembly brings.Therefore, an object of the present invention is to provide a kind of semiconductor subassembly, in this assembly, detect overcurrent, the control supply power voltage reduces and overheated these three kinds of abnormal conditions, and export different abnormal signals according to abnormal conditions separately and protect relevant devices.
Another object of the present invention is to provide a kind of method that detects abnormal conditions for the inverter that comprises this semiconductor subassembly.
The aforesaid purpose of the present invention can reach by a kind of semiconductor subassembly is provided, and this assembly comprises:
Abnormal condition detecting device is in order to the overcurrent that detects in a plurality of thyristors any one or all elements with the control supply power voltage reduces and in order to detect the overheated of semiconductor subassembly; And
The abnormal signal generating means, in order to according to by abnormal condition detecting device detect abnormal conditions separately produce different abnormal signals.
The aforesaid purpose of the present invention can reach by a kind of semiconductor subassembly is provided, and this assembly comprises:
One first abnormal condition detecting device reduces in order to overcurrent and the control supply power voltage that detects one first thyristor;
One second abnormal condition detecting device reduces in order to overcurrent and the control supply power voltage that detects one second thyristor, and in order to detect the overheated of semiconductor subassembly;
One first abnormal signal generating means, in order to according to by first abnormal condition detecting device detect abnormal conditions separately produce different abnormal signals; And
One second abnormal signal generating means, in order to according to by second abnormal condition detecting device detect abnormal conditions separately produce different abnormal signals.
By in an inverter, adopting a kind of method that detects abnormal conditions also can reach aforesaid purpose, wherein,
When any one or all the element overcurrent in a plurality of thyristors that detect a semiconductor subassembly that constitutes inverter, output first abnormal signal correspondingly just,
When any one or all the element control supply power voltages in detecting a plurality of thyristors reduce, just export second abnormal signal correspondingly, and
When detecting semiconductor subassembly when overheated, output the 3rd abnormal signal correspondingly just.
Fig. 1 shows the block diagram of a kind of semiconductor subassembly internal structure that constitutes one embodiment of the invention;
Fig. 2 shows the block diagram that comprises according to a kind of inverter structure of semiconductor subassembly of the present invention;
Fig. 3 (a)-3 (c) shows when abnormal conditions take place in semiconductor subassembly, the sketch of the different abnormal signal that produces at the abnormal signal output of this assembly;
Fig. 4 is used to describe the flow chart that the most distinctive abnormal signal of the present invention produces the course of work of part; And
Fig. 5 shows the block diagram of common semiconductor subassembly internal structure.(first embodiment)
Fig. 1 shows a kind of block diagram of semiconductor subassembly internal structure, and this assembly has constituted first embodiment of the present invention.In Fig. 1, label 50 expression semiconductor subassemblies; 51 expressions, one first abnormal conditions test section, it comprises that a positive side current foldback circuit 31a and a positive side control supply power voltage reduce protective circuit 32a; 52 expressions, one second abnormal conditions test section, it comprises that a minus side current foldback circuit 31b, minus side control supply power voltage reduce a protective circuit 32b and an overheating protection circuit 34; 53 expressions, one first abnormal signal generation part, it receives positive side current foldback circuit 31a and positive side is controlled the output signal of output signal to produce as to describe below that supply power voltage reduces protective circuit 32a; And 54 expressions, one second abnormal signal generation part, it is a part with characteristic of the present invention.This part 54 receives minus side current foldback circuit 31b, minus side is controlled the output signal that supply power voltage reduces protective circuit 32b and overheating protection circuit 34, with the output signal that produces as describe below.Because other parts are identical with those parts in the common semiconductor subassembly that is shown in Fig. 5, so omitted description to these parts.
In first embodiment, overheating protection circuit 34 is parts of the second abnormal conditions test section 52.Yet it also can be the part of the first abnormal conditions test section 51 rather than the second abnormal conditions test section 52, perhaps can be included in it simultaneously among the first and second abnormal conditions test sections 51 and 52.
Fig. 2 shows the block diagram of an inverter structure, includes according to semiconductor subassembly of the present invention in this inverter.In Fig. 2, label 10a, 10b and 10c represent the power input of inverter; 11 expressions one are as the diode bridge of rectifier part; 12 expressions, one filtering capacitor; 50a, 50b and 50c represent to be shown in detail in the semiconductor subassembly of Fig. 1; 26a, 26b and 26c represent the ac power output of inverter; Microcomputer in the 13 expression inverters; 14a to 14l represents isolated amplifier; And 15 be one to be used for from the output of inverter output abnormality signal, for example electric terminal or such as display parts such as light-emitting diode monitors.
In being shown in the inverter of Fig. 2, the AC power that adds to power input 10a-10c becomes DC power supply by diode bridge 11 rectifications and by filtering capacitor 12 filtering.On the other hand, microcomputer is delivered to control signal by isolated amplifier 14a to 14f positive side signal input end 23a and the minus side signal input end 23b of three semiconductor subassembly 50a, 50b and 50c, the result, in those semiconductor subassemblies, it (is transistor in the present embodiment that six thyristors are arranged, but they do not illustrate in the drawings) be switched, thus make described DC power supply convert AC power to required frequency and required voltage.AC power is by output 26a, 26b and 26c output.
In this working method, the working condition of each is as follows among semiconductor subassembly 50a, 50b and the 50c.Each all design as shown in Figure 1 among the semiconductor subassembly 50a to 50c.Therefore, according to the control signal of delivering to positive side and minus side signal input end 23a and 23b, switch positive side and minus side transistor 27a and 27b respectively by positive side and minus side transistor driver circuit 30a and 30b, the result produces alternating currents at ac power output 26.
Electric current that flows in positive side transistor 27a and the electric current that flows in minus side transistor 27b are detected by positive side current detector 29a and minus side current detector 29b respectively.And by positive side current foldback circuit 31a and minus side current foldback circuit 31b judge detect thus electric current whether unusual, promptly whether surpass a predetermined value.When detecting when unusual, positive side current foldback circuit 31a (or minus side current foldback circuit 31b) delivers to positive side transistor drive circuit 30a (or minus side transistor driver circuit 30b) to an abnormal signal.According to the abnormal signal that receives; positive side transistor drive circuit 30a (or minus side transistor driver circuit 30b) disconnects positive side transistor 27a (or minus side transistor 27b) to be cut off electric current and no matter deliver to the control signal of positive side (or minus side) signal input end 23a (or 23b), realizes overcurrent protection thus.Simultaneously, positive side current foldback circuit 31a (or minus side current foldback circuit 31b) delivers to the first abnormal signal generation part to abnormal signal, promptly positive side abnormal signal generation circuit 53 (or the second abnormal signal generation part, promptly minus side abnormal signal generation circuit 54).Produce a pulse duration (duration) as Fig. 3 (a) shown at circuit 53 or 54 places and be 1 millisecond pulse signal, as indicating the overcurrent anomalous signals.The pulse signal is added to positive side abnormal signal output 24a (or minus side abnormal signal output 24b).
On the other hand, be added in the control supply power voltage between positive side control power end 21a and the positive side control common port 22a and be added in control supply power voltage between minus side control power end 21b and the minus side control common port 22b and reduce protective circuit 32a and minus side by positive side control supply power voltage respectively and control supply power voltage minimizing protective circuit 32b and read.Whether the result determines whether the control supply power voltage is unusual, promptly less than a predetermined value.(or minus side control supply power voltage reduces protective circuit 32b) judges that the control supply power voltage is unusual if positive side control supply power voltage reduces protective circuit 32a; then similar with the unusual situation of above-mentioned overcurrent, positive side control supply power voltage reduces protective circuit 32a (or minus side control supply power voltage reduces protective circuit 32b) abnormal signal is delivered to positive side transistor drive circuit 30a (or minus side transistor driver circuit 30b).According to the abnormal signal that receives; positive side transistor drive circuit 30a (or minus side transistor driver circuit 30b) disconnects positive side transistor 27a (or minus side transistor 27b) to be cut off electric current and no matter deliver to the control signal of positive side (or minus side) signal input end 23a (or 23b), realizes that thus the control supply power voltage reduces protection.
Meanwhile, positive side control supply power voltage reduces protective circuit 32a (or minus side control supply power voltage reduces protective circuit 32b) abnormal signal is delivered to positive side abnormal signal generation circuit 53 (or minus side abnormal signal generation circuit 54).Produce a pulse duration (duration) as Fig. 3 (b) shown at circuit 53 or 54 places and be 2 milliseconds pulse signal, control reducing of supply power voltage as indication.The pulse signal is delivered to positive side abnormal signal output 24a (or minus side abnormal signal output 24b).
The temperature of each semiconductor subassembly 50 is detected by Temperature Detector 33.Overheating protection circuit 34 determine so to detect temperature whether unusual, promptly whether surpass a predetermined value.If the temperature anomaly of determining, then overheating protection circuit 34 is delivered to minus side transistor driver circuit 30b to an abnormal signal.Minus side transistor driver circuit 30b responds to this abnormal signal, and minus side transistor 27b is disconnected to cut off electric current no matter deliver to the control signal of minus side signal input end 23b, realizes overtemperature protection thus.
Meanwhile, overheating protection circuit 34 is delivered to negative terminal abnormal signal generation circuit 54 to abnormal signal.This circuit pulse duration of output (duration) is 3 milliseconds pulse, shown in Fig. 3 (C).This is pointed out that overheated anomalous signals delivers to minus side abnormal signal output 24b.
The positive side of semiconductor subassembly 50a, 50b and 50c and minus side abnormal signal output 24a and 24b are connected to the microcomputer 13 of inverter by isolated amplifier 14g to 14l.Therefore; according to the abnormal signal that receives from semiconductor subassembly 50a to 50c; microcomputer 13 work; protect inverter by the way of suspending the output control signal; otherwise control signal will be delivered to the positive side of three semiconductor subassembly 50a to 50c and minus side signal input end 23a and 23b to switch positive side and minus side transistor 27a and 27b by isolated amplifier 14a to 14f.
Meanwhile, microcomputer 13 is discerned abnormal conditions according to abnormal signal.For example, shown in Fig. 3 a, having 1 millisecond pulse duration (duration) according to pulse, to be identified as overcurrent unusual.Equally, shown in Fig. 3 b, it is 2 milliseconds and that abnormal conditions are identified as undercurrent is unusual by pulse duration (duration).Overheat condition has been described by Fig. 3 c.The unusual content of so being discerned is delivered to output 15, thus by inverter by output (it be electric terminal or such as display parts such as LED monitors) output.
Further describe the above-mentioned course of work that part (being minus side abnormal signal generation circuit 54) detection abnormal conditions take place by second abnormal signal referring to Fig. 4.When minus side abnormal signal generation circuit 54 detect during abnormal conditions (S1), semiconductor subassembly 50a, the positive side of each assembly among 50b and the 50c and minus side transistor 27a and 27b are disconnected (S2).Next judge whether detected abnormal conditions are overcurrent unusual (S3).If judging detected abnormal conditions is overcurrents, then abnormal signal (it is that pulse duration (duration) is 1 millisecond a pulse signal) is delivered to abnormal signal output 24b (S4).In response to abnormal signal by abnormal signal output 24b output, time-out provides control signal by microcomputer 13 to positive side and minus side signal input end 23a and 23b, stop the work of positive side and minus side transistor 27a and 27b thus, simultaneously the overcurrent abnormal conditions are shown (S5) on the display part.
If detected abnormal conditions are not that overcurrent is unusual, judge again then whether these abnormal conditions are that the control supply power voltage reduces (S6).If judging abnormal conditions is that control power supply electricity reduces, then abnormal signal (it is that pulse duration (duration) is 2 milliseconds a pulse signal) is delivered to abnormal signal output 24b (S7).In response to abnormal signal by abnormal signal output 24b output, time-out provides signal by microcomputer 13 to positive side and minus side signal input end 23a and 23b, thereby positive side and minus side transistor 27a and 27b are quit work, simultaneously the control supply power voltage is reduced to be shown unusually (S8) on the display part.
Supply power voltage does not reduce if detected abnormal conditions are not control, and then it must be overheated.Therefore to minus side abnormal signal output provide abnormal signal (it be pulse duration (duration is 3 milliseconds a pulse signal) (S9).In response to abnormal signal by abnormal signal output 24b output, time-out provides control signal by microcomputer 13 to positive side and minus side signal input end 23a and 23b, stop the work of positive side and minus side transistor 27a and 27b thus, simultaneously overheated abnormal show (S10) on the display part.Minus side abnormal signal generation circuit 54 is worked in a manner described.(second embodiment)
In above-mentioned first embodiment, unusual for overcurrent, be that 1 millisecond pulse signal is exported as abnormal signal having pulse duration (duration); Reducing unusually for the control supply power voltage, is that 2 milliseconds pulse signal is exported as abnormal signal having pulse duration (duration); And for crossing heat anomaly, be that 3 milliseconds pulse signal is exported as abnormal signal having pulse duration (duration).Yet therefore the present invention is not restricted.That is, for pointing out various abnormal conditions, can adopt any can with different amplitudes, frequency, phase place etc. mutually the signal of difference as abnormal signal.
Not not therefore and restricted moreover though in above-mentioned first embodiment, provide an abnormal signal output for each transistor, the present invention yet.Can provide a plurality of abnormal signal outputs, thereby abnormal signal can be distinguished with some binary digits mutually.
In addition, though in above-mentioned first embodiment, semiconductor subassembly has two transistors, and transistorized number can be unrestricted.
In general, because of in the abnormal signal generating means being reduces to produce different abnormal signals with abnormal conditions separately such as overheated according to overcurrent, control supply power voltage, therefore, the abnormal conditions in the semiconductor subassembly can be identified in exactly, thereby abnormal conditions can be promptly eliminated.
Simultaneously, in semiconductor subassembly, the first and second abnormal signal generating meanss are to reduce and abnormal conditions separately such as overheated produce different abnormal signals according to overcurrent, control supply power voltage, therefore just can more promptly discern and deal with abnormal conditions.
In the method for the abnormal conditions that detect an inverter,, just can prevent or reduce its adverse effect according to the present invention to associated equipment when overcurrent in inverter can be accurately identified and be dealt with rapidly unusually.
Claims (9)
1. be used for control inverter, contain a kind of semiconductor subassembly of a plurality of thyristors, it is characterized in that, comprising:
Abnormal condition detecting device is used for detecting any one or all switch element overcurrent of described a plurality of thyristors or control supply power voltage and reduces overheated with described semiconductor subassembly; And
The abnormal signal generating means, in order to according to by described abnormal condition detecting device detect abnormal conditions separately produce different abnormal signals.
2. semiconductor subassembly as claimed in claim 1 is characterized in that, described abnormal signal generating means produces multiple abnormal signal, and according to abnormal conditions separately, every kind of signal has the different duration.
3. semiconductor subassembly as claimed in claim 1 is characterized in that, described abnormal signal generating means produces multiple abnormal signal, and according to abnormal conditions separately, every kind of signal comprises different digital values.
4. be used for control inverter, have the semiconductor subassembly of one first thyristor and one second thyristor at least, it is characterized in that, comprising:
One first abnormal condition detecting device reduces in order to overcurrent and the control supply power voltage that detects described first thyristor;
One second abnormal condition detecting device reduces and described semiconductor subassembly overheated in order to the overcurrent that detects described second thyristor and control supply power voltage;
One first abnormal signal generating means, in order to according to by described first abnormal condition detecting device detect described abnormal conditions separately produce different abnormal signals; And
One second abnormal signal generating means, in order to according to by described second abnormal condition detecting device detect described abnormal conditions separately produce different abnormal signals.
5. semiconductor subassembly as claimed in claim 4 is characterized in that, each described abnormal signal generating means produces multiple abnormal signal, and according to abnormal conditions separately, every kind of signal has the different duration.
6. semiconductor subassembly as claimed in claim 4 is characterized in that, each described abnormal signal generating means produces multiple abnormal signal, and according to abnormal conditions separately, every kind of signal comprises different digital values.
7. method that detects abnormal conditions in the inverter, this inverter comprises that one contains the semiconductor subassembly of a plurality of semiconductor switchs, in order to control an associated equipment, detect any one in a plurality of thyristors described in this inverter or all switch elements overcurrent and the control supply power voltage reduces and described semiconductor subassembly overheated, its characteristics are:
When the overcurrent of any one or all element that detects described a plurality of thyristors, output first abnormal signal correspondingly,
When the control supply power voltage of any one or all element that detects described a plurality of thyristors reduces, output second abnormal signal correspondingly, and
When detecting described semiconductor subassembly overheated, output the 3rd abnormal signal correspondingly,
It is characterized in that each in described first, second and the 3rd abnormal signal is unique for other described abnormal signal.
8. detection method as claimed in claim 7 is characterized in that, described first, second with the 3rd abnormal signal in each all have one with the corresponding different duration of separately abnormal conditions.
9. detection method as claimed in claim 7 is characterized in that, described first, second with the 3rd abnormal signal in each all comprise one with the corresponding different digital value of separately abnormal conditions.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP224791/94 | 1994-09-20 | ||
| JP6224791A JPH0898505A (en) | 1994-09-20 | 1994-09-20 | Semiconductor compound element and method for detecting failure of inverter device with semiconductor compound element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1119359A true CN1119359A (en) | 1996-03-27 |
| CN1039269C CN1039269C (en) | 1998-07-22 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN95100274A Expired - Fee Related CN1039269C (en) | 1994-09-20 | 1995-01-20 | Semiconductor composite element, and method of detecting abnormal conditions in an inverter device having the element |
Country Status (6)
| Country | Link |
|---|---|
| JP (1) | JPH0898505A (en) |
| KR (1) | KR100193949B1 (en) |
| CN (1) | CN1039269C (en) |
| DE (1) | DE19501373A1 (en) |
| GB (1) | GB2293505B (en) |
| HK (1) | HK1010003A1 (en) |
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| CN101382585B (en) * | 2007-09-07 | 2011-01-26 | 比亚迪股份有限公司 | Test method, apparatus and generator for inverter in generator |
| CN102751856A (en) * | 2012-07-19 | 2012-10-24 | 成都芯源系统有限公司 | Multiphase switching converter with overcurrent protection function and control method thereof |
| CN109143109A (en) * | 2017-06-26 | 2019-01-04 | 蔚来汽车有限公司 | Electric vehicle inverter fault detection and processing method, device and storage medium |
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| US5712802A (en) * | 1996-04-16 | 1998-01-27 | General Electric Company | Thermal protection of traction inverters |
| DE19855370A1 (en) * | 1998-12-01 | 2000-06-15 | Bosch Gmbh Robert | Protection circuit for a power semiconductor |
| JP3635988B2 (en) * | 1999-05-27 | 2005-04-06 | 富士電機デバイステクノロジー株式会社 | Semiconductor device |
| US7180758B2 (en) | 1999-07-22 | 2007-02-20 | Mks Instruments, Inc. | Class E amplifier with inductive clamp |
| US6469919B1 (en) | 1999-07-22 | 2002-10-22 | Eni Technology, Inc. | Power supplies having protection circuits |
| JP4344542B2 (en) * | 2003-05-30 | 2009-10-14 | 田淵電機株式会社 | Inverter power control circuit for high frequency heating equipment |
| JP4701052B2 (en) * | 2005-09-21 | 2011-06-15 | 矢崎総業株式会社 | Overcurrent detection device |
| US8344801B2 (en) | 2010-04-02 | 2013-01-01 | Mks Instruments, Inc. | Variable class characteristic amplifier |
| US8400739B2 (en) * | 2011-02-28 | 2013-03-19 | General Electric Company | System and method for operating inverters |
| JP6824142B2 (en) | 2017-11-22 | 2021-02-03 | 三菱電機株式会社 | Power semiconductor modules and power converters |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3646398A (en) * | 1970-07-16 | 1972-02-29 | Gen Electric | Static switch protective circuit activated by shorted commutation thyrister |
| US4052659A (en) * | 1976-11-15 | 1977-10-04 | Nasa | Overload protection system for power inverter |
| JP2782601B2 (en) * | 1986-06-24 | 1998-08-06 | インターナショナル・ビジネス・マシーンズ・コーポレーション | Power control fault isolation indicator |
| DD271404A1 (en) * | 1988-03-31 | 1989-08-30 | Numerik Karl Marx Karlmarx Sta | CIRCUIT ARRANGEMENT FOR THE COMPLETE OVERLOAD PROTECTION OF SHUT-OFF SEMICONDUCTOR COMPONENTS IN CONTROL UNITS FOR ELECTRICAL DRIVES |
| GB2264204B (en) * | 1988-11-17 | 1993-11-03 | Honda Motor Co Ltd | DC resistance welding apparatus |
| JPH0494956A (en) * | 1990-08-13 | 1992-03-27 | Brother Ind Ltd | Indicator for recording device |
| GB2267190A (en) * | 1992-05-15 | 1993-11-24 | Ind Tech Res Inst | Circuit breaker with current range indicator |
-
1994
- 1994-09-20 JP JP6224791A patent/JPH0898505A/en active Pending
- 1994-12-23 GB GB9426168A patent/GB2293505B/en not_active Expired - Fee Related
-
1995
- 1995-01-17 KR KR1019950000696A patent/KR100193949B1/en not_active IP Right Cessation
- 1995-01-18 DE DE19501373A patent/DE19501373A1/en not_active Withdrawn
- 1995-01-20 CN CN95100274A patent/CN1039269C/en not_active Expired - Fee Related
-
1998
- 1998-09-17 HK HK98110678A patent/HK1010003A1/en not_active IP Right Cessation
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1306674C (en) * | 2000-03-17 | 2007-03-21 | St微电子公司 | Automatic restoring failure system for converter |
| CN101382585B (en) * | 2007-09-07 | 2011-01-26 | 比亚迪股份有限公司 | Test method, apparatus and generator for inverter in generator |
| CN102751856A (en) * | 2012-07-19 | 2012-10-24 | 成都芯源系统有限公司 | Multiphase switching converter with overcurrent protection function and control method thereof |
| CN109143109A (en) * | 2017-06-26 | 2019-01-04 | 蔚来汽车有限公司 | Electric vehicle inverter fault detection and processing method, device and storage medium |
Also Published As
| Publication number | Publication date |
|---|---|
| KR100193949B1 (en) | 1999-06-15 |
| GB9426168D0 (en) | 1995-02-22 |
| JPH0898505A (en) | 1996-04-12 |
| DE19501373A1 (en) | 1996-03-28 |
| GB2293505B (en) | 1998-11-11 |
| GB2293505A (en) | 1996-03-27 |
| KR960012647A (en) | 1996-04-20 |
| CN1039269C (en) | 1998-07-22 |
| HK1010003A1 (en) | 1999-06-11 |
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