CN111857918A

CN111857918A - 2D desktop PorterDuff implementation method and device

Info

Publication number: CN111857918A
Application number: CN202010659165.5A
Authority: CN
Inventors: 杨盼
Original assignee: Changsha Jingmei Integrated Circuit Design Co ltd; Changsha Jingjia Microelectronics Co ltd
Current assignee: Changsha Jingmei Integrated Circuit Design Co ltd; Changsha Jingjia Microelectronics Co ltd
Priority date: 2020-07-09
Filing date: 2020-07-09
Publication date: 2020-10-30

Abstract

A2D desktop porterduff realization method and a device thereof comprise: blocking pixels to be subjected to a PorterDuff operation; a PorterDuff operation is performed for each pixel using a plurality of PorterDuff units. By adopting the scheme in the application, through the independent implementation scheme of the PorterDuff operation of the 2D desktop, the PorterDuff operation of the 2D desktop is simply and quickly realized, the finally synthesized color value is synchronously output, the hardware resource occupation is less, the performance is extremely high, the method is not limited by a complex 3D application scene, and the smooth display effect of the 2D desktop is achieved.

Description

2D desktop PorterDuff implementation method and device

Technical Field

The application relates to a GPGPU technology, in particular to a method and a device for realizing a 2D desktop PorterDuff in a GPGPU and a graphics processor.

Background

Operating systems are classified into desktop operating systems, server operating systems, and embedded operating systems according to their application fields. The desktop operating system is most commonly applied, the basic function of the desktop operating system is to realize human-computer interaction, and smooth desktop window display effect is pursued in the human-computer interaction process, so that friendly experience is brought.

At present, mainstream desktop operating systems include MAC OS, LINUX, WINDOWS, Chinese-made standard-winning kylin, Galaxy kylin, UOS desktop systems and the like, and the pixel operation is characterized by huge data volume and extremely frequent operation times.

The 2D desktop is usually directly realized by software, the performance of the 2D desktop greatly depends on the CPU performance, and in order to get rid of the complete dependence on the CPU, hardware acceleration is realized by a General-purpose graphics processing unit (GPGPU).

However, in some application scenarios, the 2D desktop may be stuck while occupied by the GPGPU drawing engine for the responsible 3D drawing.

Problems existing in the prior art:

under the scene that the GPGPU drawing engine is occupied by 3D drawing, the 2D desktop is blocked when in use.

Disclosure of Invention

The embodiment of the application provides a method and a device for realizing a 2D desktop PorterDuff in a GPGPU (graphics processing Unit), and a graphics processor, so as to solve the technical problem.

According to a first aspect of the embodiments of the present application, a method for implementing a 2D desktop PorterDuff in a GPGPU is provided, which includes the following steps:

blocking pixels to be subjected to a PorterDuff operation;

a PorterDuff operation is performed for each pixel using a plurality of PorterDuff units.

According to a second aspect of the embodiments of the present application, there is provided a 2D desktop PorterDuff implementation apparatus in a GPGPU, including: a dispatch component and a plurality of PorterDuff components, wherein,

The dispatching component is used for blocking the pixels to be subjected to the PorterDuff operation and dispatching a PorterDuff command to the PorterDuff components;

each PorterDuff component is used for carrying out PorterDuff operation on the pixel block corresponding to the received PorterDuff command.

According to a third aspect of embodiments of the present application, there is provided a graphics processor comprising a network on chip NOC, a command parsing module, and a 2D desktop PorterDuff implementation as described above; the network on chip is used for interconnecting all modules; the command analysis module is used for analyzing the acquired PorterDuff command.

By adopting the implementation method and device for the PorterDuff operation of the 2D desktop in the GPGPU and the graphic processor, the PorterDuff operation of the 2D desktop is simply and rapidly implemented through an independent implementation scheme for the PorterDuff operation of the 2D desktop, the finally synthesized color values are synchronously output, the hardware resources are less in occupation, the performance is extremely high, the method and device are not limited by complex 3D application scenes, and the smooth display effect of the 2D desktop is achieved.

Drawings

The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:

Fig. 1 shows a schematic flowchart of implementation of a 2D desktop PorterDuff implementation method in a GPGPU according to an embodiment of the present application;

FIG. 2 is a diagram illustrating a relative relationship between PorterDuff operations according to an embodiment of the present application;

fig. 3 shows a schematic structural diagram of a 2D desktop PorterDuff implementation apparatus in a GPGPU in the second embodiment of the present application;

FIG. 4 is a diagram illustrating a structure of a graphics processor according to a third embodiment of the present application;

fig. 5 is a schematic structural diagram illustrating a 2D desktop PorterDuff implementation apparatus in a GPGPU in the fourth embodiment of the present application;

FIG. 6 shows a diagram of a PorterDuff chunking adaptive strategy in the fourth embodiment of the present application;

fig. 7 is a diagram illustrating the results of Lighten operation in the fourth embodiment of the present application.

Detailed Description

In order to make the technical solutions and advantages of the embodiments of the present application more apparent, the following further detailed description of the exemplary embodiments of the present application with reference to the accompanying drawings makes it clear that the described embodiments are only a part of the embodiments of the present application, and are not exhaustive of all embodiments. It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.

Example one

Fig. 1 shows a flowchart illustrating implementation of a 2D desktop PorterDuff implementation method in a GPGPU according to an embodiment of the present application.

As shown in the figure, the method for implementing the 2D desktop PorterDuff in the GPGPU includes:

step 101, partitioning pixels to be subjected to PorterDuff operation into blocks;

step 102, performing a PorterDuff operation on each pixel using a plurality of PorterDuff components.

In specific implementation, the embodiment of the application supports the PorterDuff operation to perform the PorterDuff operation on the two object composition operations.

Fig. 2 is a schematic diagram illustrating a relative relationship of PorterDuff operation in the first embodiment of the present application.

As shown in the figure, the following 16 operations are specifically included:

CLEAR draws are not submitted on canvas (background);

SRC displays upper (source bitmap) rendered pictures;

DST displays the lower (target bitmap) drawing picture;

the SRC _ OVER is normally drawn and displayed, and the upper layer and the lower layer are drawn to be overlapped;

the upper and lower layers of DST _ OVER are shown. The lower layer is displayed on the top;

SRC _ IN takes the two layers to draw the intersection. Displaying an upper layer;

SRC _ OUT takes the two layers to draw an intersection. Displaying the lower layer;

taking a non-intersection part of upper drawing by the DST _ IN;

taking down a non-intersection part of the drawing of the lower layer by the DST _ OUT;

SRC _ ATOP takes the non-intersection part of the lower layer and the intersection part of the upper layer;

DST _ ATOP takes the non-intersection part of the upper layer and the intersection part of the lower layer;

XOR exclusive OR: removing the intersection part of the two layers;

darken takes all areas of the two layers, and the color of the intersection part is deepened;

lighten takes the whole of the two layers and lightens the color of the intersection part;

the color of the intersection part of the two layers is superposed by using Multiply;

screen takes the whole area of the two layers, and the intersection part becomes transparent.

By adopting the implementation method of the PorterDuff operation of the 2D desktop in the GPGPU, the PorterDuff operation of the 2D desktop is simply and quickly implemented through an independent implementation scheme of the PorterDuff operation of the 2D desktop, the hardware resource occupation is less, the performance is extremely high, the implementation method is not limited by a complex 3D application scene, and the smooth display effect of the 2D desktop is achieved.

In one embodiment, the blocking of pixels to be subjected to a PorterDuff operation includes:

get PorterDuff command; the PorterDuff command comprises the size of a pixel to be subjected to a PorterDuff operation;

dividing the pixel to be subjected to the PorterDuff operation into N blocks according to the size of the pixel to be subjected to the PorterDuff operation and the number N of PorterDuff components, and generating a PorterDuff command corresponding to the pixel block for each pixel; the PorterDuff command includes the address of the pixel block.

In one embodiment, the dividing the pixels to be subjected to the PorterDuff operation into N blocks includes:

the pixels to be subjected to the PorterDuff operation adopt adaptive partitioning, and when the number of the PorterDuff parts is eight, the pixels to be subjected to the PorterDuff operation are evenly distributed to the eight PorterDuff parts.

In one embodiment, the PorterDuff operation on each pixel with a plurality of PorterDuff components includes:

each PorterDuff component reads the source data of the pixel block that the PorterDuff component needs to perform the PorterDuff operation;

performing PorterDuff operation after pixel alignment according to the read source data;

performing color gamut conversion on each position point after the PorterDuff operation is executed;

and writing the pixels into the frame memory after alignment is carried out according to the initial address of the target object.

In one embodiment, each PorterDuff component reads source data from a memory or frame store and then writes to the dual port RAM.

In one embodiment, the source data is read using linear pixels or configurable block mode.

In one embodiment, the read source data includes a pixel block of a first object and a pixel block of a second object, and the performing a PorterDuff operation after performing pixel alignment according to the read source data includes:

Respectively carrying out pixel alignment on the pixel block of the first object and the pixel block of the second object;

and performing PorterDuff operation on the pixel blocks of the first object and the second object after pixel alignment to realize the synthesis of the first object and the second object.

Example two

Based on the same inventive concept, the embodiment of the application provides a device for realizing the PorterDuff of the 2D desktop in the GPGPU, the principle of the device for solving the technical problem is similar to the method for realizing the PorterDuff of the 2D desktop in the GPGPU, and repeated parts are not described again.

Fig. 3 shows a schematic structural diagram of a 2D desktop PorterDuff implementation apparatus in a GPGPU in the second embodiment of the present application.

As shown in the figure, the 2D desktop PorterDuff implementation apparatus in the GPGPU includes: a dispatch component and a plurality of PorterDuff components, wherein,

By adopting the device for realizing the PorterDuff operation of the 2D desktop in the GPGPU, the PorterDuff operation of the 2D desktop is simply and quickly realized through an independent implementation scheme of the PorterDuff operation of the 2D desktop, the hardware resource is less in occupation, the performance is extremely high, the device is not limited by a complex 3D application scene, and the smooth display effect of the 2D desktop is achieved.

In one embodiment, the PorterDuff component includes:

a source data reading unit for reading the source data of the pixel block which the PorterDuff part needs to perform the PorterDuff operation;

the alignment unit is used for carrying out pixel boundary alignment on the source data and the target data;

a PorterDuff unit for performing PorterDuff operation on the pixel-aligned data;

the color gamut conversion unit is used for performing color gamut conversion on each position point after the PorterDuff;

and the control unit is used for writing the pixels into the frame memory.

In one embodiment, the PorterDuff component further comprises:

a Random Access Memory (RAM) for storing source data of the pixel blocks;

and the buffer FIFO is used for storing the pixels after the PorterDuff operation is executed and starting the Burst operation when the pixels are not in an empty state.

In one embodiment, the dispatch component includes:

the command acquisition unit is used for acquiring a PorterDuff command; the PorterDuff command comprises the size of a pixel to be subjected to a PorterDuff operation;

the command dispatch unit is used for dividing the pixel to be subjected to the PorterDuff operation into N blocks according to the size of the pixel to be subjected to the PorterDuff operation and the number N of the PorterDuff components, generating a sub-PortDuff command corresponding to the pixel block for each pixel and dispatching the sub-PortDuff command to the PorterDuff components; the sub PorterDuff command includes the address of the pixel block.

EXAMPLE III

Based on the same inventive concept, the embodiment of the present application further provides a graphics processor, which is described below.

Fig. 4 is a schematic structural diagram illustrating a graphics processor according to a third embodiment of the present application.

As shown, the graphics processor includes a network on chip NOC, a command parsing module, and a 2D desktop PorterDuff implementation as described in embodiment two; the network on chip is used for interconnecting all modules; the command analysis module is used for analyzing the acquired PorterDuff command.

By adopting the graphic processor provided by the embodiment of the application, the PorterDuff operation of the 2D desktop is simply and quickly realized through the independent PorterDuff operation realization scheme of the 2D desktop, the hardware resource occupation is less, the performance is extremely high, the graphic processor is not limited by a complex 3D application scene, and the smooth 2D desktop display effect is achieved.

Example four

For the convenience of implementation of the present application, the light operation in the PorterDuff operation is taken as a specific example in the embodiments of the present application.

Fig. 5 shows a schematic structural diagram of a 2D desktop PorterDuff implementation apparatus in a GPGPU in the fourth embodiment of the present application.

As shown, the system comprises a command parsing module, a dispatching component, a PorterDuff engine, a NOC (Network-on-Chip), a GDDR (Double Data synchronous dynamic random access memory), wherein the PorterDuff engine comprises eight PorterDuff components, and each PorterDuff component comprises a PorterDuff unit, a byte alignment unit, a RAM, and a FIFO.

It is assumed that the operation to be performed in the embodiment of the present application is to synthesize the pixels of the first object and the second object, specifically, a Lighten operation, that is, taking all the areas of the two objects (each object serves as a layer), and lighting the color of the intersection.

In the embodiment of the application, the PorterDuff operation adopts block self-adaptive operation, the color key operation pixel quantity of 8 PorterDuff parts is averagely distributed, and the maximum utilization of bandwidth is ensured.

Fig. 6 shows a schematic diagram of a PorterDuff block adaptation strategy in the fourth embodiment of the present application.

As shown in the figure, the first object and the second object are respectively subjected to adaptive blocking, in this embodiment of the present application, the first object and the second object are both horizontally divided into 8 pixel blocks, the first block of the target object is obtained after the first blocks of the first object and the second object are synthesized, and the other blocks are the same.

The PorterDuff operation implementation process of the present application may include:

1. the command acquisition module acquires a command;

2. the command analysis module analyzes to obtain a PorterDuff command;

3. the dispatching component equally divides two pixels into 8 blocks;

4. the dispatching component dispatches the PorterDuff command of each pixel block to 8 PorterDuff components respectively;

for example:

sending the PorterDuff request and the address of the first pixel block of the first object and the second object to the first PorterDuff component;

Sending the PorterDuff request and the address of the second pixel block of the first object and the second object to a second PorterDuff component;

...

5. each PorterDuff component reads source data from the frame memory and writes the source data into the dual-port RAM;

6. the PorterDuff part reads source data of the dual-port RAM and carries out current pixel alignment;

for example: the read source data are aligned with 16-byte pixels, and aligned source data are obtained.

7. The PorterDuff component performs PorterDuff operation on the pixel-aligned data;

for example: and performing Lighten operation on the data after the pixel alignment and outputting.

As shown in the figure, a circle is a first object, a square is a second object, and the intersection of the circle and the square is lighted, that is, the color of the intersection is adjusted.

8. The PorterDuff part performs corresponding color gamut conversion on the calculated data;

for example: the operated data is gamut converted to a source data format, such as rgb565, and after gamut conversion, the gamut is gamut converted to a target color format argb 8888.

9. After the pipelining conversion of each PorterDuff component, aligning according to the initial address of the target object;

For example: assuming that the starting address of the target object is an arbitrary byte address, 16 bytes of pixels are aligned to obtain a target pixel of full flow.

10. The PorterDuff component writes the pixels into the FIFO;

in one embodiment, the write frame store Burst operation may be directly initiated when the FIFO is not empty, where the Burst operation may also achieve full pipelining performance if the memory bandwidth is sufficient.

11. The PorterDuff component initiates the write frame save operation.

In one embodiment, the write frame store operation is generated directly by the control unit of the PorterDuff block, with the corresponding Burst operation, and the byte mask controls the write frame store.

Each PorterDuff unit outputs 4 pixels, and 8 PorterDuff units per cycle can output 32 pixels (RGBA, 32 bit). The whole PorterDuff process is simple and efficient, and the 2D desktop fluency in a complex 3D application scene is greatly accelerated.

This application has following advantage:

1. the performance is extremely high: the multi-component implementation of the PorterDuff operation provided by the embodiment of the application adopts a pipelining manner to implement and a high-efficiency Burst manner to write the frame memory, each PorterDuff component only needs to perform pipelining operation according to a target starting address, and the pipelining operation comprises reading pixels from a RAM, two-stage cache alignment, two-stage pipelining executing the portduff operation, and pipelining writing back the frame memory. Burst operation of each component can reach 128 × 256 bits, and compared with 1024 × 768 display resolution, one row of pixels can be operated continuously at a time;

2. The logic resources are few: the PorterDuff operation supported by the embodiment of the application occupies less resources, and has high efficiency and relatively simple circuit structure;

3. the reusability is strong: the embodiment of the application is realized by adopting independent 2D desktop PorterDuff operation, the command receiving modes comprise three modes, a bus write command fifo is configured, or a ringbuffer mode for actively reading the command from a memory and a frame memory is adopted, a standard internal storage bus interface is adopted for accessing the frame memory, the reusability is strong, and the device can be repeatedly used in the design of a high-performance general graphic chip of a GPGPU.

As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein. The scheme in the embodiment of the application can be implemented by adopting various computer languages, such as object-oriented programming language Java and transliterated scripting language JavaScript.

The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all alterations and modifications as fall within the scope of the application.

It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

Claims

1. A2D desktop PorterDuff implementation method is characterized by comprising the following steps:

Blocking pixels to be subjected to a PorterDuff operation;

2. The method of claim 1, wherein blocking pixels to be subjected to a PorterDuff operation comprises:

dividing the pixel to be subjected to the PorterDuff operation into N blocks according to the size of the pixel to be subjected to the PorterDuff operation and the number N of PorterDuff components, and generating a sub-PortDuff command corresponding to the pixel block for each pixel; the sub PorterDuff command includes the address of the pixel block.

3. The method of claim 2, wherein the dividing the pixels to perform the PorterDuff operation into N blocks comprises:

4. The method of claim 1, wherein performing a PorterDuff operation on each pixel using a plurality of PorterDuff components comprises:

5. The method of claim 4, wherein the read source data comprises pixel blocks of a first object and pixel blocks of a second object, and wherein performing the PorterDuff operation after performing the pixel alignment according to the read source data comprises:

6. A2D desktop PorterDuff implementation device, comprising: a dispatch component and a plurality of PorterDuff components, wherein,

7. The apparatus of claim 6, wherein the PorterDuff component comprises:

and the control unit is used for writing the pixels into the frame memory.

8. The apparatus of claim 7, wherein the PorterDuff component further comprises:

a Random Access Memory (RAM) for storing source data of the pixel blocks;

9. The apparatus of claim 6, wherein the dispatch component comprises:

the command dispatch unit is used for dividing the pixel to be subjected to the PorterDuff operation into N blocks according to the size of the pixel to be subjected to the PorterDuff operation and the number N of the PorterDuff components, generating a PorterDuff command corresponding to the pixel block for each pixel and dispatching the PorterDuff command to the PorterDuff components; the PorterDuff command includes the address of the pixel block.

10. A graphics processor comprising a network on chip NOC, a command parsing module, and a 2D desktop PorterDuff implementation apparatus as claimed in any one of claims 6 to 9; the network on chip is used for interconnecting all modules; the command analysis module is used for analyzing the acquired PorterDuff command.