CN111857584A - Writing speed control method and device, electronic equipment and storage medium - Google Patents
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- 230000002596 correlated effect Effects 0.000 claims abstract description 32
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- 230000001276 controlling effect Effects 0.000 claims abstract description 21
- 230000003247 decreasing effect Effects 0.000 claims abstract description 13
- 230000008569 process Effects 0.000 claims description 16
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Abstract
The application discloses a writing speed control method, a writing speed control device, an electronic device and a computer readable storage medium, wherein the method comprises the following steps: when the used storage space is larger than a first preset value and smaller than a second preset value, determining the change trend of the used storage space; if the variation trend is reduced, controlling the writing speed according to a first control strategy; wherein the writing speed is negatively correlated with the used storage space and the decreasing speed of the writing speed is positively correlated with the used storage space; if the variation trend is increasing, controlling the writing speed according to a second control strategy; wherein the writing speed is negatively correlated with the used storage space and the increasing speed of the writing speed is negatively correlated with the used storage space; when the used storage space is larger than a second preset value, controlling the writing speed according to a third control strategy; the writing speed is in negative correlation with the used storage space under the control of the third control strategy, and the control of the writing speed is realized, so that the shortage of the available storage space is avoided.
Description
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a writing speed control method and apparatus, an electronic device, and a computer-readable storage medium.
Background
A control strategy needing write arbitration in an SSD (Solid State Drive) controls the data writing amount of a host, and avoids the situation that the speed of consuming idle storage blocks exceeds the speed of generating new idle storage blocks by garbage recovery, so that the final storage blocks are used up. The control of the writing speed may be affected by factors such as writing failure, garbage collection efficiency, etc.
Therefore, how to control the writing speed control to avoid the shortage of the available storage space is a technical problem to be solved by those skilled in the art.
Disclosure of Invention
An object of the present application is to provide a writing speed control method, apparatus, electronic device, and computer-readable storage medium, which implement control of writing speed control and avoid insufficient available storage space.
To achieve the above object, the present application provides a writing speed control method, including:
when the used storage space is larger than a first preset value and smaller than a second preset value, determining the change trend of the used storage space; wherein the trend of change comprises an increase or a decrease;
If the change trend is reduced, controlling the writing speed according to a first control strategy; wherein the writing speed is negatively correlated to the used storage space and the decreasing speed of the writing speed is positively correlated to the used storage space under the control of the first control strategy;
if the change trend is increasing, controlling the writing speed according to a second control strategy; wherein the writing speed is negatively correlated to the used storage space under the control of the second control strategy, and the increasing speed of the writing speed is negatively correlated to the used storage space;
when the used storage space is larger than the second preset value, controlling the writing speed according to a third control strategy; wherein the writing speed is inversely related to the used storage space under control of the third control strategy.
Wherein the writing speed is linearly dependent on the used storage space under control of the third control strategy.
Wherein, still include:
determining an actual steady state value and a target steady state value of the used storage space; wherein the target steady state value is greater than the first preset value and less than the second preset value;
Judging whether the difference value between the actual steady state value and the target steady state value is larger than a third preset value or not;
if yes, adjusting the target slope; wherein the target slope is a slope of the write speed linearly related to the used storage space under control of the third control strategy.
Wherein the adjusting the target slope comprises:
if the actual steady state value is less than the target steady state value, reducing the target slope;
and if the actual steady-state value is larger than the target steady-state value, increasing the target slope.
And the adjustment amplitude of the writing speed corresponding to the second preset value is smaller than a fourth preset value.
Wherein the adjusting the target slope comprises:
judging whether the difference value between the average used storage space in a preset time period and the target steady-state value is in a target range or not;
if not, adjusting the target slope.
To achieve the above object, the present application provides a writing speed control apparatus comprising:
the first determining module is used for determining the change trend of the used storage space when the used storage space is larger than a first preset value and smaller than a second preset value; if the change trend is decreasing, starting the working process of the first control module, and if the change trend is increasing, starting the working process of the second control module;
The first control module is used for controlling the writing speed according to a first control strategy; wherein the writing speed is negatively correlated to the used storage space and the decreasing speed of the writing speed is positively correlated to the used storage space under the control of the first control strategy;
the second control module is used for controlling the writing speed according to a second control strategy; wherein the writing speed is negatively correlated to the used storage space under the control of the second control strategy, and the increasing speed of the writing speed is negatively correlated to the used storage space;
the third control module is used for controlling the writing speed according to a third control strategy when the used storage space is larger than the second preset value; wherein the writing speed is inversely related to the used storage space under control of the third control strategy.
Wherein the writing speed is linearly dependent on the used storage space under control of the third control strategy.
To achieve the above object, the present application provides an electronic device including:
a memory for storing a computer program;
a processor for implementing the steps of the writing speed control method as described above when executing the computer program.
To achieve the above object, the present application provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the writing speed control method as described above.
According to the above scheme, the writing speed control method provided by the present application includes: when the used storage space is larger than a first preset value and smaller than a second preset value, determining the change trend of the used storage space; wherein the trend of change comprises an increase or a decrease; if the change trend is reduced, controlling the writing speed according to a first control strategy; wherein the writing speed is negatively correlated to the used storage space and the decreasing speed of the writing speed is positively correlated to the used storage space under the control of the first control strategy; if the change trend is increasing, controlling the writing speed according to a second control strategy; wherein the writing speed is negatively correlated to the used storage space under the control of the second control strategy, and the increasing speed of the writing speed is negatively correlated to the used storage space; when the used storage space is larger than the second preset value, controlling the writing speed according to a third control strategy; wherein the writing speed is inversely related to the used storage space under control of the third control strategy.
Therefore, the write-in speed control method provided by the application realizes the control of the write-in speed control, so that the available storage space is stabilized near the target steady-state value, the shortage of the available storage space is avoided, the fluctuation of iops (Chinese full name: the number of times of read-write operation per Second, English full name: Input/Output operation Second) possibly caused by transient unstable factors is reduced, and better IO (Chinese full name: Input/Output, English full name: Input/Output) consistency is provided. The application also discloses a writing speed control device, an electronic device and a computer readable storage medium, which can also realize the technical effects.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.
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In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts. The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the description serve to explain the disclosure without limiting the disclosure. In the drawings:
FIG. 1 is a flow chart illustrating a write speed control method according to an exemplary embodiment;
FIG. 2 is a diagram illustrating write speed versus used memory space in accordance with an illustrative embodiment;
FIG. 3 is a block diagram illustrating a write speed control apparatus according to an exemplary embodiment;
FIG. 4 is a block diagram illustrating an electronic device in accordance with an exemplary embodiment.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The embodiment of the application discloses a writing speed control method, which realizes the control of writing speed control and avoids the shortage of available storage space.
Referring to fig. 1, a flow chart of a writing speed control method according to an exemplary embodiment is shown, as shown in fig. 1, including:
s101: when the used storage space is larger than a first preset value and smaller than a second preset value, determining the change trend of the used storage space; wherein the trend of change comprises an increase or a decrease;
S102: if the change trend is reduced, controlling the writing speed according to a first control strategy; wherein the writing speed is negatively correlated to the used storage space and the decreasing speed of the writing speed is positively correlated to the used storage space under the control of the first control strategy;
s103: if the change trend is increasing, controlling the writing speed according to a second control strategy; wherein the writing speed is negatively correlated to the used storage space under the control of the second control strategy, and the increasing speed of the writing speed is negatively correlated to the used storage space;
s104: when the used storage space is larger than the second preset value, controlling the writing speed according to a third control strategy; wherein the writing speed is inversely related to the used storage space under control of the third control strategy.
The execution main body of the embodiment may be an SSD, and the purpose is to control the write speed of the host, so that the SSD enters a steady state, and the shortage of the available storage space is avoided. In a specific implementation, as shown in fig. 2, in the process that the SSD reaches the point a (i.e. the first preset value) from the empty disk to the used storage space, the writing speed is not limited, that is, the host has written the data into the SSD at the maximum iops. The write speed is limited starting when point a is reached. The host continues to write data, and in the process that the used storage space is from the point A (namely the first preset value) to the point B (namely the second preset value), the writing speed is controlled according to the first control strategy, namely the writing speed is in negative correlation with the used storage space, the reduction speed of the writing speed is in positive correlation with the used storage space, the writing speed is gradually increased along with the reduction of the available storage space, and the SSD can reach the point B at a higher speed. Preferably, the writing speed can be controlled by a root-like function f (x). As the host continues with the write and garbage collection process, the used memory space fluctuates around point D (i.e., the target steady state value).
During the process of the used storage space from point B (i.e. the second preset value) to point C, the writing speed is controlled according to a third control strategy, i.e. the writing speed is negatively related to the used storage space, preferably the writing speed is linearly related to the used storage space, i.e. the writing speed is controlled by a linear function h (x). During the time that the used storage space is from point C to point B, i.e. the second preset value, the writing speed is also controlled according to a third control strategy.
During the process of the used storage space from the point B (i.e. the second preset value) to the point A (i.e. the first preset value), the writing speed is controlled according to the second control strategy, i.e. the writing speed is negatively related to the used storage space, and the increasing speed is negatively related to the used storage space. Preferably, the writing speed can be controlled by an inverse class function g (x).
It should be noted that the used memory space should fluctuate above and below the target steady state value, and if the actual steady state value deviates from the target steady state value by a large amount, the slope of h (x) can be adjusted. That is, the present embodiment further includes: determining an actual steady state value and a target steady state value of the used storage space; wherein the target steady state value is greater than the first preset value and less than the second preset value; judging whether the difference value between the actual steady state value and the target steady state value is larger than a third preset value or not; if yes, adjusting the target slope; wherein the target slope is a slope of the write speed linearly related to the used storage space under control of the third control strategy.
In a specific implementation, if the actual steady state value is less than the target steady state value, decreasing the target slope; and if the actual steady-state value is larger than the target steady-state value, increasing the target slope. It will be appreciated that if the actual steady-state value is closer to point a to the left of point D, the slope of h (x) needs to be decreased so that the value of h (x) at point B becomes larger and the actual steady-state value shifts toward point D (i.e., the target steady-state value). If the actual steady state value is closer to point B to the right of point D, the slope of h (x) needs to be increased, so that the value of h (x) at point B becomes smaller, and the actual steady state value shifts to point D (i.e., the target steady state value).
It should be noted that the slope change of h (x) cannot be too large, and the actual steady-state point drift process should be a gradual process to avoid the too large adjustment causing the too large fluctuation of the writing speed. The adjustment time of the slope may be limited using the following equation:
Namely, the step of adjusting the target slope includes: judging whether the difference value between the average used storage space in a preset time period and the target steady-state value is in a target range or not; if not, adjusting the target slope.
The magnitude of the slope adjustment can be limited using the following equation:
|h(B)-h′(B)|＜σiops(ii) a Wherein h (B) is the writing speed corresponding to B point before adjustment, h' (B) is the writing speed corresponding to B point after adjustment, and σiopsIs the fourth preset value. The formulaThe amplitude of each adjustment is limited, namely the adjustment amplitude of the writing speed corresponding to the second preset value is smaller than the fourth preset value, so that the writing speed is ensured not to fluctuate too much.
Therefore, the writing speed control method provided by the embodiment of the application realizes the control of writing speed control, enables the available storage space to be stable near the target steady-state value, avoids the shortage of the available storage space, alleviates iops fluctuation possibly caused by transient unstable factors, and provides better IO consistency.
In the following, a writing speed control apparatus provided by an embodiment of the present application is described, and a writing speed control apparatus described below and a writing speed control method described above may be referred to with each other.
Referring to fig. 3, a block diagram of a writing speed control apparatus according to an exemplary embodiment is shown, as shown in fig. 3, including:
the first determining module 301 is configured to determine a change trend of an used storage space when the used storage space is greater than a first preset value and smaller than a second preset value; if the change trend is decreasing, starting the work flow of the first control module 302, and if the change trend is increasing, starting the work flow of the second control module 303;
The first control module 302 is configured to control a writing speed according to a first control strategy; wherein the writing speed is negatively correlated to the used storage space and the decreasing speed of the writing speed is positively correlated to the used storage space under the control of the first control strategy;
the second control module 303, configured to control the writing speed according to a second control policy; wherein the writing speed is negatively correlated to the used storage space under the control of the second control strategy, and the increasing speed of the writing speed is negatively correlated to the used storage space;
a third control module 304, configured to control the writing speed according to a third control strategy when the used storage space is larger than the second preset value; wherein the writing speed is inversely related to the used storage space under control of the third control strategy.
Therefore, the writing speed control device provided by the embodiment of the application realizes the control of writing speed control, so that the available storage space is stabilized near the target steady-state value, the shortage of the available storage space is avoided, the iops fluctuation possibly caused by transient unstable factors is reduced, and better IO consistency is provided.
On the basis of the above embodiment, as a preferred implementation, the writing speed is linearly related to the used storage space under the control of the third control strategy.
On the basis of the above embodiment, as a preferred implementation, the method further includes:
a second determining module, configured to determine an actual steady state value and a target steady state value of the used storage space; wherein the target steady state value is greater than the first preset value and less than the second preset value;
the judging module is used for judging whether the difference value between the actual steady state value and the target steady state value is larger than a third preset value or not; if yes, starting the working process of the adjusting module;
the adjusting module is used for adjusting the target slope; wherein the target slope is a slope of the write speed linearly related to the used storage space under control of the third control strategy.
On the basis of the foregoing embodiment, as a preferred implementation manner, the adjusting module specifically decreases the target slope if the actual steady-state value is smaller than the target steady-state value; and a module for increasing the target slope if the actual steady state value is greater than the target steady state value.
On the basis of the foregoing embodiment, as a preferred implementation manner, the adjustment amplitude of the writing speed corresponding to the second preset value is smaller than the fourth preset value.
On the basis of the above embodiment, as a preferred implementation, the adjusting module includes:
the judging unit is used for judging whether the difference value between the average used storage space in a preset time period and the target steady-state value is in a target range or not; if not, starting the working process of the adjusting unit;
and the adjusting unit is used for adjusting the target slope.
With regard to the apparatus in the above-described embodiment, the specific manner in which each module performs the operation has been described in detail in the embodiment related to the method, and will not be elaborated here.
The present application further provides an electronic device, and referring to fig. 4, a structure diagram of an electronic device 400 provided in an embodiment of the present application, as shown in fig. 4, may include a processor 11 and a memory 12. The electronic device 400 may also include one or more of a multimedia component 13, an input/output (I/O) interface 14, and a communication component 15.
The processor 11 is configured to control the overall operation of the electronic device 400, so as to complete all or part of the steps in the writing speed control method. The memory 12 is used to store various types of data to support operation at the electronic device 400, such as instructions for any application or method operating on the electronic device 400 and application-related data, such as contact data, transmitted and received messages, pictures, audio, video, and so forth. The Memory 12 may be implemented by any type of volatile or non-volatile Memory device or combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read-Only Memory (EPROM), Programmable Read-Only Memory (PROM), Read-Only Memory (ROM), magnetic Memory, flash Memory, magnetic disk or optical disk. The multimedia component 13 may include a screen and an audio component. Wherein the screen may be, for example, a touch screen and the audio component is used for outputting and/or inputting audio signals. For example, the audio component may include a microphone for receiving external audio signals. The received audio signal may further be stored in the memory 12 or transmitted via the communication component 15. The audio assembly also includes at least one speaker for outputting audio signals. The I/O interface 14 provides an interface between the processor 11 and other interface modules, such as a keyboard, mouse, buttons, etc. These buttons may be virtual buttons or physical buttons. The communication component 15 is used for wired or wireless communication between the electronic device 400 and other devices. Wireless communication, such as Wi-Fi, bluetooth, Near Field Communication (NFC), 2G, 3G or 4G, or a combination of one or more of them, so that the corresponding communication component 15 may include: Wi-Fi module, bluetooth module, NFC module.
In an exemplary embodiment, the electronic Device 400 may be implemented by one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components for performing the writing speed control method.
In another exemplary embodiment, there is also provided a computer readable storage medium including program instructions which, when executed by a processor, implement the steps of the above-described writing speed control method. For example, the computer readable storage medium may be the memory 12 described above including program instructions executable by the processor 11 of the electronic device 400 to perform the write speed control method described above.
The embodiments are described in a progressive manner in the specification, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description. It should be noted that, for those skilled in the art, it is possible to make several improvements and modifications to the present application without departing from the principle of the present application, and such improvements and modifications also fall within the scope of the claims of the present application.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Claims (10)
1. A writing speed control method, comprising:
when the used storage space is larger than a first preset value and smaller than a second preset value, determining the change trend of the used storage space; wherein the trend of change comprises an increase or a decrease;
If the change trend is reduced, controlling the writing speed according to a first control strategy; wherein the writing speed is negatively correlated to the used storage space and the decreasing speed of the writing speed is positively correlated to the used storage space under the control of the first control strategy;
if the change trend is increasing, controlling the writing speed according to a second control strategy; wherein the writing speed is negatively correlated to the used storage space under the control of the second control strategy, and the increasing speed of the writing speed is negatively correlated to the used storage space;
when the used storage space is larger than the second preset value, controlling the writing speed according to a third control strategy; wherein the writing speed is inversely related to the used storage space under control of the third control strategy.
2. The write speed control method according to claim 1, wherein the write speed is linearly related to the used storage space under the control of the third control strategy.
3. The writing speed control method according to claim 2, further comprising:
determining an actual steady state value and a target steady state value of the used storage space; wherein the target steady state value is greater than the first preset value and less than the second preset value;
Judging whether the difference value between the actual steady state value and the target steady state value is larger than a third preset value or not;
if yes, adjusting the target slope; wherein the target slope is a slope of the write speed linearly related to the used storage space under control of the third control strategy.
4. The writing speed control method according to claim 3, wherein the adjusting the target slope comprises:
if the actual steady state value is less than the target steady state value, reducing the target slope;
and if the actual steady-state value is larger than the target steady-state value, increasing the target slope.
5. The writing speed control method according to claim 3, wherein the adjustment range of the writing speed corresponding to the second preset value is smaller than a fourth preset value.
6. The writing speed control method according to claim 3, wherein the adjusting the target slope comprises:
judging whether the difference value between the average used storage space in a preset time period and the target steady-state value is in a target range or not;
if not, adjusting the target slope.
7. A writing speed control apparatus, comprising:
the first determining module is used for determining the change trend of the used storage space when the used storage space is larger than a first preset value and smaller than a second preset value; if the change trend is decreasing, starting the working process of the first control module, and if the change trend is increasing, starting the working process of the second control module;
The first control module is used for controlling the writing speed according to a first control strategy; wherein the writing speed is negatively correlated to the used storage space and the decreasing speed of the writing speed is positively correlated to the used storage space under the control of the first control strategy;
the second control module is used for controlling the writing speed according to a second control strategy; wherein the writing speed is negatively correlated to the used storage space under the control of the second control strategy, and the increasing speed of the writing speed is negatively correlated to the used storage space;
the third control module is used for controlling the writing speed according to a third control strategy when the used storage space is larger than the second preset value; wherein the writing speed is inversely related to the used storage space under control of the third control strategy.
8. The write speed control apparatus according to claim 7, wherein the write speed is linearly related to the used storage space under the control of the third control strategy.
9. An electronic device, comprising:
a memory for storing a computer program;
A processor for implementing the steps of the writing speed control method according to any one of claims 1 to 6 when executing the computer program.
10. A computer-readable storage medium, having stored thereon a computer program which, when being executed by a processor, carries out the steps of the write speed control method according to any one of claims 1 to 6.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113553001A (en) * | 2021-06-11 | 2021-10-26 | 济南浪潮数据技术有限公司 | Adaptive current limiting method, device, equipment and medium for data writing rate |
| CN114153381A (en) * | 2021-11-03 | 2022-03-08 | 尧云科技(西安)有限公司 | Method for reducing write-in performance fluctuation of solid state disk |
| CN113553001B (en) * | 2021-06-11 | 2024-05-24 | 郑州浪潮数据技术有限公司 | Self-adaptive current limiting method, device, equipment and medium for data writing rate |
-
2020
- 2020-07-10 CN CN202010663378.5A patent/CN111857584A/en not_active Withdrawn
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113553001A (en) * | 2021-06-11 | 2021-10-26 | 济南浪潮数据技术有限公司 | Adaptive current limiting method, device, equipment and medium for data writing rate |
| CN113553001B (en) * | 2021-06-11 | 2024-05-24 | 郑州浪潮数据技术有限公司 | Self-adaptive current limiting method, device, equipment and medium for data writing rate |
| CN114153381A (en) * | 2021-11-03 | 2022-03-08 | 尧云科技(西安)有限公司 | Method for reducing write-in performance fluctuation of solid state disk |
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