CN111834126B - Multilayer ceramic capacitor and preparation method thereof - Google Patents

Abstract

The invention relates to the technical field of ceramic electronic devices, in particular to a multilayer ceramic capacitor and a preparation method thereof, wherein the multilayer ceramic capacitor comprises a laminated body, wherein the laminated body is formed by a plurality of laminated units which are alternately stacked in the thickness direction, and each laminated unit comprises a dielectric layer and an inner electrode layer; external electrodes formed on end faces of the laminated body and connected to the internal electrode layers; the inner electrode layer comprises an effective part and an extension part connected with the outer electrode, and a notch area is arranged on the cross section formed by the extension part in the length direction and the width direction. The invention can effectively improve the binding force between the dielectric layer and the inner electrode layer, thereby improving the thermal shock resistance of the multilayer ceramic capacitor; in addition, the arrangement of the gap area is beneficial to saving printing materials and reducing the manufacturing cost; the Y-axis cutting offset end face can be accurately identified, the cutting error analysis and the correction of a cutting means are greatly facilitated, and the cutting level and the accuracy in the production process of products are improved.

Description

Multilayer ceramic capacitor and preparation method thereof

Technical Field

The invention relates to the technical field of ceramic electronic devices, in particular to a multilayer ceramic capacitor and a preparation method thereof.

Background

In recent years, with the development of electronic integration technology, multilayer ceramic capacitors have been gradually miniaturized and have a higher capacity, that is, the thickness of dielectric layers in the multilayer ceramic capacitor has been reduced and the number of dielectric layers has been increased.

However, the ceramic capacitor is easily deformed due to the difference in shrinkage of the dielectric layer and the inner electrode layer during the sintering process, and cracks or delamination are generated between the dielectric layer and the inner electrode layer or between the dielectric layer and the dielectric layer. In the prior art, the internal shrinkage difference of the ceramic capacitor in the sintering and forming process is reduced mainly by adjusting the ceramic slurry of the dielectric layer and the metal slurry of the inner electrode layer, and the method has high adjusting difficulty and is easy to deteriorate other performances of the capacitor.

In addition, in the preparation of multilayer ceramic chip containers, a ceramic green body is usually subjected to tape casting molding, and internal electrodes are printed on the ceramic green body, wherein the dielectric layer green body at this time comprises internal electrode layers and blank regions which are distributed in a staggered manner, and effective parts serving as effective areas of capacitors in at least two adjacent internal electrode layers in the width direction are arranged in order; the blank areas include long axis blank areas and short axis blank areas. Then, the ceramic green body on which the internal electrode is printed is subjected to offset stacking, press fitting, and cutting. The cutting of the dielectric layer green body comprises X-axis cutting taking the center of the long-axis blank area in the width direction as a reference line and Y-axis cutting taking the center of the inner electrode layer in the length direction as a reference line.

However, due to the thinning of the dielectric layers and the increase in the number of layers, the technical requirements of the stacked body during the cutting process are greatly increased. In the actual production process, Y-axis cutting is easier to shift, and the Y-axis cutting falls in the effective part of the inner motor layer to cause short circuit of the capacitor; or as Y-axis cuts in extensions of the inner electrode layers that are connected to the outer electrodes, may reduce the reliability of the capacitor during use of the circuit. At present, the method for judging the cutting quality of the Y-axis is mainly to place the cut laminate in a microscope, manually measure the lengths of the blank areas at the two ends of the laminate in the length direction, and form a cutting quality evaluation by comparing the lengths of the blank areas. The method has the defects that detection efficiency is seriously influenced by means of a detection tool and manpower, and full detection cannot be realized.

Disclosure of Invention

The invention aims to provide a multilayer ceramic capacitor and a preparation method thereof, which are beneficial to improving the detection efficiency of whether the stacked cutting is qualified or not, improving the product quality, being beneficial to the analysis of cutting errors and the correction of cutting means, improving the cutting level and the accuracy rate in the production process of products and effectively improving the binding force between a dielectric layer and an inner electrode layer.

In order to achieve the above object, the present invention provides a multilayer ceramic capacitor comprising:

a laminated body formed of a plurality of laminated units alternately stacked on each other in a thickness direction, the laminated units including dielectric layers and internal electrode layers;

an external electrode formed on an end surface of the laminate and connected to the internal electrode layer;

the inner electrode layer comprises an effective part and an extending part connected with the outer electrode, the effective part of the laminated unit is overlapped in the projection of the thickness direction, a notch area is arranged on the cross section formed by the extending part in the length direction and the width direction, the notch area does not penetrate through the extending part in the length direction and the width direction, and the notch area penetrates through the extending part in the thickness direction.

Optionally, the extension portion includes a first side connected to the external electrode, a second side connected to the active portion and opposite to the first side, and third and fourth sides opposite to each other in a width direction, and the notched region abuts at least one of the first, second, third, and fourth sides.

Optionally, the notched area abuts the first or second side in a length direction.

Optionally, the notched area abuts the extension first side.

Optionally, the maximum length of the extension portion in the length direction is L1, and the maximum length of the identification portion in the length direction is Le, where L1-Le > X > 0.

Optionally, the Le/L1 is more than 0.2 and less than 0.8.

Optionally, the length of the inner electrode layer in the width direction is W0, and the maximum length of the notch region in the width direction is We, wherein We < W0, and 0.2 < We/W0 < 0.7.

Optionally, the cross-sectional area of the notch region in the length direction and the width direction is Se, and the cross-sectional area of the extension portion in the length direction and the width direction is S1, wherein Se/S1 is 0.1 < Se/S1 < 0.3.

Optionally, the stacked body has a first main surface in a thickness direction, the extending portion forms an inclination angle with the first main surface in a longitudinal direction, and the inclination angles of the extending portions of the plurality of stacked units with the first main surface gradually decrease or increase in the thickness direction.

Based on the above object, the present invention also provides a method for manufacturing a multilayer ceramic capacitor, comprising the steps of:

1) preparing slurry of the dielectric layer and forming a dielectric layer green body;

2) designing a film according to the required gap area, and preparing a corresponding printing screen plate;

3) printing an inner electrode layer on the dielectric layer green body through the printing screen in the step 2), and forming a preset gap area on the inner electrode layer;

4) stacking, pressing and cutting the dielectric layer green bodies of the plurality of printed inner electrode layers formed in the step 3) to form the laminated body;

5) sintering the laminated body formed in the step 4), and then electroplating the end face of the laminated body to form the external electrode.

The embodiment of the invention has the following technical effects:

according to the invention, the notch region is arranged on the extension part, based on the change of the lamination process of the multilayer ceramic capacitor and the arrangement of the notch region, the dielectric layer on the upper surface of the inner electrode layer and the dielectric layer on the lower surface of the inner electrode layer can be pressed into the notch region to form a pinning effect, and because the materials of the adjacent upper and lower layers of dielectric layers are the same, the good binding force is provided in the notch region, the binding force between the dielectric layers and the inner electrode layer can be effectively improved, and thus the thermal shock resistance of the multilayer ceramic capacitor is improved; in addition, the arrangement of the gap area is beneficial to saving printing materials and reducing the manufacturing cost;

when the multilayer ceramic capacitor is checked to be qualified, the end face can be quickly judged to belong to a normal end face, a Y-axis offset end face or a short-circuit end face by arranging the notch region and cutting the end face through the Y-axis of the multilayer ceramic green body, so that qualified products and unqualified products can be effectively judged in the cutting process, the Y-axis offset end face can be accurately distinguished, the analysis of cutting errors and the correction of cutting means are greatly facilitated, and the cutting level and the accuracy in the production process of the products are improved.

Drawings

FIG. 1 is a schematic structural view of the present invention;

FIG. 2 is a directional cross-section of LT of the present invention;

FIG. 3 is a cross-section in the WL direction of the multilayer ceramic capacitor of the present invention;

FIG. 4 is a schematic view showing the structure of a green dielectric layer in example 1 of the present invention;

FIG. 5 is a partial structural view of a green dielectric layer in example 1 of the present invention;

FIG. 6 is a partial structural view of a green dielectric layer in example 1 of the present invention;

FIG. 7 is a normal end face of the Y-axis cut end face of the laminate in example 1 of the present invention;

FIG. 8 is a Y-axis offset end face of the Y-axis cut end face of the laminate in example 1 of the present invention;

FIG. 9 is a short-circuited end face of a Y-axis cut end face of the laminate in example 1 of the present invention;

FIG. 10 is a WT end face cut at the midpoint in the longitudinal direction of the laminate in example 2 of the present invention;

FIG. 11 is a normal end face of the Y-axis cut end face of the laminate in example 2 of the present invention;

FIG. 12 is a Y-axis offset end face of the Y-axis cut end face of the laminate in example 2 of the present invention;

FIG. 13 is a short-circuited end face of a Y-axis cut end face of the laminate in example 2 of the present invention;

FIG. 14 is a schematic partial structural view of a green dielectric layer in accordance with embodiment F of the present invention;

FIG. 15 is a cross-section in the direction of WL of version F of the present invention;

FIG. 16 is a cross-section in the direction of WL in accordance with alternative A of the present invention;

FIG. 17 is a cross-section in the direction of WL in accordance with alternative B of the present invention;

FIG. 18 is a cross-section in the direction of WL in accordance with alternative C of the present invention;

FIG. 19 is a cross section in the direction of WL in the embodiment D of the present invention.

Description of reference numerals:

1. a laminated body 11, a first main surface 2, a dielectric layer 3, an inner electrode layer 31, an effective part 32, an extension part 321, a first side 322, a second side 323, a third side 324, a fourth side 33, a gap area 4 and an external electrode.

Detailed Description

The following detailed description of embodiments of the present invention is provided in connection with the accompanying drawings and examples. The following examples are intended to illustrate the invention but are not intended to limit the scope of the invention.

In the description of the present invention, it should be noted that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.

In addition, the terms "first", "second", and the like are employed in the present invention to describe various information, but the information should not be limited to these terms, which are used only to distinguish the same type of information from each other. For example, "first" information may also be referred to as "second" information, and similarly, "second" information may also be referred to as "first" information, without departing from the scope of the present invention.

Note that the term "longitudinal direction" is the "L" direction indicated in fig. 1, the term "width direction" is the "W" direction indicated in fig. 1, and the term "thickness direction" is the "T" direction indicated in fig. 1.

Referring to fig. 1, one embodiment of the present invention provides a multilayer ceramic capacitor, a laminate 1, the laminate 1 being formed of a plurality of laminated units alternately stacked on each other in a thickness direction, the laminated units including dielectric layers 2 and internal electrode layers 3, referring to fig. 3, wherein the laminate 1 includes a first main surface 11 and a second main surface opposed to each other in the thickness direction, a first side surface and a second side surface opposed to each other in a width direction, a first end surface and a second end surface opposed to each other in a length direction;

external electrodes 4 formed on end faces of the laminate 1 and connected to the internal electrode layers 3;

wherein, the internal electrode layer 3 includes effective part 31 and with extension 32 that external electrode 4 is connected, two adjacent effective parts 31 of range upon range of unit coincide in the projection of thickness direction, extension 32 is equipped with breach district 33 on the cross-section that length direction and width direction formed, breach district 33 does not all run through in length direction and width direction extension 32, breach district 33 runs through in thickness direction extension 32.

Further, the laminate 1 has a first main surface 11 in the thickness direction, the extending portion 32 forms an inclination angle with the first main surface 11 in the longitudinal direction, and referring to fig. 2, the inclination angle of the extending portion 32 of the plurality of laminate units with the first main surface 11 is gradually decreased or increased in the thickness direction.

The gap area 33 is designed to be hollowed out on the inner electrode layer 3, and can play a pinning role in the inner electrode layer 3, so that the pressing deformation is effectively reduced.

Embodied as a laminated unit comprising a dielectric layer 2 and an inner electrode layer 3, the inner electrode layer 3 is printed on the dielectric layer 2, then, the total thickness of the dielectric layers 2 printed with the inner electrode layers 3 is greater than the thickness of the dielectric layers 2 without the inner electrode layers 3 printed, and in addition, the inner electrode layers 3 include the effective portions 31 and the extension portions 32, when the laminated units are alternately stacked, the projections of the effective portions 31 in the thickness direction are overlapped, the extending portions 32 of the plurality of laminated units are alternately stacked, therefore, when a plurality of lamination units are alternately laminated, the thickness of the effective part 31 of the laminated body 1 is larger than that of the extension part 32, in the production press-fitting process, since the entire laminated body 1 is subjected to uniform pressure and sintering shrinkage of the material, it is easy to cause the position of the laminated body 1 where the extending portion 32 is provided to sink relative to the position where the effective portion 31 is provided, that is, the extending portion 32 is caused to form an inclination angle with the first main surface 11 or the second main surface of the multilayer ceramic capacitor in the longitudinal direction.

Based on the change of the lamination process of the multilayer ceramic capacitor and the arrangement of the gap area 33, the dielectric layer 2 on the upper surface of the inner electrode layer 3 and the dielectric layer 2 on the lower surface thereof are pressed into the gap area 33, thereby forming a pinning effect. Due to the difference in the materials of the inner electrode layer 3 and the dielectric layer 2, the thermal shrinkage performance is not uniform, and the separation between the inner electrode layer 3 and the dielectric layer 2 is likely to occur. The adjacent upper and lower dielectric layers 2 are made of the same material, and have good binding force in the gap area 33, so that the binding force between the dielectric layers 2 and the inner electrode layer 3 can be effectively improved, and the thermal shock resistance of the multilayer ceramic capacitor is improved. Further, the gap area 33 is beneficial to saving printing materials and reducing manufacturing cost.

Referring to fig. 3, in the embodiment, the notch area 33 abuts on the first side 321, and the notch area 33 does not contact with the third side 323 or the fourth side 324, because the first side 321 is close to the lead of the inner electrode layer 3, so that a space is formed between the notch area 33 and the effective portion 31, which is beneficial to reducing the risk of being broken down in the using process, therefore, in the embodiment, when the Y-axis cutting line is detected, the Y-axis cutting end faces presented by the normal end face, the Y-axis offset end face, and the short-circuit end face are:

referring to fig. 5 and 7, a normal end surface, i.e., a Y-axis cutting line, is located in the range of the region I in fig. 5, the formed Y-axis cutting end surface shows that both sides of the electrode layer 11 are left blank, and the middle part of the inner electrode layer 3 has a blank shown after cutting due to the provision of the gap region 33;

referring to fig. 5 and 8, the Y-axis offset end surface, i.e., the Y-axis cutting line, is located in the range of the J region in fig. 5, the formed Y-axis cutting end surface shows that two sides of the inner electrode layer 3 are left blank, the Y-axis cutting end surfaces of the inner electrode layers 3 are continuous, and the distance between adjacent inner electrode layers 3 is H;

referring to fig. 5 and 9, the short-circuited end surface, i.e., the Y-axis cutting line, is located in the K region in fig. 5, the formed Y-axis cutting end surface shows that both sides of the inner electrode layers 3 are left blank, the Y-axis cutting end surfaces of the inner electrode layers 3 are continuous, and the distance between adjacent inner electrode layers 3 is H/2.

Referring to fig. 3, this embodiment takes experimental evidence of the relationship between the maximum length of the above-described notch region 33 in the width direction and the length of the inner electrode layer 3 in the width direction as follows:

the probability of Y-axis offset end faces in 500 samples is collected in a test, and the performance of a finished product formed by the multilayer ceramic capacitor is tested;

1) test index

Capacity, loss

2) Test scheme of indexes

The test was conducted by setting a test group in which the specifications of the multilayer ceramic capacitors to be tested were 180mm x 180mm, the specific data of the test group are shown in Table 1, and the effects of the multilayer ceramic capacitors were examined, the examination data are shown in Table 2,

examples	Le/μm	L1/μm	We/μm	W0/μm	We/W0
						Test group 1	90	180	59	590	0.1
Test group 2	90	180	118	590	0.2
						Test group3	90	180	177	590	0.3
Test group 4	90	180	188.8	590	0.32
						Test group 5	90	180	212.4	590	0.36
Test group 6	90	180	236	590	0.4
						Test group 7	90	180	265.5	590	0.45
Test group 8	90	180	295	590	0.5
						Test group 9	90	180	354	590	0.6
Test group 10	90	180	413	590	0.7
						Test group 11	90	180	472	590	0.8

TABLE 1

TABLE 2

As can be seen from tables 1 and 2, when We/W0 is 0.2 & lt We/W0 & lt 0.7, the capacity of the sheet container is stable, the capacity range is small, the average loss is low, and the sheet container has good finished product performance.

Further, the length of the extending portion 32 in the length direction is L1, and the maximum length of the notch area 33 in the length direction is Le, where L1-Le > 0, specifically, if Le/L1 is less than 0.2, the printing difficulty is high, and the identification degree of the notch area 33 is too low, so that the position of the notch area 33 in the cut end surface is not easy to identify, which affects the efficiency of determining whether the end surface is normal, and if Le/L1 is more than 0.8, the short circuit risk of the product is easily increased, therefore, in this embodiment, it is preferable that Le/L1 is more than 0.2 and less than 0.8.

Wherein, Le is more than 0.01mm and less than 8mm, and We is more than 0.01mm and less than 8mm, so as to adapt to the setting of the overall parameters of most of the internal electrode layers 3, the method for obtaining the size parameters of the gap area 33 in the embodiment is as follows:

referring to fig. 1, first, at least 5 or more samples are prepared, respectively, the periphery of each sample is fixed with resin, and fixed in such a manner that the Y-axis cut end surface is exposed, then, the WT end surface of the sample is ground by a grinder, and, with further grinding, if, for example, an additional region at the same position in the Y-axis direction is continuously exposed at adjacent depths, the position can be regarded as a cut-out region 33;

meanwhile, the dimensions We and W0 can be obtained by measuring the dimensions in the width direction for the WT end surfaces of the exposed notch areas 33 of three different depths, and taking the average value thereof, and similarly, the dimensions Le and L1 can be obtained by continuously grinding in the manner of exposing the LT end surface. The dimensions can be determined by scanning electron microscopy.

Wherein, the cross-sectional area of the notch area 33 along the length direction and the width direction is Se, and the cross-sectional area of the extension portion 32 along the length direction and the width direction is S1, wherein Se/S1 is more than 0.1 and less than 0.3.

In order to evaluate the excellent effect of the design of the gap area 33 on improving the bonding force between the dielectric layer 2 and the inner electrode layer 3, the invention provides test sets 1-3, where test set 1 is the design of the gap area 33 in this embodiment, and referring to fig. 14, test set 2 is another embodiment of the invention, and test set 3 is the prior art.

Firstly, a corresponding multilayer ceramic capacitor is prepared by the following specific preparation process,

1) preparing slurry of the dielectric layer 2 and forming a dielectric layer 2 green body;

2) designing a film according to the required notch area 33, and preparing a corresponding printing screen;

3) printing an inner electrode layer 3 on the dielectric layer 2 green body through the printing screen in the step 2), and forming a preset gap area 33 on the inner electrode layer 3;

4) stacking, laminating and cutting the dielectric layer 2 green bodies of the plurality of printed inner electrode layers 3 formed in the step 3) to form the laminated body 1;

5) sintering the laminated body 1 formed in the step 4), and then electroplating the end face of the laminated body 1 to form the external electrode 4, thus obtaining the multilayer ceramic capacitor.

The specification of the sheet container related to this embodiment 1 is 0603X7R104, and the number of a batch of sheet containers prepared by each test group exceeds 1 ten thousand. The design of the notch region 33 in test groups 1-3 in this example is as follows:

test group 1: including the notched area 33, and the dimensions of the notched area 33 are shown in table 3, the notched area 33 abuts the first side 321 of the extended portion 32 and does not abut the third side 323 and the fourth side 324 of the extended portion 32.

Test group 2: including the notched area 33, and the dimensions of the notched area 33 are shown in table 3, the notched area 33 abuts the second side 322 of the extended portion 32 and does not abut the third side 323 and the fourth side 324 of the extended portion 32.

Test group 3: without the relief area 33.

Examples	Le/μm	L1/μm	We/μm	W0/μm	Le/L1	We/W0
							Test group 1	90	180	200	590	0.2	0.34
Test group 2	90	180	200	590	0.2	0.34

TABLE 3

Further, the heat shock resistance test was performed on the multilayer ceramic capacitors randomly drawn 100 or more per each of the above test groups. The specific test scheme is that firstly, the multilayer ceramic capacitor is put into a solder bath with the temperature set to 325 ℃ to be soaked for 3 minutes; next, each sample was taken out from the solder bath, fixed with resin, polished, and observed with a microscope, and it was determined that the sample was a defective product as long as 1 crack was observed.

According to the above test protocol, test results of test groups 1-3 were obtained, as shown in Table 4.

Examples	Thermal shock resistance
		Test group 1	3/100
Test group 2	0/100
		Test group 3	13/100

TABLE 4

From the above test results, it can be seen that the multilayer ceramic capacitors of test groups 1 and 2, which contain the notch 33 design, have a product having a thermal shock resistance far superior to that of test group 3, which does not contain the notch 33 design. Further, the notched area 33 of the test set 2 abutted against the second side 322 of the extension portion 32, connecting the extension portion 32 and the effective portion 31 of the inner electrode layer 3, had a more excellent effect on improving the problem of cracking of the capacitor than the notched area 33 abutted against the first side 321 of the extension portion 32, and no cracking occurred in the test results.

The multilayer ceramic capacitor provided by the invention can be further used for detecting the cutting quality in the capacitor preparation process through the design of the notch area 33. Referring to fig. 5, the green dielectric layer 2 for preparing the multilayer ceramic capacitor in the present embodiment is printed with the internal electrode layer 3 thereon, and is provided with a gap region 33 according to the minimum margin required in the width direction of the extension 32. During the cutting process of the production preparation, three cutting situations may occur in the length direction of the inner electrode layer 3 based on the difference of the cutting levels, the first situation is that the cutting blade is located in the first area I of the extended portion 32 including the notch area 33, the second situation is that the cutting blade is located in the second area J of the extended portion 32 including the non-notch area 33, and the third situation is that the cutting blade is located in the third area K of the effective portion 31 of the inner electrode layer 3.

Wherein the extension 32 includes a first side 321 connected to the external electrode 4 and a second side 322 opposite to the first side 321, and a third side 323 and a fourth side 324 opposite to each other in a width direction. The design of the relief area 33 mainly includes the following two types of schemes:

in the first embodiment, the notch area 33 is disposed at the corner of the extension 32, which is represented by:

A. referring to fig. 16, the notched area 33 abuts the first side 321 and the fourth side 324 of the extension 32

B. Referring to FIG. 17, the notched area 33 abuts the first side 321 and the third side 323 of the extension 32

C. Referring to fig. 18, notched area 33 abuts second side 322 and fourth side 324 of extension 32

D. Referring to FIG. 19, the cutaway area 33 abuts the second and third sides 322, 323 of the extension 32

In the second aspect, the notch area 33 is disposed in the middle of the extending portion 32, and is embodied as:

E. referring to FIG. 3, the notched area 33 abuts the first side 321 of the extension 32, and does not abut the third side 323 and the fourth side 324 of the extension 32

F. Referring to fig. 15, the cutaway area 33 abuts the second side 322 of the extension 32 without abutting the third side 323 and the fourth side 324 of the extension 32

By adopting the first type of solution, referring to fig. 16, taking solution a as an example, if the inner electrode layer 3 exposed on the end face of the formed laminated body 1 is cut in the first area, and the dimension of the margin on the left side in the width direction is smaller than the margin on the right side, i.e. B1 < B2, it can be determined that the lamination and cutting quality is acceptable, the extending portion 32 with the minimum margin required to be retained in the laminated body 1 belongs to a normal end face, and the formed capacitor is an acceptable product. If the cutter is dropped in the second area, the size of the left margin of the exposed inner electrode layer 3 on the end surface of the formed laminated body 1 is almost close to the right margin in the width direction, and the number of the inner electrode layers 3 is half of the total amount of the inner electrode layers 3, it can be determined that the exposed inner electrode layer deviates from the gap area 33 in the Y-axis cutting process and belongs to the Y-axis cutting deviation end surface, the formed capacitor is an unqualified product, and the cutter dropping position of the next cutting can be calibrated according to the preset minimum margin of the extension part 32. If the cutting is performed in the third area, all the inner electrode layers 3 are exposed on the end face of the formed laminated body 1, it can be determined that the capacitor formed by the capacitor deviates from the extension portion 32 in the Y-axis cutting process and belongs to a short-circuit end face.

By adopting the second type of scheme, taking scheme E as an example, referring to fig. 7, if the inner electrode layer 3 exposed on the end face of the formed laminated body 1 is broken in the width direction when the cutter is dropped in the first area, the lamination and cutting quality is judged to be qualified, the extending part 32 with the required minimum margin remaining in the laminated body 1 belongs to a normal end face, and the formed capacitor is a qualified product. Referring to fig. 8, if the cutting is performed in the second area, the exposed inner electrode layers 3 on the end surface of the formed laminated body 1 are not broken in the width direction, and the number of the inner electrode layers 3 is half of the total number of the inner electrode layers 3, it can be determined that the capacitor formed in the Y-axis cutting process deviates from the notch area 33 and belongs to a Y-axis cutting deviation end surface, and the cutting position for the next cutting can be calibrated according to the preset minimum margin of the extension portion 32. Referring to fig. 9, if the cutting is performed in the third area, and all the inner electrode layers 3 are exposed on the end face of the formed laminated body 1, it can be determined that the capacitor formed by the capacitor deviates from the extension portion 32 in the Y-axis cutting process and belongs to a short-circuited end face.

As can be seen from the above, through setting up breach district 33, can effectively judge qualified product and nonconforming product in cutting process to can accurately discern Y axle cutting skew terminal surface, be favorable to cutting error analysis and cutting means's correction greatly, improve the cutting level and the rate of accuracy in the product production process. In addition, in the two schemes, the second scheme is superior to the first scheme, and mainly is designed for the notch area 33 of the second scheme, so that the Y-axis cutting quality can be judged more quickly and conveniently, and the Y-axis cutting quality can be judged accurately only by simple visual observation; the blank size on both sides of the first-type scheme laminated body 1 in the end face width direction is used as a judgment basis, and the error is large.

More specifically, the present invention provides test sets 4 and 5 to evaluate the superiority and inferiority of the design of the second type of notch area 33, wherein test set 5 is designed for notch area 33 in the present embodiment and test set 4 is designed for notch area 33 in another embodiment of the present invention.

The method for manufacturing a multilayer ceramic capacitor according to the present invention prepares a multilayer ceramic capacitor of a corresponding specification, in which the notch region 33 is designed as follows:

test group 4: referring to fig. 14 and 15, including the notched area 33, the notched area 33 has a specific size, as shown in table 3, and the notched area 33 abuts the second side 322 of the extended portion 32, but does not abut the third side 323 and the fourth side 324 of the extended portion 32.

Test group 5: referring to fig. 3 and 5, including the notched area 33, the notched area 33 has a specific size, as shown in table 3, and the notched area 33 abuts the first side 321 of the extending portion 32, and does not abut the third side 323 and the fourth side 324 of the extending portion 32.

Examples	Le/μm	L1/μm	We/μm	W0/μm	Le/L1	We/W0
							Test group
4	90	180	200	590	0.2	0.34
							Test group 5	90	180	200	590	0.2	0.34

TABLE 5

In addition, the performance of the multilayer ceramic capacitors randomly drawn out by 2000 or more in each test group was tested, and the specific test scheme was as follows:

the capacity is tested by adopting an impedance analyzer under the test conditions of 1.0 +/-0.2 Vrms, 1KHz +/-10 percent and the standard requirement value of +/-10 percent. And obtaining the lower capacity limit, the upper capacity limit and the capacity variation range in each test group through the measured capacity value of the sheet in each test group.

And loss is tested by adopting an impedance analyzer under the test conditions of 1.0 +/-0.2 Vrms and 1KHz +/-10 percent, and the standard requirement value of DF is less than or equal to 3.5 percent. The average loss of each test group was obtained by averaging the measured sheet volume losses in each test group.

And the printing success rate is obtained by randomly selecting ten areas after the dielectric layer 2 is subjected to green body printing of the internal electrode, wherein the number of the test samples in each area is 100 or more than 100, and observing and calculating the number of the samples for successfully printing the internal electrode on the green body through a microscope. The printing success rate means the probability of successfully printing the electrode layer 3 with the gap area 33 on the dielectric layer 2 green body, and if the gap area 33 is completely filled or half filled with the electrode paste, the printing is considered to be failed.

The test results of test groups 4 and 5 were obtained according to the test protocol described above, and are shown in table 6.

TABLE 6

From the above test results, the notch regions 33 of the test set 5 abut against the first side 321 of the extension portion 32, so that the notch regions 33 of two adjacent inner electrode layers 3 of the inner electrode layer 3 in the length direction abut against each other, thereby forming a hollow design with a larger area, reducing the printing requirement on the inner electrode layer 3, and achieving a high printing identification degree and a printing success rate of 95.8%. And the notch area 33 of the test set 4 abuts against the second side 322 of the extension portion 32, the notch areas 33 of two adjacent inner electrode layers 3 of the inner electrode layer 3 in the length direction do not abut against each other, the printing identification degree is low, and the problem of mesh blockage is easily caused in the printing process.

Claims (7)

1. A multilayer ceramic capacitor, comprising:

a laminated body formed of a plurality of laminated units alternately stacked on each other in a thickness direction, the laminated units including dielectric layers and internal electrode layers;

an external electrode formed on an end surface of the laminate and connected to the internal electrode layer;

the inner electrode layer comprises effective parts and extending parts connected with the outer electrodes, the projections of the effective parts of two adjacent laminated units in the thickness direction are overlapped, a notch area is arranged on a cross section formed by the extending parts in the length direction and the width direction, the notch area does not penetrate through the extending parts in the length direction and the width direction, and the notch area penetrates through the extending parts in the thickness direction;

the length of the inner electrode layer in the width direction is W0, the maximum length of the gap area in the width direction is We, wherein We < W0, and 0.2 < We/W0 < 0.7;

the maximum length of the extending part in the length direction is L1, the maximum length of the notch area in the length direction is Le, wherein L1-Le is more than 0, and Le/L1 is more than 0.2 and less than 0.8.

2. The multilayer ceramic capacitor according to claim 1, wherein the extension portion includes a first side connected to the external electrode, a second side connected to the effective portion and opposite to the first side, and third and fourth sides opposite to each other in a width direction, and the notch region abuts at least one of the first, second, third, and fourth sides.

3. The multilayer ceramic capacitor of claim 2, wherein the notched area abuts the first or second side in a length direction.

4. The multilayer ceramic capacitor of claim 2 wherein said cutaway area abuts said extension first side.

5. The multilayer ceramic capacitor according to claim 1, wherein the notch region has a cross-sectional area in the length direction and the width direction of Se, and the extension portion has a cross-sectional area in the length direction and the width direction of S1, wherein 0.1 < Se/S1 < 0.3.

6. The multilayer ceramic capacitor according to claim 1, wherein the laminate has a first principal surface in a thickness direction, the extending portions form an inclination angle with the first principal surface in a longitudinal direction, and the inclination angles of the extending portions of the plurality of laminate units with the first principal surface gradually decrease or increase in the thickness direction.

7. A method for producing a multilayer ceramic capacitor as claimed in any one of claims 1 to 6, comprising the steps of:

1) preparing slurry of the dielectric layer and forming a dielectric layer green body;

2) designing a film according to the required gap area, and preparing a corresponding printing screen plate;

3) printing an inner electrode layer on the dielectric layer green body through the printing screen in the step 2), and forming a preset gap area on the inner electrode layer;

4) stacking, pressing and cutting the dielectric layer green bodies of the plurality of printed inner electrode layers formed in the step 3) to form the laminated body;

5) sintering the laminated body formed in the step 4), and then electroplating the end face of the laminated body to form the external electrode.

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