CN111831598A - Hybrid data transmission method and data display optimization method - Google Patents

Hybrid data transmission method and data display optimization method Download PDF

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Publication number
CN111831598A
CN111831598A CN202010605900.4A CN202010605900A CN111831598A CN 111831598 A CN111831598 A CN 111831598A CN 202010605900 A CN202010605900 A CN 202010605900A CN 111831598 A CN111831598 A CN 111831598A
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China
Prior art keywords
data
remainder
coefficient
packet
controller
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Withdrawn
Application number
CN202010605900.4A
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Chinese (zh)
Inventor
徐银森
张宏根
李小东
杨林
颜色金
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Sichuan Suining Lipuxin Microelectronic Co ltd
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Sichuan Suining Lipuxin Microelectronic Co ltd
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Application filed by Sichuan Suining Lipuxin Microelectronic Co ltd filed Critical Sichuan Suining Lipuxin Microelectronic Co ltd
Priority to CN202010605900.4A priority Critical patent/CN111831598A/en
Publication of CN111831598A publication Critical patent/CN111831598A/en
Priority to CN202110385362.7A priority patent/CN112835830A/en
Priority to CN202120729683.XU priority patent/CN214409973U/en
Priority to CN202110385361.2A priority patent/CN112905509B/en
Withdrawn legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention discloses a hybrid data transmission method and a data display optimization method.A controller is used for enabling public integer data and remainder high-order data to form a data packet A and a data packet B, and the data packets are transmitted through a data bus; the remainder coefficient analyzing unit receives the remainder high-order data and the remainder coefficient data, obtains the remainder coefficient data, combines the remainder weight set in the PWM generating unit to generate complete remainder data, and the PWM generating unit combines the public integer data and the remainder data to generate PWM pulses to drive the LED display device to display. The invention determines the remainder coefficient data through the remainder high-order data, reduces the receiving quantity of the remainder coefficient, thereby leading the public integer data to be transmitted and received quickly and saving the data bus bandwidth.

Description

Hybrid data transmission method and data display optimization method
Technical Field
The invention relates to the technical field of LED display, in particular to a hybrid data transmission method and a data display optimization method.
Background
The LED display screen has the advantages of high gray scale, wide visual angle, rich colors, customizable screen shape and the like, and is widely applied to various fields of industry, traffic, commercial advertisement and the like. In the middle and high-order display process, the device for receiving the common integer data and the remainder coefficient data in a time-sharing manner usually receives the common integer data and stores the common integer data in a memory, then receives the remainder coefficient data for generating the remainder data, and displays the common integer data and the remainder coefficient data after all the common integer data and the remainder coefficient data are received in each display frame in a time-sharing manner, however, certain bus bandwidth is occupied for receiving the common integer data, and in the display process, the gray scale is incomplete before the remainder coefficient is received, and the display effect is poor.
Disclosure of Invention
The invention aims to provide a hybrid data transmission method and a data display optimization method, which utilize the characteristic of residue coefficient grouping and determine residue coefficient data through residue high-order data, thereby reducing the receiving quantity of the residue coefficient, enabling public integer data to be transmitted and received quickly, saving data bus bandwidth and ensuring display effect.
In order to solve the technical problems, the technical scheme provided by the invention is as follows: a hybrid data transmission method, comprising:
the controller makes a plurality of public integer and remainder high-order data into an A data packet, and makes a plurality of remainder coefficient data into a B data packet;
the controller sends the data packet A and the data packet B to a PWM (pulse-width modulation) generating unit for displaying through a data bus;
in the former period of the display frame, the controller sends the A data packet or sends the A data packet and the B data packet in a mixed mode, and in the latter period of the display frame, the controller only sends the B data packet.
According to the technical scheme, the controller sends the data packet A and the data packet B in a time-sharing mode within the front period time and the rear period time of a display frame, so that the PWM generating unit can simultaneously have common integer data and remainder coefficient data when receiving data.
Further, each A packet contains 1-3 common integer data and remainder high data. The remainder high data is used for determining remainder coefficient data in the display frame.
Further, the controller transmits only the a packet or cyclically transmits the a packet and the B packet at the front period of the display frame, and transmits only the B packet at the rear period of the display frame.
Further, the controller transmits the a packet when the remainder coefficient data is determined by the remainder high order data in the previous period of one display frame, and alternatively transmits the a packet and the B packet or transmits only the B packet when the remainder coefficient data is not determined by the remainder high order data.
Further, the method further comprises: the controller sends the remainder coefficient data to the PWM generating unit through a data bus.
In order to solve the above technical problems, the present invention further provides another technical solution: a method of data display optimization, comprising:
the memory receives and stores the public integer data and the remainder high-order data sent from the controller end;
the residue coefficient analyzing unit can receive the stored residue high data and the residue coefficient data at the same time and judge whether the residue coefficient data of the current group is determined by the residue high data;
when the remainder high data is used for determining remainder coefficient data, the remainder coefficient analysis unit analyzes the remainder high data to obtain the current set of remainder coefficient data;
when the remainder high-order data is not used for determining remainder coefficient data, the remainder coefficient analysis unit uses the remainder coefficient data sent by the controller as the remainder coefficient data of the current group;
and the PWM generating unit reads the common integer data and the remainder coefficient data and generates a PWM pulse signal to drive the LED display device to display.
By adopting the technical scheme, the remainder coefficient analyzing unit can receive the remainder high-order data and the remainder coefficient data at the same time, analyze and generate the remainder coefficient data according to the remainder high-order data or directly use the received remainder coefficient data, and when partial remainder high-order data is received, the PWM generating unit is used for receiving the public integer data and combining the remainder coefficient data sent by the remainder coefficient analyzing unit with the public integer data to generate PWM pulses to drive the display device to display, so that the bandwidth occupied by data transmission can be saved, and the display effect of the integer remainder can be guaranteed.
Further, the memory stores 1-2bit of remainder high order data. The residue coefficient analysis unit acquires residue high-order data in the memory, and determines more groups of residue coefficients when the data bits of the residue are higher, so that the memory can be used for generating enough residue coefficient data when storing 1-2bit residue high-order data, and the saved partial bandwidth can continuously receive common integer data.
Further, the PWM generating unit multiplies the set remainder weight by the remainder coefficient data to obtain complete remainder data. The residue coefficient data can be obtained by analyzing the residue high data by the residue coefficient analyzing unit or directly receiving the residue coefficient data.
Further, the data bit width of the remainder coefficient data obtained or received by the remainder coefficient parsing unit is 1bit or 2 bit.
The beneficial effects obtained by the invention are as follows: according to the invention, the public integer data, the remainder high-order data and the remainder coefficient data are mixed and transmitted, the remainder coefficient data can be directly received or a plurality of groups of remainder coefficients in each display frame are determined through the remainder high-order data, the transmission quantity of the remainder coefficient data can be reduced, the occupied bandwidth of a data bus is saved, the data transmission efficiency is improved, and when PWM pulse display is generated, the remainder data can be additionally displayed in the process of displaying the public integer data, so that the display effect is more uniform, and the display effect is ensured.
Drawings
Fig. 1 is a schematic diagram illustrating an implementation procedure of a hybrid data transmission method according to an embodiment of the present invention;
fig. 2 is a schematic diagram illustrating the composition of a data packet a and a data packet B in a hybrid data transmission method according to an embodiment of the present invention;
fig. 3 is a schematic diagram illustrating a manner of sending a data packet in a display frame according to a hybrid data transmission method of the present invention;
fig. 4 is a schematic diagram illustrating a method for transmitting a previous-period time packet in a display frame according to a hybrid data transmission method of the present invention;
FIG. 5 is a schematic diagram of a system structure of a method for optimizing a display effect according to an embodiment of the present invention;
fig. 6 is a schematic diagram illustrating implementation steps of a method for optimizing a display effect according to an embodiment of the present invention.
Detailed Description
The invention is further described with reference to the following figures and detailed description.
Example 1
Referring to fig. 1 to 4, a hybrid data transmission method includes:
s101: the controller makes a plurality of public integer and remainder high-order data into an A data packet, and makes a plurality of remainder coefficient data into a B data packet;
s102: the controller sends the data packet A and the data packet B to a PWM (pulse-width modulation) generating unit for displaying through a data bus;
s103: in the former period of the display frame, the controller sends the A data packet or sends the A data packet and the B data packet in a mixed mode, and in the latter period of the display frame, the controller only sends the B data packet.
Further, as an alternative embodiment, each a packet contains 1 to 3 common integer data and remainder high data.
Further, as an alternative embodiment, the controller only sends the a data packet or circularly sends the a data packet and the B data packet in the front period of the display frame, and only sends the B data packet in the rear period of the display frame.
Further, as an alternative embodiment, when the remainder coefficient data is determined by the remainder high order data in the previous period of a display frame, the controller transmits the a packet, and when the remainder coefficient data is not determined by the remainder high order data, the controller alternately transmits the a packet and the B packet or transmits only the B packet.
Further, as an optional implementation, the method further includes: the controller sends the remainder coefficient data to the PWM generating unit through a data bus.
Referring to fig. 2 and 3, the a packet includes common integer data and remainder high data, where the data bit width of the remainder high data may be 1-2 bits. Specifically, an A packet may contain 1-2 common integer data and remainder high order data.
For example, if the total length of the data bit width of the a packet is 16 bits, the common integer data is 6 bits, and the remainder high order data is 1bit, the packet can store 2 common integer data and 2 remainder high order data. During data transmission, 32 groups are controlled to display, LEDs with the number of 32 rows by 16 columns are controlled to display, the remainder coefficient is 1bit, the remainder data with the most significant bit controls the remainder coefficients of 16 groups, and the total amount of data transmitted by the bus before optimization is as follows: 6bit 32 row 16 column +1bit 32 row 16 column 32 group is 19456 bit; the total amount of data transmitted by the bus after the optimization by using the embodiment is as follows: (6bit +1bit) 32 rows by 16 columns +1bit 32 rows by 16 columns by 16 groups by 11776 bits; therefore, the total amount of data of the remainder coefficient needing to be received can be reduced by receiving the high-order data of the stored remainder, and the bandwidth of the data transmitted by the bus is effectively reduced.
Referring to fig. 4, the remainder high data determines the remainder coefficients of each row of the nth group and the n +2 th group, and the controller may transmit only the a data packet when the nth group and the n +2 th group are displayed. For the (n + 1) th group and the (n + 3) th group, the remainder coefficient needs to be provided by the bus transmission B packet. Furthermore, the remainder coefficient of each group of lines is determined by different remainder data bits R [6:2], and the data packet of the remainder coefficient determined by the remainder high-order data in the A data packet can be arranged at the front section of the display frame in the front section time of the display frame, so that each group of lines in the front section time of the display frame can meet the display requirement through the A data packet, the quick transmission of the common integer data can be finished, and the data transmission rate can be effectively improved.
Example 2
Referring to fig. 5 and 6, a data display optimization method, the method comprising:
s201: the memory receives and stores the public integer data and the remainder high-order data sent from the controller end;
s202: the residue coefficient analyzing unit can receive the stored residue high data and the residue coefficient data at the same time and judge whether the residue coefficient data of the current group is determined by the residue high data;
s203: when the remainder high data is used for determining remainder coefficient data, the remainder coefficient analysis unit analyzes the remainder high data to obtain the current set of remainder coefficient data;
s204: when the remainder high-order data is not used for determining remainder coefficient data, the remainder coefficient analysis unit uses the remainder coefficient data sent by the controller as the remainder coefficient data of the current group;
s205: and the PWM generating unit reads the common integer data and the remainder coefficient data and generates a PWM pulse signal to drive the LED display device to display.
Further, as an optional implementation mode, the memory stores 1-2bit of remainder high-order data.
Further, as an alternative embodiment, the PWM generating unit obtains complete remainder data by multiplying the set remainder weight by the remainder coefficient data.
Further, as an optional implementation manner, the data bit width of the remainder coefficient data obtained or received by the remainder coefficient parsing unit through parsing is 1bit or 2 bits.
It should be understood that the remainder data is obtained by multiplying each set of remainder coefficients by the remainder weight, and the remainder portion, after removal of the remainder weight portion, determines each set of remainder coefficients.
For example, the remainder weight of a remainder R6: 0 with a data bit width of 7 bits is set to 4, and each set of remainder coefficients is determined by R6: 2. The remainder portion is divided into 32 groups, where R6 determines 16 groups of remainder coefficients and R5 determines 8 groups of remainder coefficients. In practical application, the highest 1-2bit data in the remainder data is stored, and most groups of remainder coefficients can be determined, so that after the memory can store the data of the remainder part with the higher data bits of 1-2 bits, the residual bandwidth of the data bus is used for transmitting and receiving common integer data. According to this embodiment 1, the part of the data having higher data bits of the remainder part is referred to as remainder upper data, e.g., remainder R6 and remainder R5.
Further referring to fig. 6, the memory receives and stores the common integer data and the remainder high data and the remainder coefficient data, wherein the remainder high data and the remainder coefficient data may be stored in the same memory or in two memories, respectively.
When the PWM generating unit generates PWM pulses to drive and display a certain group of PWM pulses and the group of remainder coefficient data is determined by the remainder high-order data, the remainder coefficient analyzing unit selects the remainder high-order data to analyze to obtain data which is used as the group of remainder coefficients; if the set of residue coefficient data is determined by the residue low data, the residue coefficient parsing unit uses the residue coefficient data received from the bus as the set of residue coefficients.
In summary, the actual samples of the present invention are prepared according to the description and the drawings, and after a plurality of usage tests, the effect of the usage tests proves that the present invention can achieve the expected purpose, and the practical value is undoubted. The above-mentioned embodiments are only for convenience of illustration and not intended to limit the invention in any way, and those skilled in the art will be able to make equivalents of the features of the invention without departing from the technical scope of the invention.

Claims (9)

1. A hybrid data transmission method, comprising:
the controller makes a plurality of public integer and remainder high-order data into an A data packet, and makes a plurality of remainder coefficient data into a B data packet;
the controller sends the data packet A and the data packet B to a PWM (pulse-width modulation) generating unit for displaying through a data bus;
in the former period of the display frame, the controller sends the A data packet or sends the A data packet and the B data packet in a mixed mode, and in the latter period of the display frame, the controller only sends the B data packet.
2. The hybrid data transmission method according to claim 1, wherein: each a packet contains 1-3 common integer data and remainder high data.
3. The hybrid data transmission method according to claim 1, wherein: and in the front period of the display frame, the controller only sends the A data packet or circularly sends the A data packet and the B data packet, and in the rear period of the display frame, the controller only sends the B data packet.
4. The hybrid data transmission method according to claim 1, wherein: when the remainder coefficient data is determined by the remainder high-order data in the front section time of one display frame, the controller sends an A data packet, and when the remainder coefficient data is not determined by the remainder high-order data, the controller alternately sends the A data packet and the B data packet or only sends the B data packet.
5. The hybrid data transmission method according to claim 1, wherein: the method further comprises the following steps: the controller sends the remainder coefficient data to the PWM generating unit through a data bus.
6. A method for optimizing data display, comprising:
the memory receives and stores the public integer data and the remainder high-order data sent from the controller end;
the residue coefficient analyzing unit can receive the stored residue high data and the residue coefficient data at the same time and judge whether the residue coefficient data of the current group is determined by the residue high data;
when the remainder high data is used for determining remainder coefficient data, the remainder coefficient analysis unit analyzes the remainder high data to obtain the current set of remainder coefficient data;
when the remainder high-order data is not used for determining remainder coefficient data, the remainder coefficient analysis unit uses the remainder coefficient data sent by the controller as the remainder coefficient data of the current group;
and the PWM generating unit reads the common integer data and the remainder coefficient data and generates a PWM pulse signal to drive the LED display device to display.
7. The data display optimization method of claim 6, wherein: the memory stores 1-2bit of remainder high-order data.
8. The data display optimization method of claim 6, wherein: the PWM generating unit multiplies the set remainder weight by the remainder coefficient data to obtain complete remainder data.
9. The data display optimization method of claim 7, wherein: the data bit width of the remainder coefficient data obtained or received by the remainder coefficient analysis unit is 1bit or 2 bit.
CN202010605900.4A 2020-04-15 2020-06-29 Hybrid data transmission method and data display optimization method Withdrawn CN111831598A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
CN202010605900.4A CN111831598A (en) 2020-06-29 2020-06-29 Hybrid data transmission method and data display optimization method
CN202110385362.7A CN112835830A (en) 2020-04-15 2021-04-09 Gray data display driving module and gray data transmission method
CN202120729683.XU CN214409973U (en) 2020-04-15 2021-04-09 Gray data display driving module
CN202110385361.2A CN112905509B (en) 2020-04-15 2021-04-09 Gray data transmission controller, transmission control system and transmission method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010605900.4A CN111831598A (en) 2020-06-29 2020-06-29 Hybrid data transmission method and data display optimization method

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CN111831598A true CN111831598A (en) 2020-10-27

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112992066A (en) * 2021-04-26 2021-06-18 北京集创北方科技股份有限公司 Display data access method and control circuit thereof, display and information processing device
CN112992054A (en) * 2021-04-19 2021-06-18 成都利普芯微电子有限公司 Gray data display driving module, controller, transmission system and transmission method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112992054A (en) * 2021-04-19 2021-06-18 成都利普芯微电子有限公司 Gray data display driving module, controller, transmission system and transmission method
CN112992054B (en) * 2021-04-19 2023-08-08 成都利普芯微电子有限公司 Gray data display driving module, controller, transmission system and transmission method
CN112992066A (en) * 2021-04-26 2021-06-18 北京集创北方科技股份有限公司 Display data access method and control circuit thereof, display and information processing device
CN112992066B (en) * 2021-04-26 2021-09-07 北京集创北方科技股份有限公司 Display data access method and control circuit thereof, display and information processing device

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Application publication date: 20201027