CN111831573A - Method, device, computer system and medium for determining code branch coverage condition - Google Patents
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Abstract
The present disclosure provides a method for determining a code branch coverage condition, including: determining a logic syntax tree of the target application program according to the code logic of the target application program, wherein the logic syntax tree comprises a plurality of branches, and each branch is used for representing a function call relation in the code of the target application program; acquiring function call chain information of an executed code in the process of testing a target application program; generating a branch relation graph of the executed code according to the function call chain information of the executed code; and determining the code branch coverage condition of the target application program in the test process according to the branch relation graph and the logic syntax tree of the executed code. The present disclosure provides a device, a computer system and a medium for determining a code branch coverage condition. The method and the device for determining the code branch coverage condition can be used for determining the code branch coverage condition in the software testing process in the financial field or other fields.
Description
Technical Field
The present disclosure relates to the field of computer technologies, and in particular, to a method, an apparatus, a computer system, and a medium for determining a code branch coverage condition.
Background
Software testing is the process of executing a program to discover errors in the program, and is a software process that helps identify the accuracy (correction), completeness (completeness), and quality (quality) of the computer software (in whole or in part) that is developed (intermediate or final version). The test scenario should cover all program branches as much as possible, so as to avoid software errors from being discovered due to test scenario omission. The black box test is an important means of software test, and in the process of the black box test, because testers are difficult to master the code program branch and the execution condition of the program branch, the judgment of the test coverage condition of the code branch is always a difficult problem in the black box test.
Disclosure of Invention
In view of the above, the present disclosure provides a method, apparatus, computer system, and medium for determining a code branch coverage condition.
One aspect of the present disclosure provides a method for determining a code branch coverage condition, including: determining a logic syntax tree of a target application program according to code logic of the target application program, wherein the logic syntax tree comprises a plurality of branches, and each branch is used for representing a function call relation in the code of the target application program; in the process of testing the target application program, function call chain information of an executed code is obtained, wherein the function call chain information comprises a plurality of functions in the executed code and call relations among the functions; generating a branch relation graph of the executed code according to the function call chain information of the executed code, wherein the branch relation graph comprises a plurality of branches, and each branch is used for representing the function call relation in the executed code; and determining the code branch coverage condition of the target application program in the test process according to the branch relation graph of the executed code and the logic syntax tree.
According to an embodiment of the present disclosure, obtaining function call chain information of an executed code includes: determining an entry function in code of the target application; mounting a instrumentation program on the entry function to execute the instrumentation program simultaneously when the entry function is determined to be executed; and in the process of executing the code of the target application program, acquiring function call chain information of the code in the executing process through the instrumentation program.
According to an embodiment of the present disclosure, generating a branch relation graph of the executed code according to function call chain information in the executed code includes: performing at least one of data deduplication, data cleaning and standardized processing on the function call chain information to obtain processed function call chain information; and integrating a plurality of functions in the processed function call chain information and call relations among the functions to obtain a branch relation graph of the executed code.
According to the embodiment of the disclosure, determining the code branch coverage condition of the target application program in the test process according to the branch relation graph of the executed code and the logic syntax tree comprises: and determining the code branch coverage condition of the target application program in the test process according to the mapping relation between the branches in the branch relation graph of the executed code and the branches in the logic syntax tree.
According to an embodiment of the present disclosure, determining a code branch coverage condition of the target application program in a test process according to a mapping relationship between a branch in the branch relation graph of the executed code and a branch in the logical syntax tree includes: generating a covered branch list of the executed code according to the mapping relation between the branches in the branch relation graph of the executed code and the branches in the logic syntax tree; and/or generating an uncovered branch list of the executed code according to the mapping relation between the branches in the branch relation graph of the executed code and the branches in the logic syntax tree.
Another aspect of the present disclosure provides an apparatus for determining a code branch coverage condition, including: the system comprises a first determination module, a second determination module and a third determination module, wherein the first determination module is used for determining a logic syntax tree of a target application program according to code logic of the target application program, the logic syntax tree comprises a plurality of branches, and each branch is used for representing a function call relation in the code of the target application program; the obtaining module is used for obtaining function call chain information of an executed code in the process of testing the target application program, wherein the function call chain information comprises a plurality of functions in the executed code and call relations among the functions; the generating module is used for generating a branch relation graph of the executed code according to the function call chain information of the executed code, wherein the branch relation graph comprises a plurality of branches, and each branch is used for representing the function call relation in the executed code; and the second determining module is used for determining the code branch coverage condition of the target application program in the test process according to the branch relation graph of the executed code and the logic syntax tree.
According to an embodiment of the present disclosure, the obtaining module includes: a determining unit, configured to determine an entry function in the code of the target application; the mounting unit is used for mounting a plug program on the entry function so as to execute the plug program when the entry function is determined to be executed; and the acquisition unit is used for acquiring the function call chain information of the code in the execution process through the instrumentation program in the process of executing the code of the target application program.
According to an embodiment of the present disclosure, the generating module includes: the processing unit is used for performing at least one of data deduplication, data cleaning and standardized processing on the function call chain information to obtain processed function call chain information; and the integration unit is used for integrating the plurality of functions in the processed function call chain information and the call relation among the functions to obtain the branch relation graph of the executed code.
Another aspect of the present disclosure provides a computer-readable storage medium storing computer-executable instructions for implementing the method as described above when executed.
Another aspect of the disclosure provides a computer program comprising computer executable instructions for implementing the method as described above when executed.
Another aspect of the present disclosure provides a computer system comprising: one or more processors; storage means for storing one or more programs, wherein the one or more programs, when executed by the one or more processors, cause the one or more processors to implement the method as described above.
According to the embodiment of the disclosure, a technical means of determining a logic syntax tree of a target application program according to code logic of the target application program, acquiring function call chain information in an executed code in a process of testing the target application program, generating a branch relation diagram of the executed code according to the function call chain information of the executed code, and determining a code branch coverage condition of the target application program in a testing process according to the branch relation diagram and the logic syntax tree of the executed code is adopted. The code branch covering condition of the application program in the testing process is determined according to the relation between the branch relation diagram of the executed code generated in the testing process and the logic syntax tree generated by the original code, so that the program branch calling condition in the testing process can be mastered, and the technical problem of program defects caused by the fact that a testing scene cannot cover the code branches in the related technology is solved.
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The above and other objects, features and advantages of the present disclosure will become more apparent from the following description of embodiments of the present disclosure with reference to the accompanying drawings, in which:
FIG. 1 schematically illustrates an exemplary system architecture to which the code branch coverage determination methods and apparatus of embodiments of the present disclosure may be applied;
FIG. 2 schematically illustrates a flow diagram of a method of determining code branch coverage in accordance with an embodiment of the present disclosure;
FIG. 3 schematically illustrates a flow diagram of a method of obtaining function call chain information in executed code, in accordance with an embodiment of the present disclosure;
FIG. 4 schematically illustrates a flow diagram of a method of generating a branch relation diagram for executed code, in accordance with an embodiment of the present disclosure;
FIG. 5 schematically shows a block diagram of a device for determining a code branch coverage situation according to an embodiment of the present disclosure; and
FIG. 6 schematically shows a block diagram of a computer system according to an embodiment of the disclosure.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is illustrative only and is not intended to limit the scope of the present disclosure. In the following detailed description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the embodiments of the disclosure. It may be evident, however, that one or more embodiments may be practiced without these specific details. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present disclosure.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. The terms "comprises," "comprising," and the like, as used herein, specify the presence of stated features, steps, operations, and/or components, but do not preclude the presence or addition of one or more other features, steps, operations, or components.
All terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art unless otherwise defined. It is noted that the terms used herein should be interpreted as having a meaning that is consistent with the context of this specification and should not be interpreted in an idealized or overly formal sense.
Where a convention analogous to "at least one of A, B and C, etc." is used, in general such a construction is intended in the sense one having skill in the art would understand the convention (e.g., "a system having at least one of A, B and C" would include but not be limited to systems that have a alone, B alone, C alone, a and B together, a and C together, B and C together, and/or A, B, C together, etc.). Where a convention analogous to "A, B or at least one of C, etc." is used, in general such a construction is intended in the sense one having skill in the art would understand the convention (e.g., "a system having at least one of A, B or C" would include but not be limited to systems that have a alone, B alone, C alone, a and B together, a and C together, B and C together, and/or A, B, C together, etc.).
The embodiment of the present disclosure provides a method for determining a code branch coverage condition, including: determining a logic syntax tree of the target application program according to the code logic of the target application program, wherein the logic syntax tree comprises a plurality of branches, and each branch is used for representing a function call relation in the code of the target application program; in the process of testing a target application program, acquiring function call chain information of an executed code, wherein the function call chain information comprises a plurality of functions in the executed code and call relations among the functions; generating a branch relation graph of the executed code according to function call chain information in the executed code, wherein the branch relation graph comprises a plurality of branches, and each branch is used for representing the call relation among functions in the executed code; and determining the code branch coverage condition of the target application program in the test process according to the branch relation graph and the logic syntax tree of the executed code.
Fig. 1 schematically illustrates an exemplary system architecture 100 to which the code branch coverage determination method and apparatus of embodiments of the present disclosure may be applied. It should be noted that fig. 1 is only an example of a system architecture to which the embodiments of the present disclosure may be applied to help those skilled in the art understand the technical content of the present disclosure, and does not mean that the embodiments of the present disclosure may not be applied to other devices, systems, environments or scenarios.
As shown in fig. 1, a system architecture 100 according to this embodiment may include an electronic device 101, a test server 102, and a code repository server 103.
The code repository server 103 may store raw code of the application under test, which may be compiled and then deployed to a test environment provided by the test server 102. The test environment may be, for example, an environment provided by a virtual machine running in the test server 102, into which the code of the application program is deployed and the test may be performed.
The test environment provided by the test server 102 may be configured with a custom analysis program, for example, an instrumentation program, where execution of the instrumentation program may obtain instrumentation point data of the application program in the execution process, and the instrumentation point data may include, for example, a call relationship between functions, an execution result of each function, and the like, and different instrumentation point data may be obtained as needed. The acquired stub point data may then be sent to the electronic device 101.
After acquiring the pile point data sent by the test server 102, the electronic device 101 may analyze the pile point data to obtain performance data related to the test. For example, the stub data may include a call relationship between functions in the executed code, and a branch relationship diagram of the executed code may be generated according to the call relationship between the functions.
The electronic device 101 may further obtain an original code of the application program from the code repository server 103, and then analyze statements in the code to obtain a logical syntax tree, where each branch in the logical syntax tree may represent a function call relationship of the code.
The electronic device 101 analyzes the mapping relationship between the branch relationship diagram of the executed code generated by using the stub data and the logical syntax tree generated by using the original code of the application program, and may obtain the code branch coverage condition of the application program in the test process, for example, the code branch coverage condition may include a covered branch list and an uncovered branch list.
It should be understood that the number of electronic devices and servers in fig. 1 is merely illustrative. There may be any number of electronic devices and servers, as desired for implementation.
Fig. 2 schematically shows a flow chart of a method of determining a code branch coverage situation according to an embodiment of the present disclosure.
As shown in fig. 2, the method includes operations S201 to S204.
In operation S201, a logical syntax tree of the target application is determined according to the code logic of the target application.
Wherein the logical syntax tree comprises a plurality of branches, each branch for characterizing a function call relation in the code of the target application.
According to an embodiment of the present disclosure, the target application may be an application to be tested. The electronic device 101 may further obtain the original code of the application to be tested from the code repository server 103, and then obtain the logical syntax tree by analyzing the statements in the code. Statement logic in the code may be call relationships between functions, and thus, syntax trees may be used to characterize call relationships of functions in the code. A branch may be formed between every two nodes in the syntax tree, and each node may represent a function, and thus, a branch may be used to characterize a call relationship between the two functions.
For example, the code of the application program may include a function a, a function B, a function C, a function D, a function E, and the like, wherein the call relationship between the functions may include: function a may call function B, function a may call function C, function a may call function D, function B may call function E, etc. According to the calling relationship among the functions, the branches in the syntax tree can include: function A → function B, function A → function C, function A → function D, function B → function E, and so on.
In operation S202, in the process of testing the target application program, function call chain information of the executed code is obtained, where the function call chain information includes a plurality of functions in the executed code and call relationships between the functions.
According to the embodiment of the disclosure, the test server 102 may be configured with a parser in the test environment for parsing the code of the application program into byte code, and may be configured with an instrumentation program, which may be mounted on a key function of the application program, so as to execute the instrumentation program in parallel when executing the key function, wherein the key function may be an entry function and/or an exit function.
According to the embodiment of the disclosure, the instrumentation program can obtain instrumentation point data of the application program in the execution process, the instrumentation point data may include, for example, a call relationship between functions, an execution result of each function, and the like, and different instrumentation point data may be obtained as needed. The acquired stub point data may then be sent to the electronic device 101.
According to the embodiment of the present disclosure, following the above example, the function a may be an entry function, and a stub program may be mounted in the function a, and when the function a is executed, the stub program is executed additionally, and during the execution, the stub program may be configured to obtain a condition that the function a calls another function during the execution. For example, it may be obtained that function a calls function B, function C, function D, and the like during execution, and function B calls function E during calling function B. These invocation relationships may be sent to the electronic device 101.
In operation S203, a branch relation diagram of the executed code is generated according to the function call chain information of the executed code. The branch relation graph comprises a plurality of branches, and each branch is used for representing a function call relation in the executed code.
According to the embodiment of the present disclosure, the stub data and the stub data that the electronic device 101 may obtain and send by the test server 102 may include a call relationship between each function in the executed code, and the branch relationship diagram of the executed code may be generated according to the call relationship between each function by integrating the call relationship between each function.
In operation S204, a code branch coverage condition of the target application program in the test process is determined according to the branch relation diagram and the logic syntax tree of the executed code.
According to the embodiment of the disclosure, the electronic device 101 analyzes the mapping relationship between the branch relationship diagram of the executed code generated by using the stub data and the logical syntax tree generated by using the original code of the application program, so as to obtain the code branch coverage condition of the application program in the test process.
For example, branches of a logical syntax tree may include a function a → a function B, a function a → a function C, a function a → a function D, a function B → a function E, and branches in a branch relation diagram of executed code may include a → a function B, a function a → a function C, a function B → a function E. It may be determined that the covered branch includes a → function B, function a → function C, function B → function E, and the uncovered branch includes function a → function D.
According to the embodiment of the disclosure, the code branch coverage condition can also be displayed in a tree diagram manner, for example, different colors can be used in the tree diagram to respectively represent covered branches and uncovered branches. So that the tester can more intuitively obtain the code branch coverage condition. Functional testers can review test scenes and codes by using uncovered program branch lists; the project management personnel can utilize the code branch coverage condition to carry out quantitative analysis on the project testing progress; and project quality control personnel can predict and evaluate the project quality risk by using the code branch coverage condition.
According to the method and the device, the logic syntax tree of the target application program is determined according to the code logic of the target application program, in the process of testing the target application program, the function call chain information in the executed code is obtained, the branch relation diagram of the executed code is generated according to the function call chain information in the executed code, and the code branch covering condition of the target application program in the testing process is determined according to the branch relation diagram and the logic syntax tree of the executed code. According to the relation between the branch relation graph of the executed code generated in the testing process and the logic syntax tree generated by the original code, the code branch covering condition of the application program in the testing process is determined, the program branch calling condition in the testing process can be mastered, and the program defect caused by the fact that a testing scene cannot cover the code branch is avoided.
Fig. 3 schematically shows a flowchart of a method of obtaining function call chain information in executed code according to an embodiment of the present disclosure.
As shown in fig. 3, operation S202 includes operations S301 to S303.
In operation S301, an entry function in code of a target application is determined.
According to the embodiment of the disclosure, in the process of loading the target application program by the parser in the test server 102, the key function may be an entry function and/or an exit function of the program. For example, the function a may be instrumented, and specifically, the instrumentation tool may be loaded into the application process in an additional process manner, and the key function a may be mounted.
In operation S302, a instrumentation program is mounted on the entry function to simultaneously execute the instrumentation program when it is determined to execute the entry function.
In operation S303, in the process of executing the code of the target application program, function call chain information of the code in the process of execution is acquired through the instrumentation program.
According to the embodiment of the disclosure, after the test process is started, when the bytecode is loaded and the mounted key function is executed, the self-defined analysis code is added through the analyzer interface, so that the function execution condition and the function call chain information of the tested application program can be tracked and obtained.
FIG. 4 schematically illustrates a flow diagram of a method of generating a branch relation diagram for executed code, in accordance with an embodiment of the present disclosure.
As shown in fig. 4, operation S203 includes operations S401 to S402.
In operation S401, at least one of data deduplication, data cleansing, and normalization processing is performed on the function call chain information to obtain processed function call chain information.
In operation S402, a plurality of functions in the processed function call chain information and the call relationship between the functions are integrated to obtain a branch relationship diagram of the executed code.
According to the embodiment of the disclosure, the collected information is subjected to deduplication, cleaning, standardization processing and the like in real time, and the data can be packaged into a standardized protocol and sent to the electronic device 101. The electronic device 101 may perform an integrated analysis on the function call chain data of the same application under test in a specified test period to generate an executed code branch relation graph.
Fig. 5 schematically shows a block diagram of a device for determining a code branch coverage situation according to an embodiment of the present disclosure.
As shown in fig. 5, the apparatus 500 for determining the code branch coverage includes a first determining module 501, an obtaining module 502, a generating module 503, and a second determining module 504.
The first determining module 501 is configured to determine a logical syntax tree of the target application according to the code logic of the target application, where the logical syntax tree includes a plurality of branches, and each branch is used to characterize a function call relation in the code of the target application.
The obtaining module 502 is configured to obtain function call chain information of an executed code in a process of testing a target application program, where the function call chain information includes a plurality of functions in the executed code and call relationships between the functions.
The generating module 503 is configured to generate a branch relation graph of the executed code according to the function call chain information of the executed code, where the branch relation graph includes multiple branches, and each branch is used to characterize a function call relation in the executed code.
The second determining module 504 is configured to determine a code branch coverage condition of the target application program in the testing process according to the branch relation diagram and the logic syntax tree of the executed code.
According to the embodiment of the present disclosure, the obtaining module 502 includes a determining unit, a mounting unit, and an obtaining unit.
The determining unit is used for determining an entry function in the code of the target application program.
The mounting unit is used for mounting the instrumentation program on the entry function so as to execute the instrumentation program when the entry function is determined to be executed.
The acquisition unit is used for acquiring function call chain information of the code in the execution process through the instrumentation program in the process of executing the code of the target application program.
According to an embodiment of the present disclosure, the obtaining module 503 includes a processing unit and an integrating unit.
The processing unit is used for performing at least one of data deduplication, data cleaning and standardization processing on the function call chain information to obtain the processed function call chain information.
The integration unit is used for integrating a plurality of functions in the processed function call chain information and call relations among the functions to obtain a branch relation graph of the executed code.
According to the embodiment of the present disclosure, the second determining module 504 is configured to determine a code branch coverage condition of the target application in the testing process according to a mapping relationship between a branch in the branch relationship diagram of the executed code and a branch in the logical syntax tree.
The second determination module 504 includes a first generation unit and a second generation unit.
The first generation unit is used for generating a covered branch list of the executed code according to the mapping relation between the branches in the branch relation graph of the executed code and the branches in the logic syntax tree.
The second generating unit is used for generating an uncovered branch list of the executed code according to the mapping relation between the branches in the branch relation graph of the executed code and the branches in the logic syntax tree.
It should be noted that the method and the apparatus for determining a code branch coverage condition provided by the embodiment of the present disclosure may be used for determining a code branch coverage condition in a software testing process in the financial field, and may also be used for determining a code branch coverage condition in a software testing process in any field other than the financial field.
Any number of modules, sub-modules, units, sub-units, or at least part of the functionality of any number thereof according to embodiments of the present disclosure may be implemented in one module. Any one or more of the modules, sub-modules, units, and sub-units according to the embodiments of the present disclosure may be implemented by being split into a plurality of modules. Any one or more of the modules, sub-modules, units, sub-units according to embodiments of the present disclosure may be implemented at least in part as a hardware circuit, such as a Field Programmable Gate Array (FPGA), a Programmable Logic Array (PLA), a system on a chip, a system on a substrate, a system on a package, an Application Specific Integrated Circuit (ASIC), or may be implemented in any other reasonable manner of hardware or firmware by integrating or packaging a circuit, or in any one of or a suitable combination of software, hardware, and firmware implementations. Alternatively, one or more of the modules, sub-modules, units, sub-units according to embodiments of the disclosure may be at least partially implemented as a computer program module, which when executed may perform the corresponding functions.
For example, any plurality of the first determining module 501, the obtaining module 502, the generating module 503 and the second determining module 504 may be combined and implemented in one module/unit/sub-unit, or any one of the modules/units/sub-units may be split into a plurality of modules/units/sub-units. Alternatively, at least part of the functionality of one or more of these modules/units/sub-units may be combined with at least part of the functionality of other modules/units/sub-units and implemented in one module/unit/sub-unit. According to an embodiment of the present disclosure, at least one of the first determining module 501, the obtaining module 502, the generating module 503 and the second determining module 504 may be implemented at least partially as a hardware circuit, such as a Field Programmable Gate Array (FPGA), a Programmable Logic Array (PLA), a system on a chip, a system on a substrate, a system on a package, an Application Specific Integrated Circuit (ASIC), or may be implemented by hardware or firmware in any other reasonable manner of integrating or packaging a circuit, or may be implemented in any one of three implementations of software, hardware and firmware, or in a suitable combination of any of them. Alternatively, at least one of the first determining module 501, the obtaining module 502, the generating module 503 and the second determining module 504 may be at least partially implemented as a computer program module, which when executed may perform a corresponding function.
It should be noted that, a part of the apparatus for determining the code branch coverage condition in the embodiment of the present disclosure corresponds to a part of the method for determining the code branch coverage condition in the embodiment of the present disclosure, and the description of the part of the apparatus for determining the code branch coverage condition specifically refers to the part of the method for determining the code branch coverage condition, which is not described herein again.
Fig. 6 schematically shows a block diagram of a computer system suitable for implementing the above described method according to an embodiment of the present disclosure. The computer system illustrated in FIG. 6 is only one example and should not impose any limitations on the scope of use or functionality of embodiments of the disclosure.
As shown in fig. 6, a computer system 600 according to an embodiment of the present disclosure includes a processor 601, which can perform various appropriate actions and processes according to a program stored in a Read Only Memory (ROM)602 or a program loaded from a storage section 608 into a Random Access Memory (RAM) 603. Processor 601 may include, for example, a general purpose microprocessor (e.g., a CPU), an instruction set processor and/or associated chipset, and/or a special purpose microprocessor (e.g., an Application Specific Integrated Circuit (ASIC)), among others. The processor 601 may also include onboard memory for caching purposes. Processor 601 may include a single processing unit or multiple processing units for performing different actions of a method flow according to embodiments of the disclosure.
In the RAM 603, various programs and data necessary for the operation of the system 600 are stored. The processor 601, the ROM 602, and the RAM 603 are connected to each other via a bus 604. The processor 601 performs various operations of the method flows according to the embodiments of the present disclosure by executing programs in the ROM 602 and/or RAM 603. It is to be noted that the programs may also be stored in one or more memories other than the ROM 602 and RAM 603. The processor 601 may also perform various operations of the method flows according to embodiments of the present disclosure by executing programs stored in the one or more memories.
According to an embodiment of the present disclosure, system 600 may also include an input/output (I/O) interface 605, input/output (I/O) interface 605 also connected to bus 604. The system 600 may also include one or more of the following components connected to the I/O interface 605: an input portion 606 including a keyboard, a mouse, and the like; an output portion 607 including a display such as a Cathode Ray Tube (CRT), a Liquid Crystal Display (LCD), and the like, and a speaker; a storage section 608 including a hard disk and the like; and a communication section 609 including a network interface card such as a LAN card, a modem, or the like. The communication section 609 performs communication processing via a network such as the internet. The driver 610 is also connected to the I/O interface 605 as needed. A removable medium 611 such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, or the like is mounted on the drive 610 as necessary, so that a computer program read out therefrom is mounted in the storage section 608 as necessary.
According to embodiments of the present disclosure, method flows according to embodiments of the present disclosure may be implemented as computer software programs. For example, embodiments of the present disclosure include a computer program product comprising a computer program embodied on a computer readable storage medium, the computer program containing program code for performing the method illustrated by the flow chart. In such an embodiment, the computer program may be downloaded and installed from a network through the communication section 609, and/or installed from the removable medium 611. The computer program, when executed by the processor 601, performs the above-described functions defined in the system of the embodiments of the present disclosure. The systems, devices, apparatuses, modules, units, etc. described above may be implemented by computer program modules according to embodiments of the present disclosure.
The present disclosure also provides a computer-readable storage medium, which may be contained in the apparatus/device/system described in the above embodiments; or may exist separately and not be assembled into the device/apparatus/system. The computer-readable storage medium carries one or more programs which, when executed, implement the method according to an embodiment of the disclosure.
According to an embodiment of the present disclosure, the computer-readable storage medium may be a non-volatile computer-readable storage medium. Examples may include, but are not limited to: a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the present disclosure, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
For example, according to embodiments of the present disclosure, a computer-readable storage medium may include the ROM 602 and/or RAM 603 described above and/or one or more memories other than the ROM 602 and RAM 603.
The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams or flowchart illustration, and combinations of blocks in the block diagrams or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions. Those skilled in the art will appreciate that various combinations and/or combinations of features recited in the various embodiments and/or claims of the present disclosure can be made, even if such combinations or combinations are not expressly recited in the present disclosure. In particular, various combinations and/or combinations of the features recited in the various embodiments and/or claims of the present disclosure may be made without departing from the spirit or teaching of the present disclosure. All such combinations and/or associations are within the scope of the present disclosure.
The embodiments of the present disclosure have been described above. However, these examples are for illustrative purposes only and are not intended to limit the scope of the present disclosure. Although the embodiments are described separately above, this does not mean that the measures in the embodiments cannot be used in advantageous combination. The scope of the disclosure is defined by the appended claims and equivalents thereof. Various alternatives and modifications can be devised by those skilled in the art without departing from the scope of the present disclosure, and such alternatives and modifications are intended to be within the scope of the present disclosure.
Claims (10)
1. A method for determining code branch coverage, comprising:
determining a logic syntax tree of a target application program according to code logic of the target application program, wherein the logic syntax tree comprises a plurality of branches, and each branch is used for representing a function call relation in the code of the target application program;
in the process of testing the target application program, function call chain information of an executed code is obtained, wherein the function call chain information comprises a plurality of functions in the executed code and call relations among the functions;
generating a branch relation graph of the executed code according to the function call chain information of the executed code, wherein the branch relation graph comprises a plurality of branches, and each branch is used for representing the function call relation in the executed code; and
and determining the code branch coverage condition of the target application program in the test process according to the branch relation graph of the executed code and the logic syntax tree.
2. The method of claim 1, wherein obtaining function call chain information for executed code comprises:
determining an entry function in code of the target application;
mounting a instrumentation program on the entry function to execute the instrumentation program simultaneously when the entry function is determined to be executed; and
and in the process of executing the code of the target application program, acquiring function call chain information of the code in the executing process through the instrumentation program.
3. The method of claim 1 or 2, wherein generating the branch relation graph of the executed code according to the function call chain information of the executed code comprises:
performing at least one of data deduplication, data cleaning and standardized processing on the function call chain information to obtain processed function call chain information; and
and integrating a plurality of functions in the processed function call chain information and call relations among the functions to obtain a branch relation graph of the executed code.
4. The method of claim 1 or 2, wherein determining code branch coverage of the target application during testing from the branch relation graph of the executed code and the logical syntax tree comprises:
and determining the code branch coverage condition of the target application program in the test process according to the mapping relation between the branches in the branch relation graph of the executed code and the branches in the logic syntax tree.
5. The method of claim 4, wherein determining code branch coverage of the target application during testing according to the mapping relationship between the branches in the branch relation graph of the executed code and the branches in the logical syntax tree comprises:
generating a covered branch list of the executed code according to the mapping relation between the branches in the branch relation graph of the executed code and the branches in the logic syntax tree; and/or
And generating an uncovered branch list of the executed code according to the mapping relation between the branches in the branch relation graph of the executed code and the branches in the logic syntax tree.
6. An apparatus for determining code branch coverage, comprising:
the system comprises a first determination module, a second determination module and a third determination module, wherein the first determination module is used for determining a logic syntax tree of a target application program according to code logic of the target application program, the logic syntax tree comprises a plurality of branches, and each branch is used for representing a function call relation in the code of the target application program;
the obtaining module is used for obtaining function call chain information of an executed code in the process of testing the target application program, wherein the function call chain information comprises a plurality of functions in the executed code and call relations among the functions;
the generating module is used for generating a branch relation graph of the executed code according to the function call chain information of the executed code, wherein the branch relation graph comprises a plurality of branches, and each branch is used for representing the function call relation in the executed code; and
and the second determining module is used for determining the code branch coverage condition of the target application program in the test process according to the branch relation graph of the executed code and the logic syntax tree.
7. The apparatus of claim 6, wherein the means for obtaining comprises:
a determining unit, configured to determine an entry function in the code of the target application;
the mounting unit is used for mounting a plug program on the entry function so as to execute the plug program when the entry function is determined to be executed; and
and the acquisition unit is used for acquiring the function call chain information of the code in the execution process through the instrumentation program in the process of executing the code of the target application program.
8. The apparatus of claim 6 or 7, wherein the means for generating comprises:
the processing unit is used for performing at least one of data deduplication, data cleaning and standardized processing on the function call chain information to obtain processed function call chain information; and
and the integration unit is used for integrating the plurality of functions in the processed function call chain information and the call relation among the functions to obtain the branch relation graph of the executed code.
9. A computer system, comprising:
one or more processors;
a memory for storing one or more programs,
wherein the one or more programs, when executed by the one or more processors, cause the one or more processors to implement the method of any of claims 1-5.
10. A computer readable storage medium having stored thereon executable instructions which, when executed by a processor, cause the processor to carry out the method of any one of claims 1 to 5.
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112559343A (en) * | 2020-12-11 | 2021-03-26 | 腾讯科技（深圳）有限公司 | Test path generation method and related equipment |
| CN112783786A (en) * | 2021-02-01 | 2021-05-11 | 中国工商银行股份有限公司 | Test case generation method, device, equipment, medium and program product |
| CN113032254A (en) * | 2021-03-19 | 2021-06-25 | 中国工商银行股份有限公司 | Evaluation method and device for test coverage condition |
| CN113051173A (en) * | 2021-04-13 | 2021-06-29 | 广州虎牙科技有限公司 | Test flow arrangement execution method and device, computer equipment and storage medium |
| CN113127362A (en) * | 2021-04-23 | 2021-07-16 | 中国工商银行股份有限公司 | Object testing method, object testing device, electronic device, and readable storage medium |
| CN113448850A (en) * | 2021-06-29 | 2021-09-28 | 平安健康保险股份有限公司 | Method, system, device and medium for visualizing a chain of method calls |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070083933A1 (en) * | 2005-10-07 | 2007-04-12 | Microsoft Corporation | Detection of security vulnerabilities in computer programs |
| CN107797923A (en) * | 2017-10-10 | 2018-03-13 | 平安科技（深圳）有限公司 | Code coverage rate analysis method and application server |
| CN109271322A (en) * | 2018-09-25 | 2019-01-25 | 杭州群核信息技术有限公司 | A kind of software test range determining method, method for testing software and device |
| CN110389764A (en) * | 2019-06-19 | 2019-10-29 | 平安普惠企业管理有限公司 | Dead code method for cleaning, equipment, storage medium and device |
-
2020
- 2020-07-27 CN CN202010734322.4A patent/CN111831573B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070083933A1 (en) * | 2005-10-07 | 2007-04-12 | Microsoft Corporation | Detection of security vulnerabilities in computer programs |
| CN107797923A (en) * | 2017-10-10 | 2018-03-13 | 平安科技（深圳）有限公司 | Code coverage rate analysis method and application server |
| CN109271322A (en) * | 2018-09-25 | 2019-01-25 | 杭州群核信息技术有限公司 | A kind of software test range determining method, method for testing software and device |
| CN110389764A (en) * | 2019-06-19 | 2019-10-29 | 平安普惠企业管理有限公司 | Dead code method for cleaning, equipment, storage medium and device |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112559343A (en) * | 2020-12-11 | 2021-03-26 | 腾讯科技（深圳）有限公司 | Test path generation method and related equipment |
| CN112559343B (en) * | 2020-12-11 | 2022-11-15 | 腾讯科技（深圳）有限公司 | Test path generation method and related equipment |
| CN112783786A (en) * | 2021-02-01 | 2021-05-11 | 中国工商银行股份有限公司 | Test case generation method, device, equipment, medium and program product |
| CN112783786B (en) * | 2021-02-01 | 2024-02-09 | 中国工商银行股份有限公司 | Method, apparatus, device, medium and program product for generating test cases |
| CN113032254A (en) * | 2021-03-19 | 2021-06-25 | 中国工商银行股份有限公司 | Evaluation method and device for test coverage condition |
| CN113032254B (en) * | 2021-03-19 | 2024-05-31 | 中国工商银行股份有限公司 | Test coverage condition evaluation method and device |
| CN113051173A (en) * | 2021-04-13 | 2021-06-29 | 广州虎牙科技有限公司 | Test flow arrangement execution method and device, computer equipment and storage medium |
| CN113051173B (en) * | 2021-04-13 | 2024-04-19 | 广州虎牙科技有限公司 | Method, device, computer equipment and storage medium for arranging and executing test flow |
| CN113127362A (en) * | 2021-04-23 | 2021-07-16 | 中国工商银行股份有限公司 | Object testing method, object testing device, electronic device, and readable storage medium |
| CN113448850A (en) * | 2021-06-29 | 2021-09-28 | 平安健康保险股份有限公司 | Method, system, device and medium for visualizing a chain of method calls |
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