CN111814305B - Modeling method for voltage unevenness of pulse jump NPC (neutral point clamped) cascaded inverter capacitor - Google Patents

Modeling method for voltage unevenness of pulse jump NPC (neutral point clamped) cascaded inverter capacitor Download PDF

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CN111814305B
CN111814305B CN202010496445.9A CN202010496445A CN111814305B CN 111814305 B CN111814305 B CN 111814305B CN 202010496445 A CN202010496445 A CN 202010496445A CN 111814305 B CN111814305 B CN 111814305B
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朱俊杰
原景鑫
聂子玲
王玉杰
李广波
孙兴法
许金
芮万智
常永昊
王路
叶伟伟
韩一
曾雄
熊又星
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Naval University of Engineering PLA
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Abstract

The invention discloses a modeling method for capacitor voltage unevenness of a pulse hopping NPC (neutral point clamped) cascade inverter, wherein a capacitor voltage unevenness mechanism analyzes equivalent circuits when different vectors act, influences of the capacitor voltage unevenness including capacitor size, switching frequency, modulation ratio, load impedance and power factor are determined, a capacitor voltage unevenness current expression is obtained, a method of combining component superposition and a two-port equivalent circuit is adopted, a capacitor voltage unevenness first-order ordinary differential equation model is established from the angles of a capacitor voltage unevenness switching function and a capacitor voltage unevenness current, and unknown parameters of the model are solved by combining the actual working conditions of the inverter. The established multi-factor mathematical model for the uneven capacitor voltage is used for uniformly modeling the capacitance value, the switching frequency, the modulation ratio, the load impedance, the power factor and other factors of the capacitor, so that a six-dimensional spatial model for the uneven capacitor voltage is established, and the uneven change condition of the capacitor voltage when a plurality of variables act simultaneously can be analyzed.

Description

Modeling method for voltage unevenness of pulse jump NPC (neutral point clamped) cascaded inverter capacitor
Technical Field
The invention belongs to the technical field of power electronics, and particularly relates to a modeling method for voltage unevenness of a pulse-hopping NPC (neutral point clamped) cascade inverter capacitor.
Background
In recent years, with the development of power electronics technology, single-phase multi-level inverters have been widely used in various applications. The single-phase CHB-NPC inverter has the advantages of low output voltage harmonic content, high output power, low electromagnetic interference and the like, and has obvious application advantages in the fields of rail transit, electromagnetic emission, new energy power generation and the like.
The dc side capacitor voltage non-uniformity is an inherent problem of single phase CHB-NPC inverters, which can lead to poor inverter output voltage quality. More researches mainly realize that the voltage-sharing effect of the direct-current side capacitor is controlled by optimizing a modulation algorithm, and although a better voltage-sharing effect is obtained, quantitative analysis of various influencing factors on the unevenness of the capacitor voltage is lacked, the influence of the characteristic of the parameters of the inverter on the unevenness of the capacitor voltage is ignored, and the reduction of the unevenness of the voltage is not deeply researched from the design link of the inverter, so that the voltage-sharing effect is limited by the condition of the inverter.
In the research of a capacitor voltage balance domain of a diode-clamped five-level inverter (reported in the electrotechnical science), leap et al obtains the capacitor voltage balance domain in a space vector diagram by solving the influence of each vector action on branch bus current. However, the capacitor voltage unevenness is not quantitatively modeled in the analysis process, and the vector balance domain analysis method is not suitable for the single-phase CHB-NPC inverter. Liu war et al obtained a balanced domain curve of a midpoint potential with respect to a modulation ratio and a power factor by establishing a capacitance voltage unevenness formula in a research on a neutral point voltage balance problem of an active midpoint clamping type five-level inverter bus based on a space voltage vector (reported in Chinese Motor engineering), but lacked a modeling research on a voltage unevenness mechanism. In the three-level NPC inverter capacitance-voltage balance control analysis based on the midpoint current (reported in Chinese Motor engineering), Chenzhong et al analyzes the voltage-sharing balance characteristics of a three-phase NPC inverter, provides balance domains of power factors and modulation ratios in different modulation ranges, but does not establish a capacitance-voltage unified model influenced by multiple factors. Li Yong et al analyzed the midpoint potential non-uniformity mechanism of a T-type three-level inverter in the midpoint balance modeling and control of the T-type three-level inverter (power engineering technology), established a capacitance-voltage non-uniformity transfer function model, and analyzed the influence of current and power factors on the capacitor voltage non-uniformity, but did not further study the influence degree of other factors such as switching frequency.
The technology does not establish a mathematical model of capacitor voltage unevenness with uniform multi-factors such as capacitor size, switching frequency, power factor, modulation ratio, load impedance and the like, cannot analyze the influence of the multi-factors on the capacitor voltage unevenness simultaneously, and cannot further obtain key factors influencing the capacitor voltage unevenness when the inverter works under different working conditions. Although the specific value of the uneven capacitor voltage can be determined through software simulation, the obtained uneven capacitor voltage value is only a group of data points of the inverter running under a specific working condition, the action degree of each influence factor on the uneven capacitor voltage cannot be theoretically explained, the overall change rule of the uneven capacitor voltage cannot be analyzed, and theoretical guidance cannot be provided for parameter design of the inverter.
Disclosure of Invention
The invention aims to provide a modeling method for the uneven voltage of a pulse-hopping NPC (neutral point clamped) cascade inverter capacitor, which is used for simultaneously acting a plurality of variables and has high precision aiming at the defects of the prior art.
In order to achieve the purpose, the modeling method for the uneven capacitor voltage of the pulse-hopping NPC (neutral point clamped) cascade inverter is designed, the topological structure of a single-phase CHB-NPC inverter is formed by four NPC half-bridge circuits, the two NPC half-bridges are connected in parallel to form a five-level NPC type H bridge, the two H bridges are cascaded, the upper H bridge is a cascade unit CH1, the lower H bridge is a cascade unit CH2, and the cascade unit CH1 is formed by a bridge arm a and a bridge arm aBridge arm b, cascade unit CH2 composed of bridge arm c and bridge arm d, SxRepresents the x-th bridge arm state, x ═ a, b, c, d; the method is characterized in that: the capacitor voltage unevenness modeling method comprises the following steps:
1) the capacitor voltage unevenness mechanism analyzes equivalent circuits when different vectors act, influences of the capacitor voltage unevenness are determined to include capacitance size, switching frequency, modulation ratio, load impedance and power factor, and the expression of the capacitor voltage unevenness is as follows:
Figure GDA0003522771590000031
and obtaining the current expression of the capacitor voltage unevenness to cause the voltage unevenness Delta U of the upper H bridgeh1Current i ofc1The expression is as follows:
Figure GDA0003522771590000032
delta U causing lower H bridge voltage non-uniformityh2Current i ofc2The expression is as follows:
Figure GDA0003522771590000033
where k denotes the kth vector contribution, iLkRepresents the load current, S, at the time of the k-th vector actionakRepresents the state of the bridge arm a at the time of the k-th vector, SbkRepresents the state of the bridge arm b at the time of the kth vector, SckRepresents the state of the bridge arm c at the time of the kth vector, SdkRepresenting the state of a bridge arm d at the k vector;
2) the method of combining component superposition and two-port equivalent circuit is adopted, a first-order ordinary differential equation model of capacitor voltage unevenness is established from the angles of capacitor voltage unevenness switching function and capacitor voltage unevenness current, and unknown parameters of the model are solved by combining the actual working condition of the inverter
Capacitor voltage unevenness first order differential equation mathematical model formula (31)
Figure GDA0003522771590000034
Wherein, UHIs a constant voltage source voltage at the DC side of the H bridge, Ud1(tm) The/2 is the uneven peak value of the capacitor voltage in one fundamental wave period, C is the capacitance value of the supporting capacitor, | Z | is the load impedance of the inverter,
Figure GDA0003522771590000035
as the load power factor angle, omegarFor modulating the fundamental angular frequency of the wave, m is the modulation ratio, fsIs the switching frequency. The unknown parameter comprises StxFundamental angular frequency omegas1、StxAngle of power factor
Figure GDA0003522771590000036
Power factor angle coefficient k1Median theorem indefinite term delta t, indefinite integral term r and peak time tm；
After the solution is completed, the parameter S is addedtxFundamental angular frequency omegas1、StxAngle of power factor
Figure GDA0003522771590000041
Power factor angle coefficient k1Median theorem indefinite term delta t, indefinite integral term r and peak time tmAnd (31) the mathematical modeling of the capacitor voltage unevenness of the single-phase CHB-NPC inverter is completed.
Further, in the step 2), the mathematical model of the first-order differential equation of the capacitor voltage unevenness is approximated by a time scale reduction method, the switching function of the capacitor voltage unevenness is sinusoidal, and the coupling condition is decoupled.
Further, after mathematical modeling of the capacitor voltage unevenness of the single-phase CHB-NPC inverter in the step 2), sensitivity of the capacitor voltage unevenness is analyzed, and factors affecting the capacitor voltage unevenness are sorted, wherein the factors affecting the capacitor voltage unevenness include capacitor size, switching frequency, modulation ratio, load impedance and power factor.
Compared with the prior art, the invention has the following advantages:
1) the multi-factor mathematical model for the uneven capacitor voltage is established, the factors such as the capacitance value of the capacitor, the switching frequency, the modulation ratio, the load impedance, the power factor and the like are modeled uniformly, the six-dimensional spatial model for the uneven capacitor voltage is established, and the uneven change condition of the capacitor voltage when a plurality of variables act simultaneously can be analyzed.
2) The invention establishes a mathematical model of the uneven voltage of the capacitor, and performs mathematical modeling by adopting a method of combining component superposition and a two-port equivalent circuit, so that the obtained mathematical model of the uneven voltage of the capacitor has high precision. And carrying out sensitivity analysis on the influence factors of the capacitor voltage unevenness in the model so as to pertinently guide the parameter design of the inverter.
Drawings
FIG. 1 is a single phase CHB-NPC inverter topology;
FIG. 2 is a circuit diagram showing the equivalent effect of the switching vector (0,0,0,0) of level 0;
FIG. 3 is a circuit diagram showing the equivalent effect of the switching vector (1, -1,1, -1) of +4E level;
FIG. 4 is a circuit diagram showing the equivalent effect of the switching vector (-1,1, -1,1) at level-4E;
FIG. 5 is a two-port equivalent circuit of a single-phase CHB-NPC inverter;
FIG. 6 shows the time t of uneven peak of capacitor voltagemS in neighborhoodtxA value law graph of (1);
FIG. 7 is Ud1max>0 time StxA value map of (1);
FIG. 8 is Ud1max< 0 time StxA value map of (1);
FIG. 9 is a power factor angle
Figure GDA0003522771590000042
And
Figure GDA0003522771590000043
the relationship between;
FIGS. 10 to 14 are graphs comparing the model simulation results with the theoretical calculation results;
FIGS. 15 to 19 are the comparison of the experimental results with the theoretical calculation results.
Detailed Description
The invention is described in further detail below with reference to the figures and the specific embodiments.
The modeling method for the capacitor voltage unevenness of the pulse hopping NPC cascaded inverter comprises three parts, namely capacitor voltage unevenness mechanism analysis, capacitor voltage unevenness mathematical modeling and solving, capacitor voltage unevenness sensitivity analysis and the like. The relationship among the three is as follows: the capacitor voltage unevenness mechanism analyzes equivalent circuits when different vectors act, and the influence factors of capacitor voltage unevenness are determined as follows: the current expression influencing the uneven voltage of the capacitor is obtained according to the capacitance size, the switching frequency, the power factor, the load impedance and the modulation ratio. The capacitor voltage unevenness modeling and solving unifies five factors influencing the capacitor voltage unevenness, modeling is carried out by utilizing a capacitor voltage unevenness current expression, and finally a first-order ordinary differential equation model of the capacitor voltage unevenness is obtained. And analyzing the sensitivity of the capacitor voltage unevenness to obtain the sequencing of the influence degree of the capacitor voltage unevenness, so as to give important consideration to main factors during the design of inverter parameters. The specific functions of each part are as follows:
the capacitive voltage unevenness mechanism analysis is used for analyzing influence factors of capacitive voltage unevenness and determining main influence factors of capacitive voltage unevenness, and comprises the following steps: modulation ratio, power factor, capacitance size, switching frequency, load impedance, and a current expression of capacitance-to-voltage non-uniformity is established.
And modeling and solving the capacitor voltage unevenness, and establishing a quantitative relation between factors such as a capacitor capacitance value, a switching frequency, a modulation ratio, load impedance, a power factor and the like and the capacitor voltage unevenness. The method combines component superposition and two-port equivalent circuits to perform mathematical modeling, and establishes a mathematical relation between a capacitor voltage non-uniform switching function and capacitor voltage non-uniform by analyzing the effect of the capacitor voltage non-uniform current.
And analyzing the sensitivity of the uneven voltage of the capacitor, sequencing the action sizes of the factors influencing the uneven voltage of the capacitor, and specifically inhibiting the main factors during the design of the inverter parameters.
The capacitive voltage unevenness mechanism analysis confirms the influence factors of the capacitive voltage unevenness and the current expression causing the capacitive voltage unevenness; the modeling and solving of the capacitor voltage unevenness carry out integral operation on a capacitor voltage unevenness current expression, and influence factors such as a capacitor capacitance value, a switching frequency, a modulation ratio, load impedance, a power factor and the like are unified into a capacitor voltage unevenness mathematical model. And (4) analyzing the sensitivity of the uneven voltage of the capacitor, and sorting various factors influencing the uneven voltage of the capacitor.
The single-phase CHB-NPC inverter topology structure shown in figure 1 is composed of four NPC half-bridge circuits, two NPC half-bridges are connected in parallel to form a five-level NPC type H-bridge, and then the two H-bridges are cascaded to obtain the single-phase CHB-NPC inverter. Each H bridge DC side is provided with two supporting capacitors which are sequentially C from top to bottom1,C2,C3,C4，C1,C2,C3,C4Corresponding voltage values are respectively UC1,UC2,UC3,UC4The direct current end is composed of two independent sources U with equal sizeH1And UH2And power is supplied, and the output is connected with an RL load. The single-phase CHB-NPC inverter can output nine levels: 4E, ± 3E, ± 2E, ± E and 0. The single-phase CHB-NPC inverter is defined as follows:
a cascade unit: the upper H bridge is a cascade unit CH1, and the lower H bridge is a cascade unit CH 2.
Bridge arm definition: the cascade unit CH1 is composed of a bridge arm a and a bridge arm b, the cascade unit CH2 is composed of a bridge arm c and a bridge arm d, the bridge arms connected with the load are the bridge arm a and the bridge arm d, and SxRepresents the x-th bridge arm state, x ═ a, b, c, and d.
Defining a switch: bridge arm SxThe four switches are S from top to bottomxiX is a, b, c, d, i is 1,2,3,4, switch SxiThe pilot is denoted by 1 and off is denoted by 0.
Bridge arm state: each bridge arm SxThree states, 1,0, -1, can be represented as:
Figure GDA0003522771590000061
the current direction: the direction in which the current flows out of the inverter is defined as a positive direction.
The modeling method for the uneven capacitor voltage specifically comprises the following steps:
2) analysis of capacitor voltage non-uniformity mechanism
The capacitor voltage unevenness mechanism analyzes equivalent circuits when different vectors act, and the influence factors of capacitor voltage unevenness are determined as follows: the capacitance, the switching frequency, the modulation ratio, the load impedance and the power factor are used for obtaining a capacitance voltage uneven current expression;
2.1) capacitor Voltage non-uniformity accumulation characteristic
Setting the capacitance C in the Kth switching period1,C2,C3,C4Respectively has a voltage change amount of delta UCi(K) 1,2,3,4, the capacitance voltage expression at the end of K switching cycles is:
UCi(K)＝UCi(K-1)+ΔUCi(K) (2)
in the formula of UCi(K-1) and UCi(K) Respectively representing the capacitances C at the end of the K-th and Kth switching cyclesiThe voltage value of (2). The capacitor voltage of CH1 is analyzed to define the capacitor voltage unevenness DeltaU of the upper H bridge at the end of the Kth switching periodh1(K) The expression is as follows:
Figure GDA0003522771590000071
combining formulas (2) and (3) to obtain the capacitance voltage unevenness Delta U of the upper H bridgeh1(K) The expression is as follows:
Figure GDA0003522771590000072
iterative calculation is carried out on the first K switching periods of the formula (4) to obtain the capacitor voltage unevenness of 0-KTsReal-time expression of capacitor voltage unevenness in time period:
Figure GDA0003522771590000073
the above equation shows that the capacitor voltage is not uniform by DeltaU when the nth switching period is overh1(n) is the accumulation of the capacitor voltage non-uniformities for the first n switching cycles. If considered from the continuous time domain perspective, Δ Uh1The expression is an integral function with variable upper limit, and the uneven capacitor voltage has an accumulation characteristic.
2.2) equivalent Circuit analysis
The four power switches of each phase of the single-phase CHB-NPC inverter are simplified into single-pole three-throw switches, and C is assumed1＝C2＝C3＝C4The pulse-skipping SVPWM modulation algorithm has 27 action vectors, and the switching vectors of 0 and ± 4E levels are only used as an example for explanation.
Equivalent circuit of 0 level vector (0,0,0,0) action as shown in fig. 2, switch Sa2,Sb2,Sc2,Sd2And (5) closing. No current flows through the capacitor C1,C2,C3,C4The vector (0,0,0,0) does not charge or discharge the dc side capacitor, and has no influence on the voltage variation of the capacitor.
The equivalent circuit of the action of the switching vector (1, -1,1, -1) of +4E level is shown in FIG. 3, the switch Sa1,Sb1,Sc1,Sd1And (5) closing. When current iL>At 0, the bus capacitors of CH1 and CH2 are discharged simultaneously; when current iL<At 0, the bus capacitors of CH1 and CH2 are charged simultaneously, and the variation of the capacitor voltage is:
Figure GDA0003522771590000074
wherein Δ t represents the action time of the vector (1, -1,1, -1). The equivalent circuit of the switching vector (-1,1, -1,1) of level-4E is shown in FIG. 4. Switch Sa3,Sb1,Sc3,Sd1Closed when load current iL>At 0, the bus capacitors of CH1 and CH2 are discharged simultaneously, and the current iL<When 0, the upper H bridge bus capacitor and the lower H bridge bus capacitor are charged simultaneouslyThe capacitance voltage variation is:
Figure GDA0003522771590000081
it can be seen that the 4E level will only be for C1,C2,C3,C4The capacitor is charged or discharged at the same time, and the charge quantity of the charge and the discharge is completely equal, so that the capacitor voltage unevenness of the CH1 and the CH2 is not influenced.
The remaining 24 switching vector equivalent circuits were analyzed, and the relationship between the switching vector and the change in the capacitance voltage was obtained as shown in table 1. Wherein "-1", "+ 1", and "0" in the action vector column indicate the arm state defined by the formula (1), and "-1" in the capacitance-voltage change column indicates that the change amount of the capacitance voltage is-iLΔ t/C, "+ 1" indicates a change in capacitance voltage of iLΔ t/C, "0" indicates that the capacitor voltage does not change.
TABLE 1 correspondence between action vector and capacitance voltage variation
Figure GDA0003522771590000082
Figure GDA0003522771590000091
Suppose Sv＝Sa-Sb+Sc-SdAccording to table 1, the following functional relationship exists between the switching vector and the incremental capacitance voltage relationship:
when SvWhen the voltage is more than or equal to 0, the relation between the switching vector and the increment of the capacitor voltage is as follows:
Figure GDA0003522771590000092
when SvWhen the voltage is less than 0, the relation between the switching vector and the increment of the capacitor voltage is as follows:
Figure GDA0003522771590000093
the expressions of the capacitance voltage unevenness obtained by the vertical connection type (3), (8) and (9) are as follows:
Figure GDA0003522771590000101
where the subscript k denotes the kth vector contribution, Δ Uh1Indicates the voltage of upper H-bridge capacitor is not uniform, delta Uh2Indicates the voltage of the lower H-bridge capacitor is not uniform, iLkRepresents the load current,. DELTA.t, at the time of the k-th vector actionkRepresenting the action time of the kth vector, a sign (x) sign function being defined as
Figure GDA0003522771590000102
Combined (10) to cause upper H-bridge voltage non-uniformity DeltaUh1Current i ofc1The expression is as follows:
Figure GDA0003522771590000103
delta U causing lower H bridge voltage non-uniformityh2Current i ofc2The expression is as follows:
Figure GDA0003522771590000104
introducing a switching frequency fsAnd load impedance Z to DeltatkAnd iLkExpressed, the formula (10) is:
Figure GDA0003522771590000105
wherein d iskRepresents the kth vector duty cycle, uokWhen the k-th vector is actedThe output voltage of the inverter, | Z | represents the magnitude of the impedance,
Figure GDA0003522771590000106
representing the power factor angle. The formula (11) shows that S isak+SbkE {1,0, -1} and Sck+SdkE {1,0, -1}, the magnitude of the k-th period capacitor voltage imbalance is represented by C, fs,|Z|,
Figure GDA0003522771590000107
And uoDetermining that the direction of change is Sa+Sb,Sc+Sd,SvAnd uoAnd (6) determining.
Combining the analysis of the step 2.1) and the step 2.2), obtaining a mechanism of capacitance voltage unevenness: the equation (5) shows that the capacitor voltage unevenness has an accumulation characteristic, so that the capacitor voltage unevenness changes in real time along with different action vectors of the inverter; the formulas (8) and (9) show that the capacitors C on the direct current sides of the upper H bridge and the lower H bridge are arranged in the same time period1,C2,C3,C4The capacitance voltage variation is different due to different charging and discharging sizes; from equation (13), the capacitance C and the load can be seen
Figure GDA0003522771590000111
Switching frequency fsInverter output voltage uoSuch physical factors can affect the variation of the capacitor voltage unevenness in real time.
3) Mathematical model for uneven capacitor voltage
The method of combining component superposition and two-port equivalent circuit is adopted to establish a first-order ordinary differential equation model of capacitor voltage unevenness from the angles of capacitor voltage unevenness switching function and capacitor voltage unevenness current, and the model is solved
3.1) two-port equivalent circuit model
According to the superposition principle, the output voltage uoIt can be equivalent to a superposition of two components: one part is the output voltage u of the inverter under the ideal condition that the capacitor voltage is completely balancedo1The other part is equivalent capacitance voltage source delta U with uneven capacitance voltageh1Caused by inverseInverter output voltage uo2. In order to realize equivalent component separation on the direct current side according to different voltage sources, the following variables are defined:
Figure GDA0003522771590000112
bus capacitor voltage UCx(x ═ 1,2,3,4) is represented by:
Figure GDA0003522771590000113
inverter output voltage uoExpressed as:
uo＝SaUC1-SbUC2+ScUC3-SdUC4 (16)
combining the formulas (13) and (14) to obtain an output voltage uoExpression:
Figure GDA0003522771590000114
order St1＝Sa+Sb，Sd1＝Sa-Sb，St2＝Sc+Sd，Sd2＝Sc-SdEquation (17) may be further expressed as:
Figure GDA0003522771590000115
wherein U isHThe voltage value of the ideal condition without the uneven voltage of the capacitor is equivalent to the voltage value of a constant voltage source, U d12 and Ud2And/2 is the capacitance voltage mean of CH1 and CH2, respectively. According to the equation (18), a two-port equivalent circuit of the single-phase NPC type H-bridge cascade inverter shown in fig. 5 is obtained.
According to the equivalent circuit shown in FIG. 5, the upper H-bridge capacitor voltage unevenness function DeltaUh1(τ) can representComprises the following steps:
Figure GDA0003522771590000121
a current i causing a capacitor voltage unevenness in a coupling formula (11)c1The expression is as follows:
Figure GDA0003522771590000122
Δ U within one modulation wave periodh1(τ) can be expressed as a piecewise function:
Figure GDA0003522771590000123
according to sine wave symmetry, Delta Uh1The non-uniform boundaries in both the positive and negative half cycles are equal, so only the non-uniform boundaries of the positive half cycle are solved. The model contains a switching function S of capacitor voltage unevennesstx(x is 1,2) and the uneven capacitor voltage component U of the lower H-bridged2These three variables result in a time-varying coupling of the model directly to Δ U over a complete fundamental periodh1The solution (tau) is complex and therefore the model needs to be simplified approximately.
3.2) model approximation
Switching function S for coupling component and capacitance voltage unevenness in modeltxThe following analysis was performed for each of the approximate conditions: due to Ud2Is a time variable, subtending Δ U at different timesh1The degree of influence of (c) is different. When U is turnedd2At 0, the coupled component pair DeltaUh1No influence is caused, the voltage-sharing algorithm has the characteristic of over-regulation, and when the voltage of the upper H-bridge capacitor is uneven and reaches the peak value, the action vector is finished and the voltage of the lower H-bridge capacitor is uneven and U is not evend2Adjustment of (2), the capacitor voltage of the lower H-bridge is not uniform Ud2Reaching the minimum value, the next switching cycle will be shifted to the pair Ud1And (4) adjusting. When external factors such as switching frequency, capacitance and the like meet the conditions, the voltage at U is increasedd1(tm)＝Ud1maxNear the time Ud2(tm) Can be approximated as 0, which means at tmWithin the neighborhood of Δ t, the coupling component Ud2For delta Uh1The influence of (a) can be basically ignored, and the expression of the voltage unevenness of the capacitor in the positive half period of the upper H bridge is as follows:
Figure GDA0003522771590000131
switching function S due to capacitor voltage non-uniformitytxThe change in each fundamental wave period is irregular, and S of the whole voltage equalizing process is directly comparedtxIt is difficult to express as a time-varying function. According to the control characteristics of the voltage-sharing algorithm, at tmIn the neighborhood, StxThe value law of (1) is shown in FIG. 6, Ud1max>0 and Ud1max< 0 time StxThe values of (a) are respectively shown in fig. 7 and fig. 8, and the mathematical expressions are as follows:
Figure GDA0003522771590000132
since the step function shown in equation (23) is subjected to fourier transform, and the harmonic is found to be an odd harmonic as a main component, the step function is approximated by a series of sine functions:
Figure GDA0003522771590000133
although the formula (24) can relatively accurately represent StxHowever, the series terms bring inconvenience to the modeling. To simplify the model, the harmonic component was analyzed for the CH1 voltage uneven current ic1The positive half-cycle expression of equation (24) ignores the coupling component and is expressed as:
Figure GDA0003522771590000134
analysis St1And Sd1+Sd2Product sum
Figure GDA0003522771590000139
The characteristics of the terms, it has been found that S can be used in the symmetrical neighborhood of the moment of the uneven peak of the capacitor voltaget1Approximation of fundamental component in place of St1I.e. by
Figure GDA0003522771590000135
Figure GDA0003522771590000136
ωs1As a function of the switching St1The angular frequency of the wave is such that,
Figure GDA0003522771590000137
is St1Load power factor angle.
According to the model approximation condition, the establishment and solving range of the model are both (t)m-△t,tm+. at). When the inverter actually works, the inverter is limited by hardware conditions and actual working conditions, the variation ranges of the capacitance, the switching frequency, the power factor, the impedance and the modulation ratio are limited, and the established model definition domain is shown in table 2.
TABLE 2 definition of elements
Figure GDA0003522771590000138
Figure GDA0003522771590000141
And (3) simultaneously carrying out derivation on two sides of the formula (22) to obtain:
Figure GDA0003522771590000142
the solution of equation (26) is:
Figure GDA0003522771590000143
wherein p (τ) and Q (τ) are each
Figure GDA0003522771590000144
Will be provided with
Figure GDA0003522771590000145
(iii) belt-in (27), yielding:
Figure GDA0003522771590000146
in the formula
Figure GDA0003522771590000147
And
Figure GDA0003522771590000148
respectively for load to modulated wave urAnd a switching function St1Angle of power factor of omegarAnd ωs1Are each urAnd St1Angular frequency, Z is the load impedance, r1And r2Is an indefinite integral constant term. Since the indefinite integral of equation (28) does not have an analytical solution, it is necessary to approximate it, and in order to solve the model while maintaining the calculation accuracy, the observation "time window" is further narrowed to tmOne switching period T being centralsInner, i.e. Δ t 1/2fsThe time range is (t)m-0.5Ts,tm+0.5Ts) According to the median theorem of integral, the indefinite integral term in equation (28) is approximately expressed as:
Figure GDA0003522771590000149
xi is a median theorem indefinite term with a value range of tm-0.5Ts≤ξ≤tm+0.5Ts，k1Is the power factor angle coefficient resulting from the interval reduction approximation. Let δ t be ξ and tmThe difference xi can be represented by tmExpressed as xi ═ tm+ δ t, combining equations (28) and (29), the capacitance-voltage variation boundary model can be obtained as:
Figure GDA00035227715900001410
in the formula, r is an indefinite integral constant term, a sine function exists in an index part in the model, the function form is still complex, and a first-order Taylor formula is utilized to approximately process the sine function of the index part to obtain a practical mathematical model of a first-order differential equation of uneven capacitance and voltage:
Figure GDA0003522771590000151
equation (31) is a final obtained capacitance-voltage non-uniformity function model, but some unknown parameters still exist in the model, so that the relevant parameters need to be further determined by combining actual application conditions of the inverter.
3.3) model solution
And (3) determining the unknown parameters in the mathematical model of the formula (31) by combining the actual working conditions of the inverter.
①StxFundamental angular frequency omegas1
StxThe fundamental frequency is determined by the size of the observation "time window" Δ t. When the inverter normally works, the switching frequency is generally not lower than 1kHz, because StxAt tmOccupying a plurality of switching periods nearby, and calculating S through simulation analysis under different switching frequenciestxHas an average number of occupied cycles of 4.56, corresponding to fs1＝219Hz，ωs1＝1381rad/s。
②StxAngle of power factor
Figure GDA0003522771590000152
Theoretically, StxPower factor angle of fundamental angular frequency
Figure GDA0003522771590000153
And load power factor angle
Figure GDA0003522771590000154
Satisfying the power triangle as shown in fig. 9, their relationship is:
Figure GDA0003522771590000155
in the formula fs1Is StxFundamental frequency, frIs the modulated wave frequency. Can solve
Figure GDA0003522771590000156
And
Figure GDA0003522771590000157
for simplicity of analysis, at tmAnd the relationship is approximately expressed by adopting first-order Taylor and linear superposition, and the formula (33) is obtained:
Figure GDA0003522771590000158
power factor angle coefficient k1
Power factor angle coefficient k1Correction coefficient, S, generated by approximation of an indefinite integral termtxThe higher the average frequency, the smaller the integration interval and the smaller the corresponding correction coefficient. When S istxWhen the average frequency is 219Hz, the correction coefficient is 1, and S is calculatedtxWhen the average frequency is increased to 1kHz, the corresponding zoom factor is 0.219, and Table 3 shows the difference StxRelation between average frequency and zoom ratio, the average zoom ratio is k1＝0.118。
TABLE 3StxAverage frequency and scaling factor relationship
Figure GDA0003522771590000161
Fourthly, indefinite term delta t of median theorem
According to the approximation process analysis of the indefinite integration of the formula (29), when the switching frequency is 1kHz, the maximum value of δ t is 0.0005; the maximum value of δ t is 0.000166 when the switching frequency is 3 kHz. In the switching frequency range of 1kHz to 3kHz, the switching frequency at equal intervals was taken, and the average value was set as the value of δ t in the model, and δ t was calculated to be 0.00027.
TABLE 4 switching frequency vs. δ t relationship
Figure GDA0003522771590000162
Indefinite integral term r and peak time tm
The uncertain integral term r is positioned in an exponential part, determines the magnitude of the capacitor voltage unevenness, is related to multiple factors such as the voltage grade of the inverter, the capacitance magnitude, the switching frequency, the load property, the modulation ratio and the like, and leads to the model complication and difficult solution through direct analysis in theory. Thus a simple method is to use Ud1The empirical value is approximated by using equation (34).
Figure GDA0003522771590000163
When τ is tmOf (1), U'd1(tm) When 0 is obtained, the following equation holds in combination with (26):
Ud1(tm)St1(tm)+2ur(tm)UH＝0 (35)
the peak time t can be obtained according to the formulam。
And (3) substituting the parameters into an equation (31), namely completing the mathematical modeling of the single-phase CHB-NPC inverter capacitance-voltage unevenness.
4) Capacitance voltage mura sensitivity analysis
Sensitivity analysis is a mathematical method for researching the degree of influence of independent variables on dependent variables, and can be used for evaluating the contribution of each factor to the uneven capacitance and voltage. Since the model application range is within the domain space shown in table 2, the analysis was performed by the local sensitivity method. In order to avoid the complexity of direct derivation, the sensitivity is calculated by using finite difference, the basic principle of the finite difference is to give a small change to an independent variable in a defined domain, the finite difference calculation is used for approximately replacing derivative operation, and when the change step length of the independent variable is fixed, the larger the output change is, the more sensitive the independent variable is. The sensitivity calculation formula is as follows:
Figure GDA0003522771590000171
in the formula x1，x2Two operating mode states DeltaU respectively representing factor xh1(x1) And Δ Uh1(x2) Are respectively represented at x1，x2The capacitor voltage under the working condition is not mean.
The inverter reference operating conditions were selected as in table 5 in combination with the actual inverter operating conditions studied.
TABLE 5 reference operating mode of each element
Figure GDA0003522771590000172
When the sensitivity of one factor is studied, the other factors are controlled to be constant values. Dividing the respective variable ranges shown in Table 2 into 10 equal parts at equal intervals, and defining the relative sensitivity of the influencing factor x in each equal part as RSxThe calculation formula is formula (37), and the overall sensitivity is defined as SSxThe calculation formula is formula (38).
Figure GDA0003522771590000173
Figure GDA0003522771590000174
Table 6 shows the results of the relative sensitivity and the overall sensitivity calculations in 10 aliquot zones. It can be seen that each factor in different sectionsRelative sensitivity of the elements RSxThe sizes are different. Overall relative sensitivity SSxThe method comprises the following steps from large to small: modulation ratio, capacitance, impedance, switching frequency, and power factor. As the actual working condition of the inverter is a point in the defined domain space, the sensitivity of the corresponding interval is selected for comparative analysis according to the actual condition during engineering application, and the relative sensitivity RS of each intervalxHas more practicability.
TABLE 6 relative sensitivity of the factors in the action section
Figure GDA0003522771590000181
In order to verify the accuracy of the inverter capacitor voltage unevenness model, a capacitor voltage unevenness mathematical model containing a plurality of factors is simulated. And (3) operating 10 fundamental wave periods under different working conditions, averaging the maximum value of the uneven capacitor voltage in each period, and taking the average value as the uneven capacitor voltage value under the working condition. The simulation sampling method comprises the following steps: the modulation ratio and the power factor are in the range of (0, 1), equal-interval simulation is carried out, and the other variables are respectively subjected to equal-interval sampling according to a certain multiple relation on the basis of the standard working condition of the table 5.
FIGS. 10-14 show the modulation ratio, capacitance magnitude, switching frequency, power factor, impedance magnitude and Δ Uh1A graph of the relationship (c). In order to facilitate unified comparison, per-unit calculation is carried out on the uneven capacitor voltage, and the reference value is the voltage U of the constant-voltage source at the direct-current sideH. The delta U obtained by simulationh1Compared with the calculation result of the model, the variation trends of the two are basically consistent, and the model is approximate and cannot be completely coincided with the simulation result. From the perspective of engineering applications, given an error bandwidth of 5%, the simulation data is substantially distributed within the error bandwidth centered on the model calculation.
Table 7 shows the fitting determination coefficient R of the simulated value and the calculated value2. The fitting effect of the modulation ratio and the switching frequency is poor, and the modulation ratio R is poor2At 0.9257, switching frequency R20.8720, power factorBest fit of numbers, R2Was 0.9817.
TABLE 7 analysis of model fitting Performance
Figure GDA0003522771590000191
In order to obtain more capacitance voltage waveforms under experimental conditions, equally spaced experiments with the reference condition shown in table 5 were performed on an RT-Lab experimental platform, and comparison of theoretical calculation values and experimental results are shown in fig. 15 to 19.
It can be seen that the error bandwidth of 5% of the model calculation result basically covers the capacitance voltage uneven value measured by the experiment, which shows that the model can describe the variation trend of the capacitance voltage uneven value. Fitting decision coefficient R of model calculated value and experimental data2The following were used: modulation ratio R20.8870; magnitude of capacitance R20.9749; switching frequency R20.7267; power factor R20.9801; magnitude of impedance R2The experimental results are in substantial agreement with theoretical calculations, 0.9578.
It is to be understood that the foregoing is by way of example only and is not intended as limiting the embodiments. It will be apparent to those skilled in the art that other variations and modifications can be made in the specific embodiments based on the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications therefrom are within the scope of the invention.
Those not described in detail in this specification are within the skill of the art.

Claims (3)

1. A modeling method for capacitor voltage unevenness of a pulse-hopping NPC (neutral-point clamped) cascade inverter is characterized in that a topological structure of a single-phase CHB-NPC inverter is composed of four NPC half-bridge circuits, two NPC half-bridges are connected in parallel to form a five-level NPC type H bridge, two H bridges are cascaded, the upper H bridge is a cascade unit CH1, the lower H bridge is a cascade unit CH2, the cascade unit CH1 is composed of a bridge arm a and a bridge arm b, and the cascade unit CH2 is composed of a bridge arm aArm c and arm d, SxRepresents the x-th bridge arm state, x ═ a, b, c, d; each H bridge DC side is provided with two supporting capacitors which are sequentially C from top to bottom1,C2,C3,C4，C1,C2,C3,C4Corresponding voltage values are respectively UC1,UC2,UC3,UC4The direct current end is composed of two independent sources U with equal sizeH1And UH2Power supply, output is connected with RL load; the method is characterized in that: the capacitor voltage unevenness modeling method comprises the following steps:
1) the capacitor voltage unevenness mechanism analyzes equivalent circuits when different vectors act, influences of the capacitor voltage unevenness are determined to include capacitance size, switching frequency, modulation ratio, load impedance and power factor, and the expression of the capacitor voltage unevenness is as follows:
Figure FDA0003522771580000011
the subscript k denotes the kth vector contribution, Δ Uh1Indicates the voltage of upper H-bridge capacitor is not uniform, delta Uh2Indicates that the lower H-bridge capacitor has uneven voltage uokRepresents the output voltage of the inverter when the kth vector acts, represents the magnitude of impedance,
Figure FDA0003522771580000012
representing the power factor angle, sign (x) is a sign function;
and obtaining the current expression of the capacitor voltage unevenness to cause the voltage unevenness Delta U of the upper H bridgeh1Current i ofc1The expression is as follows:
Figure FDA0003522771580000013
delta U causing lower H bridge voltage non-uniformityh2Current i ofc2The expression is as follows:
Figure FDA0003522771580000014
where k denotes the kth vector contribution, iLkRepresents the load current, S, at the time of the k-th vector actionakRepresents the state of the bridge arm a at the time of the k-th vector, SbkRepresents the state of the bridge arm b at the time of the kth vector, SckRepresents the state of the bridge arm c at the time of the kth vector, SdkRepresenting the state of a bridge arm d at the k vector;
2) by combining component superposition and two-port equivalent circuit, a first-order ordinary differential equation model of capacitor voltage unevenness is established from the angles of capacitor voltage unevenness switching function and capacitor voltage unevenness current, and a first-order differential equation mathematical model formula (31) of capacitor voltage unevenness is solved for unknown parameters of the model by combining the actual working conditions of the inverter
Figure FDA0003522771580000021
Wherein, UHIs a constant voltage source voltage at the DC side of the H bridge, Ud1(tm) The/2 is the uneven peak value of the capacitor voltage in one fundamental wave period, C is the capacitance value of the supporting capacitor, | Z | is the load impedance of the inverter,
Figure FDA0003522771580000022
as the load power factor angle, omegarFor modulating the fundamental angular frequency of the wave, m is the modulation ratio, fsIs the magnitude of the switching frequency; the unknown parameters include the switching function S of the capacitor voltage unevennesstxFundamental angular frequency ω ofs1Capacitor voltage non-uniform switching function StxAngle of power factor of
Figure FDA0003522771580000023
Power factor angle coefficient k1Median theorem indefinite term delta t, indefinite integral term r and peak time tm；
After the solution is completed, the parameter S is addedtxFundamental angular frequency omegas1、StxPower factorNumber angle
Figure FDA0003522771580000024
Power factor angle coefficient k1Median theorem indefinite term delta t, indefinite integral term r and peak time tmAnd (31) the mathematical modeling of the capacitor voltage unevenness of the single-phase CHB-NPC inverter is completed.
2. The method for modeling the capacitor voltage nonuniformity of a pulse-hopped NPC cascaded inverter of claim 1, wherein: in the step 2), the first-order differential equation mathematical model of the capacitor voltage unevenness is subjected to model approximation by adopting a time scale reduction method, the switch function of the capacitor voltage unevenness is subjected to sine, and the coupling condition is decoupled.
3. The method for modeling the capacitor voltage nonuniformity of a pulse-hopped NPC cascaded inverter of claim 1, wherein: and 2) after mathematical modeling of the capacitor voltage unevenness of the single-phase CHB-NPC inverter in the step 2), analyzing the sensitivity of the capacitor voltage unevenness, and sorting the factors influencing the capacitor voltage unevenness, wherein the factors influencing the capacitor voltage unevenness comprise the capacitor size, the switching frequency, the modulation ratio, the load impedance and the power factor.
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