CN111800226A - Sideband management circuit and method based on hardware arbitration - Google Patents
Sideband management circuit and method based on hardware arbitration Download PDFInfo
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- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
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- H—ELECTRICITY
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- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
- H04L12/40013—Details regarding a bus controller
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- H—ELECTRICITY
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- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
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- H—ELECTRICITY
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- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/407—Bus networks with decentralised control
- H04L12/417—Bus networks with decentralised control with deterministic access, e.g. token passing
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
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Abstract
The invention discloses a sideband management circuit and a method based on hardware arbitration, wherein a received frame processing unit, a simplified medium independent interface, a hardware arbitration unit, a register and a transmitted frame processing unit in the sideband management circuit are all connected with a main control unit, a system bus interface, the received frame processing unit and the transmitted frame processing unit are all connected with a channel arbitration unit, and the received frame processing unit, the transmitted frame processing unit and the hardware arbitration unit are all connected with the simplified medium independent interface. The sideband management circuit based on hardware arbitration only needs to add two external pins on hardware, and carries out hardware arbitration control by directly carrying out arbitration operation code receiving and sending between devices on a loop, and the whole arbitration process does not need to carry out command response interaction between a BMC and the circuit, thereby reducing the arbitration waiting time; the sender is selected by adopting a token passing strategy, and only the token holder can send data, so that the transmission of the sending right is ensured, the sending conflict is avoided, and the processing efficiency is improved.
Description
Technical Field
The present invention relates to the technical field of Network Controller Sideband Interface (NC-SI), and in particular, to Sideband communication between an ethernet Controller and a Baseboard Management Controller (BMC), and more particularly, to a hardware arbitration-based Sideband management circuit and method.
Background
The Ethernet can meet the security requirement of network communication between communication systems, has the characteristics of high performance, easy expansion, support of various connection modes such as coaxial cables, twisted-pair wires, optical fibers and the like, and is widely applied to the fields of military, commerce, industrial control and the like.
An ethernet controller is one of the core devices of an ethernet network, which processes and transmits data frames for an ethernet information system based on the IEEE802.3 protocol, and is one of the important determinants of the performance of the information system. The Ethernet controller supports data transmission between two network ports, and can also receive instructions of the BMC based on the NC-SI interface, so as to realize the management of the BMC on the Ethernet controller. The main purpose of the NC-SI protocol is to implement the management function of the BMC for Ethernet controller and the pass through functional service of data packets based on IEEE802.3 protocol. Based on the NC-SI interface, a transmission arbitration mechanism is introduced, the existence of a plurality of Ethernet controllers in the Ethernet network can be supported, and the data packet transmission is carried out by one Ethernet controller which is arbitrated and selected. The arbitration process of the ethernet control right can be performed based on a command sent by the BMC, or can be performed through a hardware arbitration pin. The arbitration mode is performed according to the BMC command, and the ethernet controller needs to give a corresponding command response sequence through the sideband management controller according to the arbitration command sequence sent by the BMC, and complete the arbitration process after multiple information interactions. In the process, the BMC needs to wait for responses of all the sending commands, and can send the subsequent commands after the responses are received, and a process of selecting the ethernet controller meeting the requirements needs a long waiting time, so that the information interaction efficiency is low.
Disclosure of Invention
The invention aims to provide a sideband management circuit and a sideband management method based on hardware arbitration aiming at the problem of information interaction efficiency between an Ethernet sideband management circuit and a BMC (baseboard management controller).
The invention adopts the following technical scheme:
a sideband management circuit based on hardware arbitration comprises a main control unit, a hardware arbitration unit, a channel arbitration unit, a received frame processing unit, a sent frame processing unit, a simplified medium independent interface, a register and a system bus interface. The system comprises a receiving frame processing unit, a simplified medium independent interface, a hardware arbitration unit, a register and a sending frame processing unit, wherein the receiving frame processing unit, the simplified medium independent interface, the hardware arbitration unit, the register and the sending frame processing unit are all connected with a main control unit; the main control unit is used for controlling the sideband management circuit, and comprises configuration of a simplified medium independent interface, starting control of a hardware arbitration unit, circuit state transition control, starting or closing hardware arbitration, generating a response code and a reason code, and performing data frame receiving and transmitting enabling control; the hardware arbitration unit is based on the hardware arbitration pin and is used for performing hardware arbitration control, operation code encoding and decoding, token processing and overtime processing and sending an arbitration result to the main control unit; the channel arbitration unit is used for finishing the channel selection of sending and receiving data frames based on the state of each channel; the received frame processing unit is used for judging the type of a received frame from the BMC, analyzing and checking a data frame of a command frame sent by the BMC, informing the extracted command frame header information to the main control unit, checking the frame length and the Cyclic Redundancy (CRC) of a received non-command frame passhrough, discarding an illegal pass through frame, and sending the data frame matched with a destination address and a source address to the channel arbitration unit; the transmission frame processing unit is used for framing a transmission frame according to the response code and the reason code generated by the main control unit, filtering the pass through frame from the channel arbitration unit according to a filtering rule configured by a command of the BMC, generating an asynchronous event frame when the state of the sideband management circuit is shifted, and sequentially transmitting the transmission frame to the simplified medium independent interface according to the priority of the data frame to be transmitted; the simplified medium independent interface is used for realizing information interaction between the sideband management circuit and the BMC, and comprises a data frame sending, receiving and storing function; the register is used for storing configuration information and configuration parameters of the command; the system bus interface is a data interaction interface of the sideband management circuit and the controller.
Preferably, the specific working process of the main control unit includes: controlling the working state of the circuit, configuring a simplified medium independent interface, performing data frame receiving and transmitting enabling control according to an arbitration result, generating a response code and a reason code required by command frame response according to configuration information and a command error indication signal, transmitting the response code and the reason code to a data frame sending control unit, and receiving response frame sending completion flag information when the command frame response is sent; when receiving the command error signal, it generates the abnormal command response code and reason code, and sends them to the data frame sending control unit.
Preferably, the hardware arbitration unit comprises a hardware arbitration control module, an operation code codec, a token processing module and an overtime management module, and the operation code codec, the token processing module and the overtime management module are all connected with the hardware arbitration control module; the hardware arbitration control module is used for managing the arbitration working state through the finite state machine according to the hardware arbitration enabling state and the received arbitration operation code; the operation code coder-decoder is used for decoding the received operation code and is responsible for generating the operation code meeting the requirement; the token processing module is used for giving a token holding signal or a token releasing signal according to whether the token operation code is received or not and sending the token holding signal or the token releasing signal to the hardware arbitration control module; and the timeout management module is used for recording the time of not receiving the token by using the counter, and generating a token timeout identification signal if the time exceeds the time limit of not holding the token, and informing the hardware arbitration control module.
Preferably, the channel arbitration unit can support 32 data channels at most, and for sending data frames, the sending channel priority is sequentially reduced along with the increase of the channel label, for example, the sending priority of channel 0 is the highest, and the sending priority of channel 31 is the lowest; for the received pass through frame, the pass number is still passed on the receiving data channel.
Preferably, the specific working process of the received frame processing unit includes: receiving a data frame from a simplified independent medium interface, judging the data frame according to a type field in an Ethernet frame header, extracting command parameters if the received BMC data frame is a command frame when the Ethernet frame type is '88F 8' in a 16-system manner, and checking and filtering the format if the received BMC data frame is a pass through frame; when the data frame format is checked, when the frame length error, CRC error, command parameter configuration error or checksum error of the received data frame is found, a command error indicating signal is generated or an illegal passhrough frame is discarded according to whether the received frame is a command frame or not, and the command frame format is informed to the main control unit; respectively counting the number of the received pass through frames and command frames according to the frame type of the Ethernet; and filtering the past through frame according to the frame header information of the past through frame according to the configuration of the BMC on the state of the sideband management circuit and the configuration condition of the filtering parameter, and sending the filtered past through frame to the channel arbitration unit.
Preferably, the specific working process of the data frame transmission control unit includes: framing a response frame according to the reason code and the response code of the main control unit; filtering a transmitted pass through frame sent by the channel arbitration unit according to frame header information and a data frame transmitting rule configured by the BMC through a command; generating an asynchronous event frame when the working state of the sideband management circuit is changed; sending a pass through frame, a command response frame and an asynchronous event frame from a channel arbitration unit to a simplified medium independent interface in sequence according to the sequence that the priority of the command response frame, the priority of the asynchronous event frame and the priority of the pass through frame are reduced in sequence, and sending a response completion flag signal to a main control unit when the sending is completed; under the condition that multiple channels are enabled simultaneously, according to the sequence of the sending priority from high to low, the channel with the high priority sends the whole frame of data firstly, the channel with the second priority sends the whole frame of data subsequently, and the polling of sending data frames is carried out in sequence.
Preferably, the system bus interface is an interactive interface of the data channel and the external device, and conforms to an Advanced Peripheral Bus (APB) protocol or an advanced high performance bus (AHB) protocol.
Preferably, the simplified medium independent interface is improved and designed based on RMII TM Specification-1998, and an input signal arb _ i pin and an output signal arb _ o pin are added for transmitting and receiving a hardware arbitration operation code; the data frame sending and receiving FIFO unit is adopted to store the sending and receiving data, the receiving and sending threshold values are set, the occupation quantity of the receiving FIFO is controlled to avoid overflow and the occupation quantity of the sending FIFO is controlled to avoid underflow respectively, and reliable sending and receiving of the data frames between the sideband management circuit and the BMC are realized; all data channels, such as 0-N (N ≦ 31), share the same simplified media independent interface.
Preferably, the registers store parameters of the circuit's configuration information, channel link status, "link setup" and "get link status" commands.
The hardware arbitration method is realized by arbitration operation code interaction between circuits on an Ethernet system loop based on a hardware arbitration pin, and specifically comprises the following steps:
s1, after the Ethernet system loop is electrified and reset, hardware arbitration units in all sideband management circuits on the Ethernet system loop send idle codes;
s2, after the arbitration process is started, the hardware arbitration units in all sideband management circuits on the Ethernet system loop start to send a clear command containing the ID number of the sideband management circuit to other sideband management circuits on the Ethernet system loop;
s3, in the process that the local sideband management circuit in the Ethernet system loop receives the clearing command, the local sideband management circuit forwards the clearing command with the ID number smaller than the ID number of the local sideband management circuit; for the clearing command with the ID number larger than the self ID, the clearing command is transmitted after being replaced by the self ID number; when the ID number in the received clear operation code is equal to the ID number of the local sideband management circuit, the local sideband management circuit is determined as an arbitration master device;
s4, when the arbitration master holds the token, the arbitration master can transmit data, and after the transmission is completed, the token is released.
The invention has the following beneficial effects:
the sideband management circuit based on hardware arbitration only needs to add two external pins (namely hardware arbitration pins) on hardware, and carries out hardware arbitration control by directly carrying out arbitration operation code receiving and sending between devices on a loop, and the whole arbitration process does not need to carry out command response interaction between a BMC and the circuit, thereby reducing arbitration waiting time; the sender is selected by adopting a token passing strategy, and only the token holder can send data, so that the transmission of the sending right is ensured, the sending conflict is avoided, and the data processing efficiency of the sideband management circuit is improved; meanwhile, the sideband management circuit realizes the error frame detection and processing and an efficient data receiving, transmitting and storing strategy, and further improves the reliability of the data frame processing of the sideband management circuit.
The hardware arbitration method of the invention utilizes the sideband management circuit and the token transmitted in the network to make a plurality of Ethernet controllers in the ring of the Ethernet system judge through the arbitration code, realizes token polling, and only the Ethernet controller holding the token has the right of sending data packets. Compared with command arbitration, the hardware arbitration method of the invention does not need information interaction between the Ethernet controller and the BMC, and has higher gating efficiency of the network controller.
Drawings
FIG. 1 is a schematic diagram of an application of a sideband management circuit based on hardware arbitration according to the present invention;
FIG. 2 is a block diagram of an implementation of a hardware arbitration based sideband management circuit of the present invention;
FIG. 3 is a state transition diagram of the primary control unit of the present invention;
FIG. 4 is a block diagram of a hardware arbitration unit implementation of the present invention;
FIG. 5 is a data frame transmission state transition diagram according to the present invention;
FIG. 6 is a flow chart of hardware arbitration opcode reception decision according to the present invention.
Detailed Description
The technical solution of the present invention is further described in detail by the accompanying drawings and embodiments.
The invention provides a sideband management circuit and a sideband management method based on hardware arbitration, which are suitable for processing sideband data interaction service between a BMC and an Ethernet controller; the judgment of the sending right on the loop is realized based on hardware arbitration, and command response interaction between the BMC and the circuit is not needed, so that the arbitration waiting time of a plurality of devices is shortened; the transmission right is transmitted in a token polling mode, so that not only can the equipment on a link be prevented from occupying the network for a long time, but also competition can be reduced, network blockage is avoided, and the data processing efficiency of the sideband management circuit is improved; the sideband management circuit realizes the error frame detection and processing and an efficient data receiving, transmitting and storing strategy, and further improves the reliability of data frame processing of the sideband management circuit.
The invention utilizes the main control unit to control the sideband management circuit, including hardware arbitration start control, data receiving and transmitting enable control, simplified medium independent interface configuration, circuit state transition control, command processing and reason code and response code generation; scheduling a hardware arbitration state machine by using a hardware arbitration unit and an arbitration control module, decoding an operation code received by a hardware arbitration pin by using an operation code codec, coding the operation code to be sent, executing operation of holding or forwarding a token by using a token processing module according to the requirement sent by a data frame and an arbitration result, recording the time for not receiving the token by using an overtime management module, and informing the arbitration control module when the timing exceeds a specified time limit; the method comprises the steps of utilizing a sending frame processing unit to confirm the priority of a sending frame, analyze the sending pass through, check and filter the format, frame grouping of a response frame and an asynchronous event frame, and sending a data frame to be sent to a simplified medium independent interface according to the priority; analyzing the received data frame by using a received frame processing unit, extracting command parameters, checking and filtering a pass through frame rule, and sending the effective pass through frame matched with the filtering to a channel arbitration unit; utilizing a channel arbitration unit to select a channel for receiving and transmitting the data frame according to the receiving and transmitting of the data frame and the priority of the channel; storing configuration information and related command configuration parameters by using a register; and the data interaction between the Ethernet controller and the sideband management circuit is realized by utilizing a system bus interface.
As shown in fig. 2, the sideband management circuit based on hardware arbitration of the present invention includes a main control unit, a hardware arbitration unit, a channel arbitration unit, a received frame processing unit, a transmitted frame processing unit, a simplified medium independent interface, a register, and a system bus interface; the system bus interface, the received frame processing unit and the sent frame processing unit are all connected with the channel arbitration unit, and the received frame processing unit, the sent frame processing unit and the hardware arbitration unit are all connected with the simplified medium independent interface.
The main control unit is used for carrying out circuit working mode scheduling and data frame receiving and sending enabling control according to the working state and the arbitration result of the current circuit, generating a response code and a reason code according to a command parameter and a command error indication signal sent by the received frame processing unit, sending the response code and the reason code to the data frame sending control unit, and receiving a response completion flag signal after the response frame is sent; in particular, when a command error signal is received, an illegal command flag signal is generated; and performing initial configuration on the simplified medium independent interface.
As shown in fig. 4, the hardware arbitration unit includes a hardware arbitration control module, and an operation code codec, a token processing module and a timeout management module connected to the hardware arbitration control module, wherein the hardware arbitration control module schedules an arbitration working state through a finite state machine according to a hardware arbitration enable state and a received operation code; the operation code coder-decoder decodes the operation code received by the hardware arbitration pin, informs the code word result to the main control unit, and codes the operation code; the token processing module is used for judging whether the master device is the premise according to the requirement sent by the data frame and the arbitration result, when the token is received, the master device holds the token when the data sending requirement exists, and otherwise, the token is forwarded; and the timeout management module records the time that the sideband management circuit to be sent with the data frame does not hold the token, generates a timeout mark if the time that the device does not hold the token exceeds the upper limit, informs the hardware arbitration control module, and restarts the arbitration process.
The channel arbitration unit is used for selecting a pass through data frame transmission channel, sending a data frame, possibly from 32 data channels at most, sequentially marking the data frames as 0-31, reducing the priority of the channel along with the increase of the channel label, and for all channels capable of being sent, the channel label is the smallest and has the highest sending priority, the label is the second smallest and has the second priority, and so on; the received pass through frame is still transmitted in the channel of the currently received pass through frame, and the channel label is not changed.
The receiving frame processing unit receives the data frame from the simplified media independent interface, judges the data frame according to the type field in the Ethernet frame head, extracts the command parameter for the BMC command frame with the Ethernet frame type being 16-system 88F8, and carries out checksum, frame length and Cyclic Redundancy Check (CRC), when the command frame has an error, generates a command error indication signal and sends the command error indication signal to the main control unit; for pass through frame whose Ethernet frame type is not equal to 16, 88F8, frame length and CRC check are carried out, error frame is discarded, the correct format pass through frame is filtered for destination address and source address, and the filtered pass through frame is sent to channel arbitration unit.
The data frame sending control unit sends a complete data frame firstly by the channel with the highest priority according to the priority arbitrated by the channels, and then sends a data frame by the channel with the second best priority, and sends polling according to the priority of the channel; analyzing a to-be-sent pass through frame sent by the channel arbitration unit, filtering a received data frame format according to a destination address, a source address and a VLAN (virtual local area network) identifier in a frame header, checking the frame length and CRC (cyclic redundancy check) of the pass through frame, and discarding the illegal pass through frame; framing a BMC command response frame according to the reason code and the response code, and generating an asynchronous event frame when the working state of the sideband management circuit is transferred; the data frames to be sent are sequenced from high to low according to the priority of the response frame, the asynchronous event frame and the pass through frame, and are sent to the simplified medium independent interface, and the response completion mark signal is sent to the main control unit.
The system bus interface is an interactive interface of a data channel and external equipment and follows protocols such as an Advanced Peripheral Bus (APB) or an advanced high-performance bus (AHB).
The simplified medium independent interface receives a command frame and a past through frame sent by the BMC through the RMII interface, or sends a response frame, an asynchronous event frame or a past through frame to the BMC, wherein the RMII unit is improved on the basis of RMII TM specification-1998, and input signal arb _ i and output signal arb _ o pins are added for receiving and sending hardware arbitration operation codes; the data frame sending and receiving FIFO unit is adopted to store the sending and receiving data, the receiving and sending threshold values are set, the occupation amount of the receiving FIFO is controlled respectively, the overflow and the occupation amount of the sending FIFO are avoided, the underflow is avoided, and the reliable receiving and sending of the data frames between the sideband management circuit and the BMC are realized; all data channels 0-N (N is less than or equal to 31) share the same simplified medium independent interface.
The register is used for realizing information interaction between the hardware arbitration sideband management circuit and the host, and the related information comprises host configuration information, link state of the channel, link setting and related parameters of the acquisition link state command.
In the following, the technical solutions of the present invention will be described in further detail by means of the accompanying drawings and embodiments, and the embodiments are clearly and completely described. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. Based on the embodiments of the present invention, those skilled in the art can obtain other embodiments without creative efforts, and all of them belong to the protection scope of the present invention.
An embodiment of the present invention is shown in fig. 1, in which a hardware arbitration sideband management circuit is an interface between a BMC and an ethernet controller, can process data between the BMC and network data, can be accessed by a host, and can support 4 ethernet controller devices in a network, and each device is interconnected through a hardware arbitration pin.
Referring to fig. 2, the sideband management circuit implementation based on hardware arbitration includes a main control unit, a hardware arbitration unit, a channel arbitration unit, a received frame processing unit, a transmitted frame processing unit, a simplified medium independent interface, a register, and a system bus interface.
The main control unit performs initialization configuration on the simplified media independent interface, controls the working state of the circuit, starts hardware arbitration, and performs data frame transceiving enabling control according to the result of the hardware arbitration, as shown in fig. 3. After the power is on, the sideband management interface circuit enters an initialization state, and after the initialization is completed, the sideband management interface circuit enters a 'controller is not selected' state; after hardware arbitration, when the circuit receives any command sent by the BMC, the circuit state is transferred to a controller selection state, and normal operation of a data frame can be carried out. In the state transition process, after the sideband management circuit based on hardware arbitration completes power-on initialization, the reception and processing of a BMC command can be carried out; and the passthrough frame can not be processed in the power-on initialization and channel initialization processes, and the received passthrough frame is discarded. In the 'controller selection state', the main control unit generates a response code and a reason code required by response sending according to a command frame parameter provided by the received frame processing unit, sends the response code and the reason code to the data frame sending control unit, receives response frame sending completion mark information when the command response frame is sent, and responds to generate all response frames which are in line with the description in 'DMTF-network controller sideband interface specification-2013'; in addition, when receiving the error indication signal of the received frame sent by the received frame processing unit, the main control unit generates an abnormal command response code and a reason code and sends the abnormal command response code and the reason code to the data frame sending processing unit; when all data frames are sent, the release token mark is generated and sent to the arbitration control unit, and the state returns to the unselected state.
The hardware arbitration unit has an implementation structure as shown in fig. 4, and includes an operation code codec, a hardware arbitration control module, a token processing module, and a timeout management module; an operation code codec, which decodes the received operation code according to a coding format (shown in table 1) specified in DMTF-network controller sideband interface specification-2013 for the received operation code, identifies the type of the operation code (shown in fig. 5), informs a hardware arbitration control module, and codes and serializes the operation code to be sent according to the format in table 1, and sends the operation code to a hardware arbitration arb _ o pin; the hardware arbitration control module manages the arbitration working state through a finite state machine according to the hardware arbitration enabling state and the received operation code word; the token processing module gives a token holding or token releasing mark signal according to whether the token code is received and whether data is to be sent, and sends the token holding or token releasing mark signal to the main control unit; and the timeout management module records the time that the sideband management interface circuit to be transmitted with data does not receive the token through the counter, generates a token timeout identification signal if the time exceeds the time upper limit of the token not held, informs the main control unit of the token timeout identification signal, and restarts the hardware arbitration process.
TABLE 1
| Operation code | Format (binary system) |
| Free up | 110000 |
| Token | 110100 |
| Cleaning out | 11010100xxxxxx00 |
| Transmit shutdown | 110001000000 |
| Transmission initiation | 1100010100uuuuuu00 |
Specifically, the hardware arbitration method is implemented by interacting arbitration operation codes between circuits on a loop based on hardware arbitration pins arb _ i and arb _ o, and specifically includes the following steps:
s1, after the Ethernet system loop is electrified and reset, a hardware arbitration unit in the Ethernet system loop sideband management circuit sends idle codes as shown in table 1;
s2, after the arbitration process is started, the hardware arbitration units of all sideband management circuits on the Ethernet system loop start to send a clearing command containing the ID number of the sideband management circuit;
s3, in the process that the local sideband management circuit in the Ethernet system loop receives the clearing command, the local sideband management circuit forwards the clearing command with the ID number smaller than the ID number of the local sideband management circuit; for the clearing command with the ID number larger than the self ID number, the clearing command is forwarded after being replaced by the self ID number; when the received clear ID number is equal to the self ID number, the local sideband management circuit is determined to be the arbitration master;
s4, when the arbitration master holds the token (i.e. receives the operation code "110100"), the arbitration master can transmit data, and after the transmission is completed, the token is released.
The received frame processing unit analyzes the BMC data frame from the simplified media independent interface, judges the data frame according to the type of the Ethernet frame, and when the type of the Ethernet frame is a 16-system 88F8, the received BMC data frame is a command frame, performs command parameter, checksum and CRC detection, and sends an effective command parameter to the main control unit; if the type of the received Ethernet frame is not equal to the type of the 16-system 88F8, a pass through frame is received, frame length and CRC (cyclic redundancy check) are carried out, the illegal pass through frame is discarded, otherwise, the pass through frame is filtered according to a destination address and a source address, the unmatched pass through frame is filtered, and the filtered pass through frame is sent to a channel arbitration unit and the number of the received data frames is counted.
The data frame sending control unit sends a complete data frame firstly by the channel with the highest priority according to the priority of the channel arbitration unit, and then sends a data frame by the channel with the second best priority, and sends polling according to the channel priority; analyzing a pass through frame from a channel arbitration unit, extracting a destination address, an Ethernet frame type, a VLAN mark and UDP field information of a broadcast frame, and filtering the pass through frame according to a filtering parameter configured by a BMC through a command; framing a response frame according to the reason code and the response code provided by the main control unit, and generating an asynchronous event frame when the working state of the sideband management circuit is shifted; sending and sequencing according to the sending priority sequence of the response frame, the asynchronous event frame and the pass through frame from high to low, and sending to a simplified medium independent interface; the data frame sending control unit sends the data frame only when the token is held, and after the data is sent, a completion mark is generated and sent to the main control unit, and the main control unit enters a waiting state and releases the token. The state transition of the data frame transmission control unit based on hardware arbitration is shown in fig. 6.
The simplified medium independent interface is improved on the basis of RMII TM specification-1998, and input signal arb _ i and output signal arb _ o pins are added for transmitting and receiving hardware arbitration operation codes; receiving a command frame and a passhigh frame sent by the BMC, or sending a response frame, an asynchronous event frame or a pass through frame to the BMC; data frame sending and receiving first-in first-out (FIFO) is adopted to store sending and receiving data, receiving and sending thresholds are set, the occupation amount of the receiving FIFO is controlled respectively, overflow and the occupation amount of the sending FIFO are avoided, underflow is avoided, and reliable sending and receiving of data frames between the sideband management circuit and the BMC are realized; all data channels 0-N (N is less than or equal to 31) share the same simplified medium independent interface.
The register realizes the storage of the configuration information of the circuit and the configuration parameters of the circuit by the BMC, the relevant register list is shown in table 2, and the access address is the base address + the offset address in table 2.
The system bus interface is an interactive interface of a data channel and external equipment and follows protocols such as an Advanced Peripheral Bus (APB) or an advanced high-performance bus (AHB).
TABLE 2
| Starting address | Name (R) | Bit wide (bit) | Read-write type | Remarks for note |
| 0x000 | Enable register | 32 | R/W | Offset head address independent of channel ID |
| 0x004 | Controller ID register | 32 | R/W | Offset head address independent of channel ID |
| 0x008 | Hardware arbitration enable register | 32 | R/W | Offset first address is associated with channel ID |
| 0x00C | Link setting register | 32 | R | Offset first address is associated with channel ID |
| 0x010 | Link status register | 32 | R/W | Offset first address is associated with channel ID |
| 0x014 | Asynchronous event status register | 32 | R/W | Offset first address is associated with channel ID |
| 0x018 | Command processing flag register | 32 | R/W | Offset first address is associated with channel ID |
Note: for registers where the offset first address is associated with a channel ID, the upper 5 bits of the offset first address represent the channel ID. Offset first addresses 0x 00C-0 x014 of the relevant registers in the table point to channel 0; for lane 1 and lane 2, the offset first addresses of the link setup, link status, asynchronous event status, and command handling flags registers are 0x08C, 0x090, 0x094, 0x098, and 0x10C, 0x110, 0x114, 0x118, respectively, and so on for the rest of the lane ID related registers.
From the above, it can be seen that the implementation method of the hardware arbitration-based sideband management circuit of the present invention is suitable for processing sideband data interaction traffic between the BMC and a plurality of ethernet controllers in an ethernet network. The invention has proposed a high-efficient hardware arbitrates the coder-decoder implementation method and example, utilize two hardware arbitration pins on NC-SI interface, the apparatus on the loop is according to the receiving and dispatching of the arbitration operation code, arbitrate the judgement, has reduced the order between BMC and circuit in the arbitration process and responded to the interaction, has shortened BMC hardware arbitrated waiting time; the device on the loop transmits the sending right in a token polling mode, so that the condition that the device occupies a network for a long time can be avoided, network blockage caused by sending waiting can be reduced, and the data processing efficiency of the sideband management circuit is improved; the error frame detection and processing and high-efficiency data receiving, transmitting and storing strategies are realized, and the reliability of the data frame processing of the sideband management circuit is further improved.
The invention well solves the problem of arbitration mode based on command, namely, the interaction of chip selection and chip selection cancellation is needed between the BMC and the sideband management interface circuit, when the sideband interface circuit is in a busy state when the network port data processing is carried out, the BMC can carry out arbitration judgment only by waiting for the command response of the sideband management interface circuit, and the arbitration waiting time is longer; secondly, in the process of command arbitration, if all circuits on the network respond to the chip selection command of the BMC, the BMC needs to internally establish a rule of secondary arbitration and designate a device with effective response, so as to solve the problem of competition among Ethernet controllers on the network.
The technical idea of the present invention is only the technical idea of the present invention, and the technical scope of the present invention is not limited thereby, and any modifications made on the technical scheme according to the technical idea of the present invention fall within the scope of the claims of the present invention.
Claims (10)
1. A sideband management circuit based on hardware arbitration is characterized by comprising a main control unit, a hardware arbitration unit, a channel arbitration unit, a received frame processing unit, a sent frame processing unit, a simplified medium independent interface, a register and a system bus interface; the system comprises a receiving frame processing unit, a simplified medium independent interface, a hardware arbitration unit, a register and a sending frame processing unit, wherein the receiving frame processing unit, the simplified medium independent interface, the hardware arbitration unit, the register and the sending frame processing unit are all connected with a main control unit;
wherein:
the main control unit is used for controlling the sideband management circuit, and comprises the configuration of a simplified medium independent interface, the starting control of a hardware arbitration unit, the circuit state transition control, the starting or closing of the hardware arbitration unit, the generation of a response code and a reason code, and the data frame receiving and sending enabling control;
the hardware arbitration unit is based on the hardware arbitration pin and is used for performing hardware arbitration control, operation code encoding and decoding, token processing and overtime processing and sending an arbitration result to the main control unit;
the channel arbitration unit is used for finishing the channel selection of sending and receiving data frames based on the state of each channel;
the received frame processing unit is used for judging the type of a received frame from the BMC, analyzing and checking a data frame of a command frame sent by the BMC, informing the extracted command frame header information to the main control unit, carrying out frame length and Cyclic Redundancy Check (CRC) on the received non-command frame pass through, discarding an illegal pass through frame, and sending the data frame matched with a destination address and a source address to the channel arbitration unit;
the transmission frame processing unit is used for framing a transmission frame according to the response code and the reason code generated by the main control unit, filtering a past through frame from the channel arbitration unit according to a filtering rule configured by a command of the BMC, generating an asynchronous event frame when the state of the sideband management circuit is shifted, and sequentially transmitting the transmission frame to the simplified medium independent interface according to the priority of a data frame to be transmitted;
the simplified medium independent interface is used for realizing information interaction between the sideband management circuit and the BMC, and comprises a data frame sending, receiving and storing function;
the register is used for storing configuration information and configuration parameters of the command;
the system bus interface is used for data interaction with the controller.
2. The sideband management circuit based on hardware arbitration according to claim 1, wherein the main control unit specifically works in the process of: controlling the working state of the circuit, configuring a simplified medium independent interface, performing data frame receiving and transmitting enabling control according to an arbitration result, generating a response code and a reason code required by command frame response according to configuration information and a command error indication signal, transmitting the response code and the reason code to a data frame sending control unit, and receiving response frame sending completion flag information when the command frame response is sent; when receiving the command error signal, an abnormal command response code and a reason code are generated and sent to the data frame sending control unit.
3. The sideband management circuit based on hardware arbitration according to claim 1, wherein the hardware arbitration unit comprises a hardware arbitration control module, and an operation code codec, a token processing module and a timeout management module connected with the hardware arbitration control module;
the hardware arbitration control module is used for managing the arbitration working state through the finite state machine according to the hardware arbitration enabling state and the received arbitration operation code;
the operation code coder-decoder is used for decoding the received operation code and is responsible for generating the operation code meeting the requirement;
the token processing module is used for giving a token holding signal or a token releasing signal according to whether the token operation code is received or not and sending the token holding signal or the token releasing signal to the hardware arbitration control module;
and the timeout management module is used for recording the time of not receiving the token, and generating a token timeout identification signal if the time exceeds the duration upper limit of the not-held token, and informing the hardware arbitration control module.
4. The sideband management circuit based on hardware arbitration of claim 1, wherein the channel arbitration unit is configured to sequentially decrease the priority of the transmission channel with the increase of the channel label when transmitting the data frame, and to keep transmitting on the receiving data channel for the received passthrough frame, the channel label is unchanged.
5. The sideband management circuit based on hardware arbitration according to claim 1, wherein the specific working process of the receiving frame processing unit comprises: receiving a data frame from a simplified independent medium interface, judging the data frame according to a type field in an Ethernet frame header, extracting command parameters if the received BMC data frame is a command frame when the Ethernet frame type is a 16-system 88F8, and checking and filtering the format if the received BMC data frame is a pass through frame; when the data frame format is checked, when the frame length error, CRC error, command parameter configuration error or checksum error of the received data frame is found, a command error indicating signal is generated or an illegal pass through frame is discarded according to whether the received frame is a command frame or not, and the command error indicating signal is informed to the main control unit; respectively counting the number of the received pass through frames and command frames according to the frame type of the Ethernet; and filtering the passhigh frame according to the frame header information of the passthrough frame according to the configuration of the BMC on the state of the sideband management circuit and the configuration condition of the filtering parameter, and sending the filtered passthrough frame to the channel arbitration unit.
6. The sideband management circuit based on hardware arbitration according to claim 1, wherein the data frame transmission control unit specifically works in the process of: framing a response frame according to the reason code and the response code of the main control unit; filtering a transmitted pass through frame sent by the channel arbitration unit according to frame header information and a data frame transmitting rule configured by the BMC through a command; generating an asynchronous event frame when the working state of the sideband management circuit is changed; sending a pass through frame, a command response frame and an asynchronous event frame from a channel arbitration unit to a simplified medium independent interface in sequence according to the sequence that the priority of the command response frame, the priority of the asynchronous event frame and the priority of the pass through frame are reduced in sequence, and sending a response completion flag signal to a main control unit when the sending is completed; under the condition that multiple channels are enabled simultaneously, according to the sequence of the sending priority from high to low, the channel with the high priority sends the whole frame of data firstly, the channel with the second priority sends the whole frame of data subsequently, and the polling of sending data frames is carried out in sequence.
7. The sideband management circuit based on hardware arbitration according to claim 1, characterized in that the system bus interface follows the advanced peripheral bus protocol or the advanced high-performance bus protocol.
8. The sideband management circuit based on hardware arbitration according to claim 1, characterized in that the simplified media independent interface is provided with an input signal arb _ i pin and an output signal arb _ o pin for transmitting and receiving a hardware arbitration operation code; the data frame sending and receiving FIFO unit is adopted to store the sending and receiving data, the receiving and sending threshold values are set, the occupation quantity of the receiving FIFO is controlled to avoid overflow and the occupation quantity of the sending FIFO is controlled to avoid underflow respectively, and reliable sending and receiving of the data frames between the sideband management circuit and the BMC are realized; all data channels share the same reduced media independent interface.
9. The sideband management circuit based on hardware arbitration according to claim 1, characterized in that the register stores configuration information of the circuit, channel link status, parameters of "link setup" and "get link status" commands.
10. A hardware arbitration method based on any sideband management circuit of claims 1-9, characterized in that, based on hardware arbitration pins, the arbitration operation code interaction between circuits on the ethernet system ring is implemented, comprising the following steps:
s1, after the Ethernet system loop is electrified and reset, hardware arbitration units in all sideband management circuits on the Ethernet system loop send idle codes;
s2, after the arbitration process is started, the hardware arbitration units of all sideband management circuits on the Ethernet system loop start to send a clear command containing the ID number of the sideband management circuit to other sideband management circuits on the Ethernet system loop;
s3, in the process that the local sideband management circuit in the Ethernet system loop receives the clearing command, the local sideband management circuit forwards the clearing command with the ID number smaller than the ID number of the local sideband management circuit; for the clearing command with the ID number larger than the self ID, the clearing command is transmitted after being replaced by the self ID number; when the ID number in the received clear operation code is equal to the ID number of the local sideband management circuit, the local sideband management circuit is determined as an arbitration master device;
and S4, when the arbitration master device holds the token, the arbitration master device can transmit data, and after the transmission is finished, the token is released.
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| CN113138801A (en) * | 2021-04-29 | 2021-07-20 | 上海阵量智能科技有限公司 | Command distribution device, method, chip, computer equipment and storage medium |
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| CN113949454B (en) * | 2021-09-08 | 2023-02-14 | 国网电力科学研究院有限公司 | Optical fiber/E1 conversion equipment and safety and stability control system inter-station communication method |
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