CN111786657B - Broadband bulk acoustic wave FBAR and distributed parameter hybrid filter chip circuit - Google Patents
Broadband bulk acoustic wave FBAR and distributed parameter hybrid filter chip circuit Download PDFInfo
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- CN111786657B CN111786657B CN202010709694.1A CN202010709694A CN111786657B CN 111786657 B CN111786657 B CN 111786657B CN 202010709694 A CN202010709694 A CN 202010709694A CN 111786657 B CN111786657 B CN 111786657B
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Abstract
The embodiment of the invention provides a broadband bulk acoustic wave FBAR and distributed parameter hybrid filter chip circuit, which comprises: the acoustic resonator comprises an input port, an output port, a first matching circuit, a first film cavity acoustic resonance FBAR filter chip, an intermediate matching transmission line, a second FBAR filter chip and a second matching circuit; the input port is connected with the input end of the first matching circuit, and the output end of the first matching circuit is connected with the input end of the first FBAR filter chip; the output end of the first FBAR filter chip is connected with the first end of the middle matching transmission line, and the second end of the middle matching transmission line is connected with the input end of the second FBAR filter; the output end of the second FBAR filter chip is connected with the input end of the second matching circuit, and the output end of the second matching circuit is connected with the output port. By applying the filter chip circuit provided by the embodiment of the invention, the bandwidth of the filter is wider and the frequency selectivity is higher.
Description
Technical Field
The invention relates to the technical field of passive radio frequency devices, in particular to a chip circuit of a broadband Bulk Acoustic wave (FBAR) and distributed parameter hybrid filter.
Background
With the continuous development of 5G technology, 5G mobile communication systems are required to meet the requirements of high speed, large capacity and high accuracy of 5G communication. The filter is a core device in a 5G mobile communication system and is required to play a role in accurately processing signals.
However, since the filter in the prior art has a narrow bandwidth and a low frequency selectivity, when the filter has a narrow bandwidth and a low frequency selectivity, only signals of a narrow range of frequency bands and a small number of frequency bands can be processed. And because the application frequency range of the signals in the 5G mobile communication system is wide and the number of the signals is large, the filters in the prior art are difficult to accurately process the signals in the 5G mobile communication system. Therefore, a filter with a wide bandwidth and high frequency selectivity is needed.
Disclosure of Invention
An embodiment of the invention provides a chip circuit of a broadband bulk acoustic wave FBAR and a distributed parameter hybrid filter, so that the bandwidth of the filter is wide and the frequency selectivity is high. The specific technical scheme is as follows:
in a first aspect, an embodiment of the present invention provides a broadband bulk acoustic wave FBAR and distributed parameter hybrid filter chip circuit, where the circuit includes: the device comprises a dielectric substrate, and an input port 1, an output port 2, a first matching circuit 3, a first FBAR filter chip 4, an intermediate matching transmission line 5, a second FBAR filter chip 6 and a second matching circuit 7 which are constructed on the dielectric substrate; wherein, the first and the second end of the pipe are connected with each other,
the first matching circuit 3 is a circuit that matches the impedance of the input port 1 with the impedance of the first FBAR filter chip 4, the intermediate matching transmission line 5 is a transmission line that matches the impedance of the first FBAR filter chip 4 with the impedance of the second FBAR filter chip 6, and the second matching circuit 7 is a circuit that matches the impedance of the second FBAR filter chip 6 with the impedance of the output port 2;
the input port 1 is connected with the input end of the first matching circuit 3, and the output end of the first matching circuit 3 is connected with the input end of the first FBAR filter chip 4;
the output end of the first FBAR filter chip 4 is connected with the first end of the intermediate matching transmission line 5, and the second end of the intermediate matching transmission line 5 is connected with the input end of the second FBAR filter 6;
the output of the second FBAR filter chip 6 is connected to the input of the second matching circuit 7, and the output of the second matching circuit 7 is connected to the output port 2.
In one embodiment of the present invention, the first FBAR filtering chip 4 includes: a first FBAR resonator 41, a second FBAR resonator 42, and a third FBAR resonator 43;
the second FBAR filtering chip 6 includes: a fourth FBAR resonator 61, a fifth FBAR resonator 62, a sixth FBAR resonator 63; wherein the content of the first and second substances,
one end of the first FBAR resonator 41 is connected to an output terminal of the first matching circuit 3, the other end of the first FBAR resonator 41 is connected to one end of the second FBAR resonator 42 and one end of the third FBAR resonator 43, the other end of the second FBAR resonator 42 is connected to a first end of the intermediate matching transmission line 5, and the other end of the third FBAR resonator 43 is grounded;
one end of the fourth FBAR resonator 61 is connected to the second end of the intermediate matching transmission line 5, the other end of the fourth FBAR resonator 61 is connected to one end of the fifth FBAR resonator 62 and one end of the sixth FBAR resonator 63, the other end of the fifth FBAR resonator 62 is connected to the input terminal of the second matching circuit 7, and the other end of the sixth FBAR resonator 63 is grounded.
In an embodiment of the present invention, the FBAR resonators of the first FBAR resonator 41, the second FBAR resonator 42, the third FBAR resonator 43, the fourth FBAR resonator 61, the fifth FBAR resonator 62 and the sixth FBAR resonator 63 have different areas and different resonance thicknesses.
In one embodiment of the present invention, the first matching circuit 3 includes: a first coupling line 31, an input matching transmission line 32, the second matching circuit 7 comprises a second coupling line 72, an output matching transmission line 71; wherein the content of the first and second substances,
the input matching transmission line 32 is a transmission line that matches the impedance of the first coupling line 31 with the impedance of the first FBAR filter chip 4;
the output matching transmission line 71 is a transmission line that matches the impedance of the second coupling line 72 with the impedance of the second FBAR filter chip 6;
one end of one of the first coupling lines 31 is connected to the input port 1, and the other end is grounded, one end of the other of the first coupling lines 31 is connected to the first end of the input matching transmission line 32, the other end of the other of the first coupling lines 31 is open, and the second end of the input matching transmission line 32 is connected to the input end of the first FBAR filter chip 4;
a first end of the output matching transmission line 71 is connected to an output end of the second FBAR filter chip 6, a second end of the output matching transmission line 71 is connected to one end of one of the second coupling lines 72, the other end of one of the second coupling lines 72 is open-circuited, and one end of the other of the second coupling lines 72 is connected to the output port 2 and the other end is grounded.
In one embodiment of the present invention, the first coupling line 31 and the second coupling line 72 have the same line length, the same line width, and the same coupling line pitch;
and/or
The input matching transmission line 32 and the output matching transmission line 71 have the same line width and length.
In one embodiment of the present invention, the line length of the first coupling line 31 and the second coupling line 72 is within [2.5mm,3.0mm ], the line width is within [18.00mm,18.10mm ], and the coupling line spacing is within [0.10mm,0.20mm ];
and/or
The line widths of the input matching transmission line 32 and the output matching transmission line 71 are within [7.50mm,7.55mm ], and the line lengths are within [4.40mm,4.45mm ].
In one embodiment of the present invention, the top circuit and the bottom circuit of the first coupled line 31 have the same size, and the top circuit and the bottom circuit of the second coupled line 72 have the same size.
In one embodiment of the invention, the intermediate matching transmission line 5 has a line width within [14.00mm,14.10mm ] and a line length within [8.85mm,8.90mm ].
In an embodiment of the present invention, the input port 1 is an SMA connector, and the output port 2 is an SMA connector.
In one embodiment of the invention, the dielectric substrate has a relative dielectric constant of 10.2 and a dielectric loss tangent of 0.001.
As can be seen from the above, in the FBAR and distributed parameter hybrid filter chip circuit provided in the embodiment of the present invention, the filter chip circuit includes the FBAR filter chip, and when the FBAR filter chip is included in the filter chip circuit, the bandwidth and the frequency selectivity of the filter chip circuit can be increased. Therefore, the filter chip circuit provided by the embodiment of the invention can enable the bandwidth of the filter to be higher and the frequency selectivity to be higher.
Of course, not all of the advantages described above need to be achieved at the same time in the practice of any one product or method of the invention.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a first filter chip circuit according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a second filter chip circuit according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a third filter chip circuit according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a fourth filter chip circuit according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a filter chip circuit according to an embodiment of the present invention;
fig. 6a is a schematic diagram of a first S parameter simulation result according to an embodiment of the present invention;
fig. 6b is a schematic diagram of a simulation result of a second S parameter provided in the embodiment of the present invention;
fig. 6c is a schematic diagram of a simulation result of the passband group delay parameter according to the embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a first filter chip circuit according to an embodiment of the present invention, where the circuit includes: the device comprises a dielectric substrate, and an input port 1, an output port 2, a first matching circuit 3, a first FBAR filter chip 4, an intermediate matching transmission line 5, a second FBAR filter chip 6 and a second matching circuit 7 which are constructed on the dielectric substrate.
The first matching circuit 3 is a circuit that matches the impedance of the input port 1 with the impedance of the first FBAR filter chip 4. The intermediate matching transmission line 5 is a transmission line that matches the impedance of the first FBAR filter chip 4 with the impedance of the second FBAR filter chip 6. The second matching circuit 7 is a circuit that matches the impedance of the second FBAR filter chip 6 with the impedance of the output port 2.
Specifically, the input port 1 is connected to an input terminal of the first matching circuit 3, and an output terminal of the first matching circuit 3 is connected to an input terminal of the first FBAR filter chip 4.
The output of the first FBAR filter chip 4 is connected to a first end of an intermediate matched transmission line 5 and the second end of the intermediate matched transmission line 5 is connected to the input of a second FBAR filter 6.
The output of the second FBAR filter chip 6 is connected to the input of a second matching circuit 7 and the output of the second matching circuit 7 is connected to the output port 2.
Due to the fact that the FBAR filter chip is embedded into the filter chip circuit, the filter can achieve extremely high bilateral sideband roll, the frequency selectivity of the filter is greatly improved, the filter has in-band good matching and low insertion loss, and the high frequency selectivity has broadband performance at the same time.
In addition, by reasonably adjusting the impedance of the input matching circuit, the intermediate matching transmission line and the output matching circuit in the filter chip circuit, the sideband roll of the filter can be enhanced, so that the frequency selectivity of the filter is further improved.
As can be seen from the above, in the FBAR and distributed parameter hybrid filter chip circuit provided in the embodiment of the present invention, the filter chip circuit includes the FBAR filter chip, and when the FBAR filter chip is included in the filter chip circuit, the bandwidth and the frequency selectivity of the filter chip circuit can be increased. Therefore, the filter chip circuit provided by the embodiment of the invention can enable the bandwidth of the filter to be higher and the frequency selectivity to be higher.
In one embodiment of the present invention, the line width of the intermediate matching transmission line 5 is within [14.00mm,14.10mm ] and the line length is within [8.85mm,8.90mm ]. For example: the line width of the intermediate matching transmission line 5 may be 14.00mm, and the line length may be 8.88 mm.
In an embodiment of the present invention, the filter chip circuit may be implemented by a single-layer printed circuit board, wherein a top layer of the circuit board includes a hybrid filter chip circuit using a broadband bulk acoustic wave FBAR and a distributed parameter, a bottom layer of the circuit board is a metal ground plane, and a top layer of the circuit board has a metal via hole for connecting the top layer of the circuit board and the bottom layer of the circuit board.
In one embodiment of the present invention, the dielectric substrate has a relative dielectric constant of 10.2 and a dielectric loss tangent of 0.001.
In one case, the dielectric substrate may be a TP-2 type PCB substrate manufactured by wanling, tay. The TP-2 type PCB substrate had a relative dielectric constant of 10.2 and a dielectric loss tangent of 0.001.
In an embodiment of the present invention, the input port 1 may be an SMA (subminiature version a) connector, and the output port 2 may be an SMA connector.
In an embodiment of the invention, the FBAR filter chip may be embedded by gold wire bonding. The mode of carrying out parallel bonding by adopting three gold wires can effectively reduce the equivalent inductance of the gold wires and greatly reduce the insertion loss of the gold wires, thereby reducing the bonding loss. In this way, the zero pole of the sideband accessory of the filter chip circuit can be pulled close, so that high frequency selectivity is realized.
In an embodiment of the present invention, a rated operating frequency band of the filter chip circuit may be an N79 frequency band under a 5GNR frequency band, and a specific range is 4.4 to 5.0GHz, so that the filter chip circuit can be widely applied to a 5G mobile communication system.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a second filter chip circuit according to an embodiment of the present invention, and on the basis of the above embodiment, the first FBAR filter chip 4 includes: a first FBAR resonator 41, a second FBAR resonator 42, and a third FBAR resonator 43. The second FBAR filter chip 6 includes: a fourth FBAR resonator 61, a fifth FBAR resonator 62, and a sixth FBAR resonator 63.
Specifically, one end of the first FBAR resonator 41 is connected to the output terminal of the first matching circuit 3, the other end of the first FBAR resonator 41 is connected to one end of the second FBAR resonator 42 and one end of the third FBAR resonator 43, the other end of the second FBAR resonator 42 is connected to the first end of the intermediate matching transmission line 5, and the other end of the third FBAR resonator 43 is grounded.
One end of the fourth FBAR resonator 61 is connected to the second end of the intermediate matching transmission line 5, the other end of the fourth FBAR resonator 61 is connected to one end of the fifth FBAR resonator 62 and one end of the sixth FBAR resonator 63, the other end of the fifth FBAR resonator 62 is connected to the input terminal of the second matching circuit 7, and the other end of the sixth FBAR resonator 63 is grounded.
In an embodiment of the present invention, the FBAR resonators of the first FBAR resonator 41, the second FBAR resonator 42, the third FBAR resonator 43, the fourth FBAR resonator 61, the fifth FBAR resonator 62 and the sixth FBAR resonator 63 have different areas and different resonance thicknesses.
As can be seen from fig. 2 and the above description, the first FBAR filter chip 4 and the second FBAR filter chip 6 are both T-type resonant network structures composed of FBAR resonators.
Therefore, each FBAR filter chip is of a T-shaped resonant network structure consisting of the FBAR resonators, and when the filter chip circuit comprises the T-shaped resonant network structure consisting of the FBAR resonators, the bandwidth of the filter chip circuit can be improved, and the frequency selectivity of the filter chip circuit can be enhanced, so that the bandwidth of the filter is high, and the frequency selectivity of the filter is high.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a third filter chip circuit according to an embodiment of the present invention, and on the basis of the embodiment, the first matching circuit 3 includes: the second matching circuit 7 comprises a second coupling line 72 and an output matching transmission line 71.
The input matching transmission line 32 is a transmission line that matches the impedance of the first coupling line 31 with the impedance of the first FBAR filter chip 4; the output matching transmission line 71 is a transmission line that matches the impedance of the second coupling line 72 with the impedance of the second FBAR filter chip 6;
specifically, one end of one of the first coupling lines 31 is connected to the input port 1, and the other end is grounded, one end of the other of the first coupling lines 31 is connected to the first end of the input matching transmission line 32, the other end of the other of the first coupling lines 31 is open-circuited, and the second end of the input matching transmission line 32 is connected to the input end of the first FBAR filter chip 4.
A first end of the output matching transmission line 71 is connected to an output end of the second FBAR filter chip 6, a second end of the output matching transmission line 71 is connected to one end of one of the second coupling lines 72, the other end of one of the second coupling lines 72 is open-circuited, and one end of the other of the second coupling lines 72 is connected to the output port 2 and the other end is grounded.
As can be seen from fig. 3 and the above description, the other end of one of the first coupled lines 31 is grounded, and the other end of the other line is open, that is, one of the first coupled lines 31 is short-circuited and the other line is open. And one end of one of the first coupled lines 31 is connected to the input port 1, and one end of the other of the first coupled lines is connected to the first end of the input matching transmission line 32, so that it can be considered that a single-side port in the first coupled line 31 is connected to the filter chip circuit. Therefore, the first coupling line 31 may also be referred to as a single-ended open/short coupling line. Similarly, the second coupling line 72 may also be referred to as a single-ended open/short coupling line.
Specifically, the impedance proportion of the input matching transmission line, the output matching transmission line, the intermediate matching transmission line, the first coupling line and the second coupling line can be adjusted, so that in-band matching of the FBAR filter chip is realized, and the insertion loss and in-band fluctuation of the filter chip are low.
Because the chip circuit of the filter comprises the single-end open circuit/short circuit coupling line result and the matched transmission line structure, the filter realizes the control of the out-of-band rejection of the far-stop band and the guarantee of the in-band insertion loss.
In one embodiment of the present invention, the transmission line between the input port 1 and the first coupling line 31 may be a first impedance matching transmission line for matching the impedance of the input port 1 and the impedance of the first coupling line 31. The transmission line between the output port 2 and the second coupling line 72 may be a second impedance-matched transmission line for matching the impedance of the output port 2 and the impedance of the second coupling line 72.
Specifically, the impedance of each of the first impedance-matched transmission line and the second impedance-matched transmission line may be 50 ohms.
In an embodiment of the present invention, the first coupling line 31 and the second coupling line 72 have the same line length, the same line width, and the same coupling line pitch;
in an embodiment of the present invention, the input matching transmission lines 32 and the output matching transmission lines 71 have the same line width and length.
In an embodiment of the present invention, the line length of the first coupling line 31 and the second coupling line 72 may be within [2.5mm,3.0mm ], the line width may be within [18.00mm,18.10mm ], and the coupling line pitch may be within [0.10mm,0.20mm ]. For example: the line length of the first coupling line 31 and the second coupling line 72 may be 2.75mm, the line width may be 18.06mm, and the coupling line pitch may be 0.14 mm.
In an embodiment of the present invention, the line widths of the input matching transmission line 32 and the output matching transmission line 71 may be within [7.50mm,7.55mm ], and the line lengths may be within [4.40mm,4.45mm ]. For example: the line widths of the input matching transmission line 32 and the output matching transmission line 71 may be 7.53mm and 4.44 mm.
Specifically, the distance between the input matching transmission line 32 and the first coupling line 31 may be 3.77mm, and the distance between the output matching transmission line 71 and the second coupling line 72 may be 3.77 mm.
In an embodiment of the present invention, the top circuit and the bottom circuit of the first coupling line 31 have the same size, and the top circuit and the bottom circuit of the second coupling line 72 have the same size.
In this way, since the first matching circuit 3 includes the first coupling line 31 and the input matching transmission line 32, and the second matching circuit 7 includes the second coupling line 72 and the output matching transmission line 71, and since the input port and the output port of the filter are connected to the coupling lines, and one end of one of the coupling lines is grounded, the filter bandwidth can be widened, and the transmission pole is increased, so that the filter bandwidth is wider and has high selectivity. Thereby making the filter wide in bandwidth and highly frequency selective.
The filter chip circuit provided by the embodiment of the present invention is specifically described below, and referring to fig. 4, fig. 4 is a schematic structural diagram of a fourth filter chip circuit provided by the embodiment of the present invention. The above-mentioned circuit includes: the device comprises a dielectric substrate, and an input port 1, an output port 2, a first matching circuit 3, a first FBAR filter chip 4, an intermediate matching transmission line 5, a second FBAR filter chip 6 and a second matching circuit 7 which are constructed on the dielectric substrate.
Specifically, the first matching circuit 3 is a circuit that matches the impedance of the input port 1 with the impedance of the first FBAR filter chip 4. The intermediate matching transmission line 5 is a transmission line that matches the impedance of the first FBAR filter chip 4 with the impedance of the second FBAR filter chip 6. The second matching circuit 7 is a circuit that matches the impedance of the second FBAR filter chip 6 with the impedance of the output port 2.
The first FBAR filter chip 4 includes: a first FBAR resonator 41, a second FBAR resonator 42, and a third FBAR resonator 43. The second FBAR filter chip 6 includes: a fourth FBAR resonator 61, a fifth FBAR resonator 62, and a sixth FBAR resonator 63.
The first matching circuit 3 includes: the second matching circuit 7 comprises a second coupling line 72 and an output matching transmission line 71. Specifically, the input matching transmission line 32 is a transmission line that matches the impedance of the first coupling line 31 with the impedance of the first FBAR filter chip 4; the output matching transmission line 71 is a transmission line that matches the impedance of the second coupling line 72 with the impedance of the second FBAR filter chip 6.
Specifically, the input port 1 is connected to one end of one of the first coupled lines 31, the other end of the one of the first coupled lines 31 is grounded, one end of the other of the first coupled lines 31 is connected to a first end of the input matching transmission line 32, the other end of the other of the first coupled lines 31 is open-circuited, and a second end of the input matching transmission line 32 is connected to one end of the first FBAR resonator 41.
The other end of the first FBAR resonator 41 is connected to one end of the second FBAR resonator 42 and one end of the third FBAR resonator 43, the other end of the second FBAR resonator 42 is connected to the first end of the intermediate matching transmission line 5, and the other end of the third FBAR resonator 43 is grounded.
One end of the fourth FBAR resonator 61 is connected to the second end of the intermediate matching transmission line 5, the other end of the fourth FBAR resonator 61 is connected to one end of the fifth FBAR resonator 62 and one end of the sixth FBAR resonator 63, the other end of the fifth FBAR resonator 62 is connected to the first end of the output matching transmission line 71, and the other end of the sixth FBAR resonator 63 is grounded.
The second end of the output matching transmission line 71 is connected to one end of one of the second coupling lines 72, the other end of one of the second coupling lines 72 is open-circuited, and one end of the other of the second coupling lines 72 is connected to the output port 2 and the other end is grounded.
From the above description and fig. 4, the filter provided by this embodiment is a planar broadband N79 filter chip circuit that mixes two FBAR resonator ladder networks, single-ended open/short-circuited coupling lines, and matching transmission lines, and can ensure high frequency selectivity.
Further, since the filter chip circuit has a hybrid structure, it is possible to increase frequency selectivity and maintain high-quality print count and low insertion loss. And the filter chip circuit has a simple structure, is easy to relate and is convenient to process and manufacture. The circuit structure is planar, and can be processed by adopting a double-layer back copper-plated circuit board.
In an embodiment of the present invention, the size of the filter chip circuit may be 44mm × 28mm, and the size of the FBAR filter chip may be 1.1mm × 0.9 mm. And the circuit size is small, so that the device packaging is facilitated.
Referring to fig. 5, fig. 5 is a plan structure diagram of a filter chip circuit according to an embodiment of the present invention. In fig. 5, 1 identifies an input port, 2 identifies an output port, 3 identifies an input matching transmission line, 4 identifies a first FBAR filter chip, 5 identifies an intermediate matching transmission line, 6 identifies a second FBAR filter chip, 7 identifies an output matching transmission line, 9 identifies a first coupling line, and 8 identifies a second coupling line.
Wherein, W1Indicating the port width, W, of an input port or an output port2Representing the line width, W, of the first or second coupled line3Line width, W, of input matching transmission line or output matching transmission line4Line width L of the intermediate matching transmission line1Indicating the port length, L, of an input port or an output port2Denotes the distance between the input matching transmission line and the first coupling line or the distance between the output matching transmission line and the second coupling line, L3Indicating the distance between the intermediate matching transmission line and the input matching transmission line or the distance between the intermediate matching transmission line and the output matching transmission line, L4Denotes the length, L, of the first or second coupled line5Indicating the length, L, of the input or output matching transmission line6Indicating the length of the intermediate matching transmission line, S1Representing the first or second coupled lineThe line pitch of (a).
More specifically, W is as defined above1May be 1.42mm, W2May be 2.75mm, W3May be 7.53mm, W4Can be 14.00mm, L1Can be 5mm, L2May be 3.77mm, L3May be 2.75mm, L4May be 18.06mm, L5May be 4.44mm, L6May be 8.88mm, S1May be 0.14 mm.
Referring to fig. 6a, fig. 6a is a schematic diagram of a simulation result of a first S parameter provided in the embodiment of the present invention. In fig. 6a the abscissa is frequency in GHz and the ordinate is the s-parameter value in dB. Figure 6a shows a performance diagram for frequencies between 3.5 and 6 GHz. It can be seen from fig. 6a that the insertion loss of the filter provided by the present embodiment in the passband range of N79 (4.4-5.0GHz) is stable within 1dB as a whole, and the return loss is better than-13 dB.
Referring to fig. 6b, fig. 6b is a schematic diagram of a simulation result of a second S parameter provided in the embodiment of the present invention. In fig. 6b the abscissa is frequency in GHz and the ordinate is the s-parameter value in dB. As can be seen from fig. 6b, the upper and lower sidebands of the filter provided in this embodiment achieve attenuation of radio frequency signals above-20 dB within 50 MHz. And, the coupled line has relatively excellent out-of-band rejection at the 5G WIFI frequency band (5.15-5.85GHz) with the upper sideband introduced therein, and basically achieves rejection of more than-30 dB. Therefore, the filter provided by the embodiment has the characteristics of large bandwidth, good port matching and high frequency selection performance.
Referring to fig. 6c, fig. 6c is a schematic diagram of a simulation result of the passband group delay parameter according to the embodiment of the present invention. In fig. 6c the abscissa is frequency in GHz and the ordinate is group delay in mus. It can be seen from fig. 6c that the group delay control equalization within the pass band is within 0.2 microseconds and the group delay within the band approaches a constant. This effectively avoids phase distortion of the rf signal passing through the filter of the described embodiments, ensuring phase consistency of the output signal.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The above description is only for the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention shall fall within the protection scope of the present invention.
Claims (9)
1. A broadband bulk acoustic wave FBAR and distributed parameter hybrid filter chip circuit is characterized in that,
the circuit comprises: the device comprises a dielectric substrate, and an input port (1), an output port (2), a first matching circuit (3), a first FBAR (film bulk acoustic resonator) filter chip (4), an intermediate matching transmission line (5), a second FBAR filter chip (6) and a second matching circuit (7) which are constructed on the dielectric substrate; wherein the content of the first and second substances,
the first matching circuit (3) is a circuit that matches the impedance of the input port (1) to the impedance of the first FBAR filter chip (4), the intermediate matching transmission line (5) is a transmission line that matches the impedance of the first FBAR filter chip (4) to the impedance of the second FBAR filter chip (6), and the second matching circuit (7) is a circuit that matches the impedance of the second FBAR filter chip (6) to the impedance of the output port (2);
the input port (1) is connected with the input end of the first matching circuit (3), and the output end of the first matching circuit (3) is connected with the input end of the first FBAR filter chip (4);
the output end of the first FBAR filter chip (4) is connected with the first end of the intermediate matching transmission line (5), and the second end of the intermediate matching transmission line (5) is connected with the input end of the second FBAR filter (6);
the output end of the second FBAR filter chip (6) is connected with the input end of the second matching circuit (7), and the output end of the second matching circuit (7) is connected with the output port (2);
wherein the first FBAR filtering chip (4) comprises: a first FBAR resonator (41), a second FBAR resonator (42), and a third FBAR resonator (43);
the second FBAR filtering chip (6) comprises: a fourth FBAR resonator (61), a fifth FBAR resonator (62), and a sixth FBAR resonator (63); wherein the content of the first and second substances,
one end of the first FBAR resonator (41) is connected to an output end of the first matching circuit (3), the other end of the first FBAR resonator (41) is connected to one end of the second FBAR resonator (42) and one end of the third FBAR resonator (43), the other end of the second FBAR resonator (42) is connected to a first end of the intermediate matching transmission line (5), and the other end of the third FBAR resonator (43) is grounded;
one end of the fourth FBAR resonator (61) is connected to the second end of the intermediate matching transmission line (5), the other end of the fourth FBAR resonator (61) is connected to one end of the fifth FBAR resonator (62) and one end of the sixth FBAR resonator (63), the other end of the fifth FBAR resonator (62) is connected to the input end of the second matching circuit (7), and the other end of the sixth FBAR resonator (63) is grounded.
2. The filter chip circuit of claim 1, wherein the FBAR resonators include the first FBAR resonator (41), the second FBAR resonator (42), the third FBAR resonator (43), the fourth FBAR resonator (61), the fifth FBAR resonator (62), and the sixth FBAR resonator (63) having different areas and different resonance thicknesses.
3. The filter chip circuit according to any one of claims 1 and 2,
the first matching circuit (3) comprises: a first coupling line (31), an input matching transmission line (32), said second matching circuit (7) comprising a second coupling line (72), an output matching transmission line (71); wherein the content of the first and second substances,
the input matching transmission line (32) is a transmission line that matches the impedance of the first coupling line (31) to the impedance of the first FBAR filter chip (4);
the output matching transmission line (71) is a transmission line that matches the impedance of the second coupling line (72) to the impedance of the second FBAR filter chip (6);
one end of one line in the first coupling line (31) is connected with the input port (1), the other end of the one line is grounded, one end of the other line in the first coupling line (31) is connected with the first end of the input matching transmission line (32), the other end of the other line in the first coupling line (31) is open-circuited, and the second end of the input matching transmission line (32) is connected with the input end of the first FBAR filter chip (4);
the first end of the output matching transmission line (71) is connected with the output end of the second FBAR filter chip (6), the second end of the output matching transmission line (71) is connected with one end of one line in the second coupling line (72), the other end of one line in the second coupling line (72) is open-circuited, one end of the other line in the second coupling line (72) is connected with the output port (2), and the other end of the other line in the second coupling line (72) is grounded.
4. The filter chip circuit of claim 3,
the first coupling line (31) and the second coupling line (72) are equal in line length, line width and coupling line spacing;
and/or
The input matching transmission line (32) and the output matching transmission line (71) are equal in line width and length.
5. The filter chip circuit of claim 4,
the line length of the first coupling line (31) and the second coupling line (72) is within [2.5mm,3.0mm ], the line width is within [18.00mm,18.10mm ], and the coupling line spacing is within [0.10mm,0.20mm ];
and/or
The line width and the line length of the input matching transmission line (32) and the output matching transmission line (71) are respectively within 7.50mm and 7.55mm and 4.40mm and 4.45 mm.
6. The filter chip circuit of claim 3,
the top layer circuit and the bottom layer circuit of the first coupling line (31) are the same in size, and the top layer circuit and the bottom layer circuit of the second coupling line (72) are the same in size.
7. The filter chip circuit according to any of claims 1, 2, wherein the intermediate matching transmission line (5) has a line width within [14.00mm,14.10mm ] and a line length within [8.85mm,8.90mm ].
8. The filter chip circuit according to any one of claims 1 and 2, wherein the input port (1) is an SMA connector and the output port (2) is an SMA connector.
9. The filter chip circuit according to any one of claims 1 and 2, wherein the dielectric substrate has a relative dielectric constant of 10.2 and a dielectric loss tangent of 0.001.
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| CN103281050A (en) * | 2013-06-17 | 2013-09-04 | 天津大学 | Film bulk acoustic wave filter |
| CN104505562B (en) * | 2014-12-15 | 2017-08-04 | 电子科技大学 | Micro band superwide band bandpass filter with good stopband characteristic |
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| CN110463036B (en) * | 2017-03-31 | 2024-05-24 | 英特尔公司 | Broadband filter structure and device |
| CN111129675A (en) * | 2019-12-30 | 2020-05-08 | 西安石油大学 | Wide stop band suppression broadband filter |
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