CN111785204B - Pre-charging circuit of common-anode LED display screen driving chip - Google Patents
Pre-charging circuit of common-anode LED display screen driving chip Download PDFInfo
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- CN111785204B CN111785204B CN202010768880.2A CN202010768880A CN111785204B CN 111785204 B CN111785204 B CN 111785204B CN 202010768880 A CN202010768880 A CN 202010768880A CN 111785204 B CN111785204 B CN 111785204B
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- precharge
- tube
- pmos tube
- nmos tube
- display screen
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The invention discloses a precharge circuit of a common anode LED display screen driving chip, which comprises: an input terminal for inputting a precharge pull-UP signal UP1, a precharge pull-UP signal UP2, and a precharge pull-down signal DN; the output end is connected in series with a resistor R0 and is used for outputting potential; the first operational amplifier is coupled with a second PMOS tube and a third PMOS tube, and inputs a precharge pull-UP signal UP1 and a precharge pull-UP signal UP2 through the second PMOS tube and the third PMOS tube; the second operational amplifier is coupled with a seventh NMOS tube and inputs a precharge pull-down signal DN through the seventh NMOS tube; the values of the precharge pull-UP signals UP1 and UP2 and the precharge pull-down signal DN input by the configuration input end are configured to be the potential values output by the output end after the first operational amplifier and the second operational amplifier are operated and amplified. The invention has the advantages of improving the display effect of the LED display screen and effectively improving the phenomena of lower ghost, darkness of the first row, high-low gray coupling and cross-plate color difference in the LED display screen.
Description
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a precharge circuit of a common-positive LED display screen driving chip.
Background
The LED display screen is an electronic display screen formed by LED dot matrixes, the display content forms such as characters, animation, pictures and videos of the screen are timely converted by changing the bright and dark traffic light beads, and the display control of the components is carried out through a modularized structure. The display device mainly comprises a display module, a control system and a power supply system. The display module is a screen formed by LED lamp lattices to emit light; the control system is used for realizing the conversion of the content displayed on the screen according to the on-off condition in the control area; the power supply system converts the input voltage and current to meet the requirement of the display screen. The LED display screen is in scanning display, the system drives scanning row lines respectively at different times, and when the next row is driven, the phenomenon that the upper row appears dark and bright is called as 'ghost'. The LED display screen also has the problems of poor display such as dark first row, high-low gray coupling, cross-board color difference and the like.
Disclosure of Invention
The invention aims to provide a precharge circuit of a common-positive LED display screen driving chip, which controls the magnitude of an output potential value of an output end through configuration of a precharge pull-up signal and a precharge pull-down signal of an input end, improves the display effect of an LED display screen and effectively improves the phenomena of lower ghost, darkness of a first row, high-low gray coupling and cross-plate color difference in the LED display screen.
In order to solve the technical problems, the technical scheme provided by the invention is as follows: a precharge circuit for a common anode LED display screen drive chip, comprising:
an input terminal for inputting a precharge pull-UP signal UP1, a precharge pull-UP signal UP2, and a precharge pull-down signal DN;
the output end is connected in series with a resistor R0 and is used for outputting potential;
the first operational amplifier is coupled with a second PMOS tube and a third PMOS tube, and inputs a precharge pull-UP signal UP1 and a precharge pull-UP signal UP2 through the second PMOS tube and the third PMOS tube;
the second operational amplifier is coupled with a seventh NMOS tube and inputs a precharge pull-down signal DN through the seventh NMOS tube;
the values of the precharge pull-UP signals UP1 and UP2 and the precharge pull-down signal DN input by the configuration input end are configured to be the potential values output by the output end after the first operational amplifier and the second operational amplifier are operated and amplified.
According to the technical scheme, the pre-charge pull-UP signals UP1 and UP2 and the pre-charge pull-down signal DN are input to the input end, and after the first operational amplifier and the second operational amplifier are operated and amplified, the output ends with different sizes can be configured to output potential values, and the potential values are used for driving the LED display screen to display, so that the display effect of the LED display screen can be improved, and the lower ghost phenomenon in the LED display screen can be improved.
The first operational amplifier comprises a zero PMOS tube, a first PMOS tube, a zero NMOS tube, a first NMOS tube and a fourth NMOS tube; the zero NMOS tube is connected with the zero PMOS tube and the second PMOS tube in a circuit mode, the first NMOS tube is connected with the first PMOS tube in a circuit mode, the fourth NMOS tube is connected with the zero NMOS tube and the first NMOS tube in a circuit mode through the second NMOS tube, the first NMOS tube is connected with a resistor R0, and a pre-charging pull-UP signal UP1 is input into the grid electrode of the second NMOS tube.
In the precharge circuit of the common-positive LED display screen driving chip, the gate of the third PMOS transistor inverts the precharge pull-UP signal UP2 through the first inverter.
The precharge circuit of the common-anode LED display screen driving chip comprises a fourth PMOS tube, a seventh PMOS tube, an eighth PMOS tube, a fifth NMOS tube and a sixth NMOS tube; the fourth PMOS tube is connected to the seventh PMOS tube and the eighth PMOS tube through a sixth PMOS tube line, the fifth NMOS tube is connected with the seventh PMOS tube line, the sixth NMOS tube is connected with the eighth PMOS tube and the fifth NMOS tube line, the sixth NMOS tube line is connected with the seventh NMOS tube, and the seventh PMOS tube is connected with a resistor R0.
In the precharge circuit of the common-positive LED display driving chip, the gate of the seventh NMOS transistor inverts the precharge pull-down signal DN through the second inverter.
In the precharge circuit of the common-anode LED display screen driving chip, the first reference potential VR1 is input to the grid electrode of the zero NMOS tube.
In the precharge circuit of the common-anode LED display driving chip, the gate of the eighth PMOS transistor is input with the precharge second reference potential VR2.
In the precharge circuit of the common-anode LED display screen driving chip, the fourth NMOS tube line is connected with the third NMOS tube, and the bias current IB1 is input to the grid electrode of the fourth NMOS tube and the grid and drain electrode signals of the third NMOS tube.
In the precharge circuit of the common-anode LED display screen driving chip, the fourth PMOS tube line is connected with a fifth PMOS tube, and bias current IB2 is input to the gate of the fourth PMOS tube and the gate and drain signals of the fifth PMOS tube.
The beneficial effects obtained by the invention are as follows: the circuit is integrated in each constant current source output channel, when the constant current source output is started, the circuit is in a closed state (UP1=0, UP2=0, DN=0), and the circuit has the following working states and functions by controlling the time sequence of UP1, UP2 and DN:
1. UP 1=0, UP 2=0, dn=0, the circuit of this patent is in the off state.
2. Before display line feed, after the constant current channel is closed, UP1=1, UP2=0 and DN=0 are set, and the OUT terminal is charged to VR1 potential by the circuit, so that the circuit has the function of improving the lower ghost of the LED display screen.
3. After display line feed, before constant current channel is opened, UP1 = 1, UP2 = 0, DN = 0, and this patent circuit charges the OUT terminal to VR1 potential, and this patent circuit has the function that improves the first line of LED display screen and is dark.
4. Configuring timing appropriate for UP1, UP2, and DN: firstly, UP 1=0, UP 2=1 and dn=0 are configured to charge the OUT potential to VDD, and then UP 1=0, UP 2=0 and dn=1 are configured to charge the OUT terminal potential to VR2 potential, so that the potential of the channel simulates the lamp bead lighting process on the display module, and the function can enable the circuit to have the functions of improving high-low gray coupling and cross-plate color difference in the LED display screen.
Drawings
Fig. 1 is a circuit configuration diagram of an embodiment of the present invention.
Detailed Description
The invention is further described below with reference to the drawings and the detailed description.
Referring to fig. 1, a precharge circuit of a common anode LED display driving chip of the present invention includes:
an input terminal for inputting a precharge pull-UP signal UP1, a precharge pull-UP signal UP2, and a precharge pull-down signal DN;
the output end is connected in series with a resistor R0 and is used for outputting potential;
the first operational amplifier is coupled with a second PMOS tube and a third PMOS tube, and inputs a precharge pull-UP signal UP1 and a precharge pull-UP signal UP2 through the second PMOS tube and the third PMOS tube;
the second operational amplifier is coupled with a seventh NMOS tube and inputs a precharge pull-down signal DN through the seventh NMOS tube;
the values of the precharge pull-UP signals UP1 and UP2 and the precharge pull-down signal DN input by the configuration input end are configured to be the potential values output by the output end after the first operational amplifier and the second operational amplifier are operated and amplified.
Further, the first operational amplifier comprises a zero PMOS tube NM0, a first PMOS tube PM1, a zero NMOS tube NM0, a first NMOS tube NM1 and a fourth NMOS tube NM4; the grid electrodes of the zero-number PMOS tube PM0 and the first PMOS tube PM1 are connected with the drain electrode lines of the zero-number PMOS tube PM0, the zero-number NMOS tube NM0 and the second PMOS tube PM 2; the drain electrode of the first PMOS tube PM1 is connected with the drain electrode and the grid electrode of the first NMOS tube NM1 through a resistor R0 circuit; the sources of the zero NMOS tube NM0 and the first NMOS tube NM1 are connected with a fourth NMOS tube NM4 through a second NMOS tube NM 2; the gate of the second PMOS tube PM2 and the gate of the second NMOS tube NM2 input the precharge pull-UP signal UP1, and the gate of the third PMOS tube PM3 inputs the precharge pull-UP signal UP2. The gate of the third PMOS transistor PM3 inverts the precharge pull-UP signal UP2 through the first inverter INV 1.
Further, the second operational amplifier comprises a fourth PMOS pipe PM4, a seventh PMOS pipe PM7, an eighth PMOS pipe PM8, a fifth NMOS pipe NM5 and a sixth NMOS pipe NM6; the drain electrode of the fourth PMOS tube is connected with the source electrode of the sixth PMOS tube PM6, the drain electrode of the sixth PMOS tube PM6 is connected with the source electrodes of the seventh PMOS tube PM7 and the eighth PMOS tube PM8, the drain electrodes of the seventh PMOS tube PM7 and the eighth PMOS tube PM8 are connected with the drain electrodes and the grid electrodes of the fifth NMOS tube NM5 and the sixth NMOS tube NM6, the drain electrodes of the sixth NMOS tube NM6 and the drain electrodes of the eighth PMOS tube PM8 are connected with the drain electrodes of the seventh NMOS tube NM7, and the grid electrode of the seventh PMOS tube PM7 is connected with a resistor R0. The gate of the seventh NMOS transistor inverts the precharge pull-down signal DN through the second inverter INV 2.
Further, the gate of the zero NMOS transistor is input with a first pre-charged reference voltage VR1. The gate of the eighth PMOS transistor is input with a precharged second reference voltage VR2.
The fourth NMOS tube NM4 is connected with a third NMOS tube NM3, and bias current IB1 is input to the grid electrode of the fourth NMOS and the grid electrode and drain electrode signals of the third NMOS tube.
The fourth PMOS tube PM4 is connected with a fifth PMOS tube PM5 in a circuit, and bias current IB2 is input to the grid electrode of the fourth PMOS tube PM4 and the grid and drain electrode signals of the fifth PMOS tube PM 5.
The sources of the second PMOS tube PM2, the zero PMOS tube PM0, the first PMOS tube PM1, the third PMOS tube PM3, the fourth PMOS tube PM4 and the fifth PMOS tube PM5 are connected with the VDD end of the input power supply; the sources of the third NMOS tube NM3, the fourth NMOS tube NM4, the fifth NMOS tube NM5, the sixth NMOS tube NM6 and the seventh NMOS tube NM7 are connected with the ground end GND of the input power supply.
The circuit is integrated in each constant current source output channel, when the constant current source output is started, the circuit is in a closed state, and the values of the precharge pull-UP signals UP1 and UP2 and the precharge pull-down signal DN are as follows: UP 1=0, UP 2=0, dn=0, and by controlling the timing of UP1, UP2, and DN, the circuit is in different operating states and has different functions.
The values of UP1, UP2 and DN are 0 and 1, and the precharge pull-UP signal and the precharge pull-down signal are high-efficient in the circuit, and the circuit configures the potential value of the output end by configuring the values of the precharge pull-UP signal and the pull-down signal, so that different display effects are presented when the LED display screen is driven to display.
1. When up1=0, up2=0, dn=0, the present circuit is in the off state.
2. Before display line feed, after the constant current channel is closed, UP1=1, UP2=0 and DN=0 are set, the first operational amplifier clamps the electric potential of the output end to VR1, namely the circuit charges the electric potential of the output end to VR1 electric potential, and at the moment, the circuit has the function of improving the lower ghost of the LED display screen.
3. After the display line is fed, after the constant current channel is closed, UP1=1, UP2=0 and DN=0 are set, the potential of the output end is clamped into VR1 by the first operational amplifier, namely, the circuit charges the potential of the output end to VR1 potential, and at the moment, the circuit has the function of improving darkness of the first line of the LED display screen.
4. Firstly, UP 1=0, UP 2=1 and dn=0 are configured to charge the electric potential of an output end to VDD, and then UP 1=0, UP 2=0 and dn=1 are configured to charge the electric potential of the output end to VR2, so that the electric potential of a constant current channel simulates a lamp bead lighting process on a display module, and the circuit has the function of improving high-low gray coupling and cross-board chromatic aberration in an LED display screen.
In summary, the present invention has been described and illustrated in the specification, and has been made into practical samples and tested for multiple uses, and from the effect of the use test, it can be proved that the present invention can achieve its intended purpose, and the practical value is undoubted. The above embodiments are only for illustrating the present invention, and are not to be construed as limiting the invention in any way, and any person having ordinary skill in the art will realize that equivalent embodiments of partial changes and modifications can be made by using the disclosed technology without departing from the scope of the technical features of the present invention.
Claims (9)
1. A precharge circuit of a common anode LED display screen driving chip is characterized in that,
comprising the following steps:
an input terminal for inputting a precharge pull-UP signal UP1, a precharge pull-UP signal UP2, and a precharge pull-down signal DN;
the output end is connected in series with a resistor R0 and is used for outputting potential;
the first operational amplifier is coupled with a second PMOS tube and a third PMOS tube, and inputs a precharge pull-UP signal UP1 and a precharge pull-UP signal UP2 through the second PMOS tube and the third PMOS tube;
the second operational amplifier is coupled with a seventh NMOS tube and inputs a precharge pull-down signal DN through the seventh NMOS tube; the first operational amplifier is input with a first precharge reference potential VR1, the second operational amplifier is input with a second precharge reference potential VR2, and the values of the precharge pull-UP signals UP1 and UP2 and the precharge pull-down signal DN input by the configuration input end are used for configuring the potential value output by the output end to be the first precharge reference potential VR1 or the second precharge reference potential VR2 after the first operational amplifier and the second operational amplifier are operated and amplified.
2. The precharge circuit of a common-anode LED display screen driving chip according to claim 1, wherein:
the first operational amplifier comprises a zero PMOS tube, a first PMOS tube, a zero NMOS tube, a first NMOS tube and a fourth NMOS tube; the zero NMOS tube is connected with the zero PMOS tube and the second PMOS tube in a circuit mode, the first NMOS tube is connected with the first PMOS tube in a circuit mode, the fourth NMOS tube is connected with the zero NMOS tube and the first NMOS tube in a circuit mode through the second NMOS tube, the first NMOS tube is connected with a resistor R0, and a pre-charging pull-UP signal UP1 is input into the grid electrode of the second NMOS tube.
3. The precharge circuit of a common-anode LED display screen driving chip according to claim 1, wherein:
the grid electrode of the third PMOS tube inverts the precharge pull-UP signal UP2 through the first inverter.
4. The precharge circuit of a common-anode LED display screen driving chip according to claim 1, wherein:
the second operational amplifier comprises a fourth PMOS tube, a seventh PMOS tube, an eighth PMOS tube, a fifth NMOS tube and a sixth NMOS tube; the fourth PMOS tube is connected to the seventh PMOS tube and the eighth PMOS tube through a sixth PMOS tube line, the fifth NMOS tube is connected with the seventh PMOS tube line, the sixth NMOS tube is connected with the eighth PMOS tube and the fifth NMOS tube line, the sixth NMOS tube line is connected with the seventh NMOS tube, and the seventh PMOS tube is connected with a resistor R0.
5. The precharge circuit of a common-anode LED display screen driving chip according to claim 4, wherein:
the gate of the seventh NMOS transistor inverts the precharge pull-down signal DN through the second inverter.
6. The precharge circuit of the common-anode LED display screen driving chip according to claim 2, wherein:
the grid electrode of the zero NMOS tube is input with a first pre-charge reference potential VR1.
7. The precharge circuit of a common-anode LED display screen driving chip according to claim 4, wherein:
the grid electrode of the eighth PMOS tube is input with a precharging second reference potential VR2.
8. The precharge circuit of a common-anode LED display screen driving chip according to claim 1, wherein:
the fourth NMOS tube circuit is connected with a third NMOS tube, and bias current IB1 is input to the grid electrode of the fourth NMOS tube and the grid and drain electrode signals of the third NMOS tube.
9. The precharge circuit of a common-anode LED display screen driving chip according to claim 8, wherein:
the fourth PMOS tube circuit is connected with a fifth PMOS tube, and bias current IB2 is input to signals of the grid electrode of the fourth PMOS tube and the grid electrode and the drain electrode of the fifth PMOS tube.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010768880.2A CN111785204B (en) | 2020-08-03 | 2020-08-03 | Pre-charging circuit of common-anode LED display screen driving chip |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010768880.2A CN111785204B (en) | 2020-08-03 | 2020-08-03 | Pre-charging circuit of common-anode LED display screen driving chip |
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| Publication Number | Publication Date |
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| CN111785204A CN111785204A (en) | 2020-10-16 |
| CN111785204B true CN111785204B (en) | 2023-08-25 |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1389847A (en) * | 2001-06-04 | 2003-01-08 | 精工爱普生株式会社 | Operational amplifying circuit, driving circuit and driving method |
| JP2008052162A (en) * | 2006-08-28 | 2008-03-06 | Epson Imaging Devices Corp | Electrooptical device and electronic apparatus |
| CN101436369A (en) * | 2006-04-28 | 2009-05-20 | 乐金显示有限公司 | Light emitting device and method of driving the same |
| CN102436789A (en) * | 2011-11-18 | 2012-05-02 | 友达光电股份有限公司 | Display panel and method of driving the same |
| CN205334408U (en) * | 2015-12-03 | 2016-06-22 | 深圳磨石科技有限公司 | Touch display apparatus and electronic equipment |
| CN212434213U (en) * | 2020-08-03 | 2021-01-29 | 四川遂宁市利普芯微电子有限公司 | Pre-charging circuit of common-anode LED display screen driving chip |
-
2020
- 2020-08-03 CN CN202010768880.2A patent/CN111785204B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1389847A (en) * | 2001-06-04 | 2003-01-08 | 精工爱普生株式会社 | Operational amplifying circuit, driving circuit and driving method |
| CN101436369A (en) * | 2006-04-28 | 2009-05-20 | 乐金显示有限公司 | Light emitting device and method of driving the same |
| JP2008052162A (en) * | 2006-08-28 | 2008-03-06 | Epson Imaging Devices Corp | Electrooptical device and electronic apparatus |
| CN102436789A (en) * | 2011-11-18 | 2012-05-02 | 友达光电股份有限公司 | Display panel and method of driving the same |
| CN205334408U (en) * | 2015-12-03 | 2016-06-22 | 深圳磨石科技有限公司 | Touch display apparatus and electronic equipment |
| CN212434213U (en) * | 2020-08-03 | 2021-01-29 | 四川遂宁市利普芯微电子有限公司 | Pre-charging circuit of common-anode LED display screen driving chip |
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| Publication number | Publication date |
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| CN111785204A (en) | 2020-10-16 |
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