CN111783897A - Method and system for determining equipment testability verification fault sample size - Google Patents

Method and system for determining equipment testability verification fault sample size Download PDF

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CN111783897A
CN111783897A CN202010649567.7A CN202010649567A CN111783897A CN 111783897 A CN111783897 A CN 111783897A CN 202010649567 A CN202010649567 A CN 202010649567A CN 111783897 A CN111783897 A CN 111783897A
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秦亮
王康
史贤俊
聂新华
王朕
陆巍巍
肖支才
张文广
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Naval Aeronautical University
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Abstract

The invention discloses a method and a system for determining equipment testability verification fault sample size. The system comprises: constructing a testability verification model according to the functional structure of the equipment; the testability verification model comprises a plurality of hierarchical nodes; the testability verification model is a hierarchical Bayesian network model; calculating posterior probability distribution of the fault detection rate of the testability verification model; calculating a risk value of a receiver and a risk value of a user according to the posterior probability distribution; calculating a fault sample size and a fault criterion according to the risk value of the underwriter and the risk value of the user; distributing the fault sample size according to the fault sample size and the fault criterion; and limiting the fault sample size according to the distribution condition to obtain the final fault sample size. The invention can ensure the sufficiency and rationality of the sample size.

Description

Method and system for determining equipment testability verification fault sample size
Technical Field
The invention relates to the field of equipment testability, in particular to a method and a system for determining equipment testability verification fault sample size.
Background
Testability, a system attribute of equipment, is an important design characteristic of systems and devices that facilitates testing, fault diagnosis, and condition monitoring, and is also an important component that constitutes a quality characteristic of the equipment. The general equipment testability engineering is divided into several stages of testability demand analysis, testability index distribution, testability modeling, prediction, testability verification and the like, wherein the main content of the testability verification is to comprehensively balance the risks and index requirements of a user and a receiver, the required fault sample amount and the fault criterion are determined by using a test method specified by the testability design, the test design level of the equipment is estimated according to the specified method, and whether the equipment meets the specified testability requirement is judged through an acceptance/rejection criterion. Therefore, the determination of the fault sample size is the primary premise for the development of the testability verification, and is also a key link for ensuring the reasonability and the accuracy of the testability verification conclusion.
At the present stage, most methods for guiding the testability verification of the fault sample size are standard methods, namely, the method is determined based on a statistical test method of binomial distribution, namely, when risks of a bearing party and a user party and requirements of the bearing party and the user party are given, a minimum sample size determination principle is adopted, on one hand, the determined fault sample size is large and is not beneficial to engineering realization, on the other hand, the same fault sample size and fault criteria can be obtained for different systems, and therefore structural characteristics and functional characteristics of equipment are undoubtedly separated, and the method is difficult to apply in engineering practice.
Disclosure of Invention
In order to solve the problems, the invention provides a method and a system for determining the sample size of equipment testability verification faults.
In order to achieve the purpose, the invention provides the following scheme:
a device testability verification fault sample size determination method comprises the following steps:
constructing a testability verification model according to the functional structure of the equipment; the testability verification model comprises a plurality of hierarchical nodes; the testability verification model is a hierarchical Bayesian network model;
calculating posterior probability distribution of the fault detection rate of the testability verification model;
calculating a risk value of a receiver and a risk value of a user according to the posterior probability distribution;
calculating a fault sample size and a fault criterion according to the risk value of the underwriter and the risk value of the user;
distributing the fault sample size according to the fault sample size and the fault criterion;
and limiting the fault sample size according to the distribution condition to obtain the final fault sample size.
Optionally, the calculating a posterior probability distribution of the fault detection rate of the testability verification model specifically includes:
calculating posterior distribution of the hierarchical nodes without father nodes, wherein the posterior distribution is self-prior;
calculating posterior distribution of the level nodes with the father nodes as inheritance prior;
fusing the self-prior and the inheritance prior to obtain node joint prior distribution;
acquiring success-failure type verification test data pairs of the level nodes;
and calculating the posterior probability distribution of the fault detection rate of the testability verification model according to the combined posterior distribution and the success-or-failure verification test data pair.
Optionally, the limiting the fault sample size according to the distribution condition to obtain a final fault sample size specifically includes:
judging whether the fault sample size can cover the number of fault modes of each layer of the equipment;
if not, recalculating the fault sample size;
if so, judging whether the sample allocation amount of the fault mode with low fault frequency is less than 1;
if so, re-determining the sample allocation amount of the fault mode with low fault frequency to obtain the limited sample allocation amount of the fault mode;
and determining the final fault sample amount according to the limited fault mode sample allocation amount.
Optionally, the determining a final failure sample size according to the distribution amount of the failure mode samples after each limitation, and then further includes:
and calculating a final fault criterion according to the final fault sample amount.
The invention also provides a system for determining the amount of the equipment testability verification fault samples, which comprises the following steps:
the model construction module is used for constructing a testability verification model according to the functional structure of the equipment; the testability verification model comprises a plurality of hierarchical nodes; the testability verification model is a hierarchical Bayesian network model;
the posterior probability distribution calculating module is used for calculating posterior probability distribution of the fault detection rate of the testability verification model;
the risk value calculation module is used for calculating the risk value of the underwriter and the risk value of the user according to the posterior probability distribution;
the fault sample amount calculation module is used for calculating a fault sample amount and a fault criterion according to the risk value of the receiver and the risk value of the user;
the distribution module is used for distributing the fault sample size according to the fault sample size and the fault criterion;
and the limiting module is used for limiting the fault sample size according to the distribution condition to obtain the final fault sample size.
Optionally, the posterior probability distribution calculating module specifically includes:
the self-prior calculating unit is used for calculating the posterior distribution of the hierarchical nodes without father nodes, and the posterior distribution is self-prior;
the inheritance prior calculation unit is used for calculating posterior distribution of the level nodes with father nodes and is inheritance prior;
the fusion unit is used for fusing the autopriors and the inheritance priors to obtain node joint prior distribution;
the acquisition unit is used for acquiring success-failure type verification test data pairs of the level nodes;
and the posterior probability distribution calculating unit is used for calculating the posterior probability distribution of the fault detection rate of the testability verification model according to the combined posterior distribution and the success-or-failure type verification test data pair.
Optionally, the limiting module specifically includes:
the first judging unit is used for judging whether the fault sample size can cover the number of the fault modes of each layer of the equipment;
the fault sample amount calculating unit is used for recalculating the fault sample amount when the fault sample amount cannot cover the fault mode number of each layer of the equipment;
the second judging unit is used for judging whether the sample distribution amount of the fault mode with low fault frequency is less than 1 or not when the fault sample amount can cover the number of the fault modes of each layer of the equipment;
the first determining unit is used for re-determining the sample allocation amount of the fault mode with low fault frequency to obtain the limited sample allocation amount of the fault mode when the sample allocation amount of the fault mode with low fault frequency is smaller than 1;
and the second determining unit is used for determining the final fault sample amount according to the limited fault mode sample distribution amount.
Optionally, the limiting module further includes:
and the final fault criterion calculating unit is used for calculating a final fault criterion according to the final fault sample size.
According to the specific embodiment provided by the invention, the invention discloses the following technical effects:
the invention fully considers the structural characteristics of equipment, establishes a model through Bayes Network (BN) by dividing the system level, and takes a testability index parameter FDR (fault detection rate) as a network transmission parameter. On the basis of Bayes posterior risk criterion, a fault sample size determining method under the principle of minimum sample size is provided, whether the determined sample size can meet the distribution requirement is firstly analyzed, if not, limitation is required, then the sample size is distributed, the functional characteristics of equipment are considered, the distribution result is corrected, and the sample size is calculated again until the determined sample size can meet the requirement.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without inventive exercise.
FIG. 1 is a flow chart of a method for determining a sample size of a testability verification failure of an apparatus according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a hierarchical structure of an equipment system according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a standard HBN structure;
FIG. 4 is a schematic structural diagram of an HBN testability verification model according to an embodiment of the present invention;
FIG. 5 is a flow chart for re-determining the fault sample size by a restriction rule;
fig. 6 is a block diagram of a configuration of a system for determining a sample amount of a testability verification failure according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
As shown in fig. 1, a method for determining the amount of a device testability verification failure sample includes the following steps:
step 101: constructing a testability verification model according to the functional structure of the equipment; the testability verification model comprises a plurality of hierarchical nodes; the testability verification model is a hierarchical Bayesian network model.
Step 102: and calculating posterior probability distribution of the fault detection rate of the testability verification model. Specifically, the method comprises the following steps: calculating posterior distribution of the hierarchical nodes without father nodes, wherein the posterior distribution is self-prior; calculating posterior distribution of the level nodes with the father nodes as inheritance prior; fusing the self-prior and the inheritance prior to obtain node joint prior distribution; acquiring success-failure type verification test data pairs of the level nodes; and calculating the posterior probability distribution of the fault detection rate of the testability verification model according to the combined posterior distribution and the success-or-failure verification test data pair.
Step 103: and calculating the risk value of the receiver and the risk value of the user according to the posterior probability distribution.
Step 104: and calculating a fault sample size and a fault criterion according to the risk value of the underwriter and the risk value of the user.
Step 105: and distributing the fault sample size according to the fault sample size and the fault criterion.
Step 106: and limiting the fault sample size according to the distribution condition to obtain the final fault sample size. Specifically, the method comprises the following steps: judging whether the fault sample size can cover the number of fault modes of each layer of the equipment; if not, recalculating the fault sample size; if so, judging whether the sample allocation amount of the fault mode with low fault frequency is less than 1; if so, re-determining the sample allocation amount of the fault mode with low fault frequency to obtain the limited sample allocation amount of the fault mode; and determining the final fault sample amount according to the limited fault mode sample allocation amount, and calculating a final fault criterion according to the final fault sample amount.
The specific working principle is as follows:
(1) establishing testability verification model
The large electronic equipment is an aggregate with specific functions, consists of a plurality of units which are mutually interacted and interdependent, can divide the units into different layers according to the difference of functional structure division, and comprises a subsystem layer, an external field replaceable unit layer, an internal field replaceable unit layer, a module layer, an element layer and the like.
Assuming the equipment system hierarchy division number is L, using (L, n)l) Denotes the L (L ═ 1,2, …, L) th layer (n-lUnit (n)l＝1,2,…,Nl，NlRepresenting the total number of level i elements in the equipment hierarchy), the system hierarchy is in the form shown in fig. 2.
One HBN (Hierarchical Bayes Network) may be represented as B ═ G, P >, where:
1) g ═ V, E > represents a directed acyclic graph, where V represents a set of nodes, the elements in V represent variables, unlike BN (bayesian network), HBN nodes exhibit hierarchical features, and E represents a set of directed edges, representing associations between variables.
2) P represents a conditional probability distribution. According to the probabilistic chain rule, e.g. if given V ═ X1,X2,…,XnAnd then, there are:
Figure BDA0002574393770000061
in the formula pa (X)i) Representing node XiSo that a standard HBN has the form shown in fig. 3.
The hierarchical structure division of the system is combined, the units in the concrete system are abstracted into nodes in the HBN, and the HBN testability verification model shown in figure 4 is constructed, wherein the nodes in the model have the hierarchical structure characteristic and are called as hierarchical nodes. If given a system level l and the nth levellOne unit then is available
Figure BDA0002574393770000062
Representing the nth layer of HBN testability verification modellAnd (4) each level node.
Obviously, the total level node number in the HBN testability verification model
Figure BDA0002574393770000063
Since the top layer of the system has only one level node, n is satisfiedL＝NL＝1。
The hierarchical characteristic of the equipment structure is combined, and the following limiting conditions exist when the HBN testability verification model is constructed:
(1) the transmission among the level nodes has single directivity, namely, the transmission can be carried out only from the lower level node to the upper level node, and the cross-level transmission is not allowed; (2) the nodes at the same layer have transitivity, which indicates the interaction of equipment structures.
Consider two cases where a hierarchical node failure is undetectable and detectable, namely a hierarchical node
Figure BDA0002574393770000071
The value is {0,1}, then the probability
Figure BDA0002574393770000072
Can reflect fault detection/isolation of corresponding system components, so that the hierarchical node
Figure BDA0002574393770000073
The FDR (failure detection Rate) index value of (A) is represented as
Figure BDA0002574393770000074
(2) Model reasoning
According to the level node
Figure BDA0002574393770000075
With or without a parent node, two situations can be distinguished:
1) hierarchical node
Figure BDA0002574393770000076
Without father node
Due to the hierarchical nodes
Figure BDA0002574393770000077
Without father node, the fault detection rate is generally taken in engineering
Figure BDA0002574393770000078
The prior distribution is a conjugate distribution of binomial distribution, Beta distribution, and has the following form:
Figure BDA0002574393770000079
in the formula: a. b is a hyper-parameter of the prior distribution.
In the process of
Figure BDA00025743937700000710
In the test of verifying the test of the secondary success/failure type fixed number sampling, there are
Figure BDA00025743937700000711
If the secondary test fails, the level node can be obtained by combining the Bayes theory
Figure BDA00025743937700000712
The posterior distribution of (A) is:
Figure BDA00025743937700000713
in the formula
Figure BDA00025743937700000714
I.e. representing a hierarchical node
Figure BDA00025743937700000715
Success-failure type testability verification data pair
Figure BDA00025743937700000716
2) Hierarchical node
Figure BDA00025743937700000717
With a parent node
By using
Figure BDA00025743937700000718
Representing hierarchical nodes
Figure BDA00025743937700000719
Set of parent nodes of
Figure BDA00025743937700000720
May comprise hierarchical nodes
Figure BDA00025743937700000721
The same layer node or the node of the l-1 layer. Then the node
Figure BDA00025743937700000722
The conditional probability given its set of parent nodes can be expressed as
Figure BDA0002574393770000081
Further determining a Conditional Probability Table (CPT) of the node according to the value and the structural relation of the node variable, fully combining engineering practice, expert knowledge, related theories and the like, and finally determining the CPT by the method
Figure BDA0002574393770000082
And acquiring the posterior distribution of each level node according to the joint probability of the non-empty parent node set, wherein the joint probability is expressed as follows:
Figure BDA0002574393770000083
based on the formula (4),
Figure BDA0002574393770000084
the decomposition may be further recursive. Based on the CPT of each node, it can be obtained
Figure BDA0002574393770000085
The edge probability of any level node can be further determined:
Figure BDA0002574393770000086
in fact, because
Figure BDA0002574393770000087
It is difficult to obtain the analytic form, and for the subsequent data processing, it is selected as the node of the hierarchy
Figure BDA0002574393770000088
Distribution form with the same prior distribution, and MonteCarlo method
Figure BDA0002574393770000089
Sampling is performed, then a Beta distribution is fitted based on the sample set, and a distribution hyper-parameter is determined.
Through the analysis, the level node
Figure BDA00025743937700000810
Involving two prior distributions, one being the prior distribution of its node itself
Figure BDA00025743937700000811
Called as self-prior, is obtained by reasoning and fusing prior information of a node at a lower layer or the same layer according to prior information of an equipment development stage
Figure BDA00025743937700000812
Referred to as inheritance priors. In order to obtain the posterior distribution of top FDR of HBN testability verification model, self-prior, inheritance prior and success-or-failure verification test data pairs of the nodes of the hierarchy are fused
Figure BDA00025743937700000813
The method mainly comprises two steps:
the fusion of the autopriors and the inheritance priors. First of all, the prior weighting coefficient w is distributeds(0≤ws≦ 1) and inherit the prior weight coefficient wi(0≤wi1) or less) which satisfies ws+w i1, the determination principle is as follows: the self-prior and inheritance prior weight coefficients reflect the degree of deviation in fusion and derivation combined posterior distribution if ws＞wiThe confidence of the self-prior is larger than that of the inheritance prior, the self-prior is dominant when the fusion and derivation joint distribution is fused, and if w is greater than that of the inheritance priors＜wiThe confidence degree of the self-prior is smaller than the inheritance prior, the inheritance prior is dominant when the joint distribution is fused and derived, and if w is smaller than the inheritance priors＝wiThe method shows that the self-prior and the inheritance prior are not sufficient in recognition degree, and the fusion and the derivation are considered to occupy the same position when the joint distribution is fused and deduced. And then sampling the two prior distributions by adopting a Monte Carlo method, generating a new sample data set based on respective weight coefficients, and fitting the sample data set into a Beta distribution form to obtain joint prior distribution of the nodes.
And (5) calculating posterior distribution. Verification test data pair combining success and failure of secondary nodes
Figure BDA0002574393770000091
And the obtained node joint prior distribution, and the posterior probability distribution of the node FDR can be obtained based on the formula (3).
And performing layer-by-layer fusion reasoning according to the HBN testability verification model to obtain the system FDR combined posterior probability distribution
Figure BDA0002574393770000092
(3) Determining a fault sample size
The constraint parameters of the testability verification fault sample size determination method based on binomial distribution mainly comprise: the bearing party ensures that the equipment testability level can pass the verified index requirement value p with higher probability0(ii) a Lower limit index requirement value p of equipment testability level specified by user1The proof-of-measure risk value α, i.e. the testability level p ═ p of the equipment0When the equipment fails to verifyProbability, user risk value β, i.e. the testability level p ═ p of the equipment1When, equip the probability of passing the verification.
The method for determining the testability verification fault sample size is generally selected as a single method, and the sampling characteristic function of the method is as follows:
Figure BDA0002574393770000093
where n and c are the sample size and the maximum allowable detection/isolation failure number, and f represents the observed failure number. The method for determining the fault sample size by using different verification schemes comprises the following steps:
1) according to the classical authentication scheme, (n, c) is solved by the following inequality:
Figure BDA0002574393770000094
based on the minimum sample size principle, stopping once the minimum n value satisfying the formula is found. Researches show that the fault sample size determined by adopting the classical verification scheme is large and difficult to meet the practical engineering requirements.
2) According to the traditional Bayes verification scheme, (n, c) is solved by the following inequality:
Figure BDA0002574393770000101
similarly, the equation (8) is solved, and when the minimum n value meeting the condition is obtained, the required fault sample size is considered, and research shows that the scheme can reduce the fault sample size compared with the classical verification scheme, but the sufficiency of the sample size and the reasonability after the sample size distribution are not considered for the equipment functional characteristics.
Based on the method, firstly, the system top layer joint posterior distribution obtained by combining the method through an HBN testability verification model
Figure BDA0002574393770000102
To be provided with
Figure BDA0002574393770000103
Instead of pi (p) in the conventional Bayes scheme, this may reflect
Figure BDA0002574393770000104
The acceptance of the equipment by the time bearer not passing the verification, an
Figure BDA0002574393770000105
The support degree of the user for the equipment passing the verification is adopted, and the risk value of the contractor and the risk value of the user can be expressed as follows:
Figure BDA0002574393770000106
Figure BDA0002574393770000107
to solve equations (9) and (10), according to the MonteCarlo integration method:
Figure BDA0002574393770000108
due to the fact that
Figure BDA0002574393770000109
Has been determined by an HBN testability verification model, from which N obedients are generated
Figure BDA0002574393770000111
Distributed sample data set
Figure BDA0002574393770000112
By choosing a suitable value for N, equations (9) and (10) can be estimated according to equation (11):
Figure BDA0002574393770000113
Figure BDA0002574393770000114
in the formulae (12) and (13)
Figure BDA0002574393770000115
And
Figure BDA0002574393770000116
the representative function is expressed, and the specific meaning is as follows:
Figure BDA0002574393770000117
Figure BDA0002574393770000118
further solving for the top-level minimum sample size by equation (16) satisfying the inequality constraint
Figure BDA0002574393770000119
And fault criterion
Figure BDA00025743937700001110
Figure BDA00025743937700001111
To this end, the quantity of fault samples based on a posterior distribution is determined
Figure BDA00025743937700001112
And maximum allowable number of failures for detection/isolation of fault criteria
Figure BDA00025743937700001113
But the determined fault sample size
Figure BDA00025743937700001114
There are two problems in making the allocation: firstly, whether the distributed fault sample size can cover the number of fault modes of each layer of equipment, namely the sufficiency problem of the fault sample size; second, consider clothesThe functional characteristics of the device can cause obvious difference of relative occurrence frequencies of faults of two fault modes, so that the number of samples distributed by the fault mode with low relative occurrence frequency of the faults is 0 when distributing the quantity of fault samples, the sufficiency and comprehensiveness of testability verification cannot be guaranteed undoubtedly, verification evaluation conclusion is further influenced, and the verification implementation scheme is unreasonable.
(4) Fault sample distribution
Aiming at the two problems, firstly, a hierarchical sampling algorithm based on the failure rate is combined with an HBN testability verification model to form a hierarchy and the failure rate of each node
Figure BDA0002574393770000121
Determining the samples according to the relative occurrence frequency of faults
Figure BDA0002574393770000122
Is allocated to its lower node
Figure BDA0002574393770000123
And (4) providing a fault rate hierarchical sampling algorithm based on the HBN testability verification model, as shown in a formula (17).
Figure BDA0002574393770000124
In the formula:
Figure BDA0002574393770000125
denotes the n-th layer of the L-1 st layerL-1The relative frequency of occurrence of faults of each node;
Figure BDA0002574393770000126
denotes the n-th layer of the L-1 st layerL-1And working time coefficients of modules corresponding to the nodes.
Then adopting the same method to measure the node sample size
Figure BDA0002574393770000127
Continue to distribute to its lower nodes
Figure BDA0002574393770000128
This is done until the distribution to the lowest layer.
On the fault sample size
Figure BDA0002574393770000129
After being distributed according to the method, according to the sample size
Figure BDA00025743937700001210
And sample allocation case, required for sample size
Figure BDA00025743937700001211
The determination process of (2) limits:
limitation 1: consider the number of equipment layer I failure modes Ml. If it is
Figure BDA00025743937700001212
Obviously, the number of samples cannot cover the number of failure modes, and sample distribution cannot be performed. The formula (16) calculation process needs to be limited, and the recalculation is small
Figure BDA00025743937700001213
If still have
Figure BDA00025743937700001214
It needs to be recalculated again until it is satisfied after t times
Figure BDA00025743937700001215
Sample size and fault criterion
Figure BDA00025743937700001216
If it is
Figure BDA00025743937700001217
Directly to the sample size
Figure BDA00025743937700001218
And (6) distributing.
Limitation 2: the difference of the relative frequency of the occurrence of the fault caused by the functional characteristics of the equipment is considered. And (3) distributing the sample size meeting the limit 1, and limiting according to the following steps in order to ensure the sufficiency and reasonability of the sample size:
1. the distribution sample quantity of each hierarchy node can be determined as
Figure BDA00025743937700001219
Then use
Figure BDA00025743937700001220
Denotes the nth layer of the llThe number of samples distributed to the jth fault mode to which the hierarchical node belongs, if the sample size distributed to the fault mode with low fault relative frequency exists
Figure BDA0002574393770000131
Then will be
Figure BDA0002574393770000132
Is taken as
Figure BDA0002574393770000133
If there is
Figure BDA0002574393770000134
Then round it to
Figure BDA0002574393770000135
The limited number of fault samples
Figure BDA0002574393770000136
If all failure modes allocate quantities
Figure BDA0002574393770000137
No further calculations need to be performed.
2. For after limitation
Figure BDA0002574393770000138
Performing recalculation to obtain new sample amount
Figure BDA0002574393770000139
3. Will be provided with
Figure BDA00025743937700001310
Reiterating the equation (16) to calculate a qualified fault criterion
Figure BDA00025743937700001311
The fault sample size can be determined by the two limiting rules
Figure BDA00025743937700001312
The specific implementation flow is shown in fig. 5.
The method can fully utilize the equipment structure information, can effectively reduce the sample size under the same index constraint compared with a classical verification scheme and a traditional Bayes scheme, and can consider the system function characteristics to ensure the accuracy and the reasonability of the testability verification conclusion.
In the whole life cycle of the testability design, a large amount of prior information (including detailed FMEA analysis reports, prior information of each part and the like) is accumulated, on one hand, the HBN testability verification model constructed in the invention can fully reflect the structural characteristics of equipment, on the other hand, a large amount of prior information and test data accumulated in the equipment structure can be fully utilized based on model reasoning, and the self-prior and inheritance prior of the hierarchical nodes can be fused through weight distribution, so that the reliability of the distribution of the combined posterior is ensured.
The invention is based on the traditional Bayes verification scheme, in particular to the system top layer joint posterior distribution obtained by an HBN testability verification model
Figure BDA00025743937700001313
To be provided with
Figure BDA00025743937700001314
Instead of pi (p) in the traditional Bayes scheme, the sample size is lower than in the classical verification scheme. Compared with the traditional Bayes testability verification scheme, the fault sample size determined by the two limiting schemes is reduced, and the result is more scientificReasonable and practical fitting engineering.
The invention gives two limits to the sample size determination process based on posterior distribution and the functional characteristics of the combination equipment: limitation 1 considers the problem of whether the sample size can cover all failure modes to ensure full coverage of the failure modes; the limit 2 considers the problem that the number of failure mode assignments is 0, which is low relative to the failure frequency, to ensure the sufficiency and reasonableness of the sample size.
As shown in fig. 6, the present invention further provides an equipment testability verification fault sample size determining system, including:
the model construction module 601 is used for constructing a testability verification model according to the functional structure of the equipment; the testability verification model comprises a plurality of hierarchical nodes; the testability verification model is a hierarchical Bayesian network model.
A posterior probability distribution calculating module 602, configured to calculate a posterior probability distribution of the fault detection rate of the testability verification model.
The posterior probability distribution calculating module 602 specifically includes:
and the self-prior calculating unit is used for calculating the posterior distribution of the hierarchical nodes without the father nodes, and is self-prior.
And the inheritance prior calculating unit is used for calculating the posterior distribution of the hierarchical nodes with the father nodes and is inheritance prior.
And the fusion unit is used for fusing the self-prior and the inheritance prior to obtain node joint prior distribution.
And the acquisition unit is used for acquiring success-failure type verification test data pairs of the level nodes.
And the posterior probability distribution calculating unit is used for calculating the posterior probability distribution of the fault detection rate of the testability verification model according to the combined posterior distribution and the success-or-failure type verification test data pair.
And a risk value calculation module 603 configured to calculate a risk value of the receiver and a risk value of the user according to the posterior probability distribution.
And a fault sample size calculation module 604, configured to calculate a fault sample size and a fault criterion according to the risk value of the underwriter and the risk value of the user.
And the allocating module 605 is configured to allocate the fault sample size according to the fault sample size and the fault criterion.
And a limiting module 606, configured to limit the fault sample size according to a distribution condition, so as to obtain a final fault sample size.
The limiting module 606 specifically includes:
and the first judging unit is used for judging whether the fault sample size can cover the number of the fault modes of each layer of the equipment.
And the fault sample amount calculating unit is used for recalculating the fault sample amount when the fault sample amount cannot cover the fault mode number of each layer of the equipment.
And the second judging unit is used for judging whether the sample distribution amount of the fault mode with low fault frequency is less than 1 or not when the fault sample amount can cover the number of the fault modes of each layer of the equipment.
And the first determining unit is used for re-determining the sample allocation amount of the fault mode with low fault frequency to obtain the limited sample allocation amount of the fault mode when the sample allocation amount of the fault mode with low fault frequency is less than 1.
And the second determining unit is used for determining the final fault sample amount according to the limited fault mode sample distribution amount.
And the final fault criterion calculating unit is used for calculating a final fault criterion according to the final fault sample size.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. For the system disclosed by the embodiment, the description is relatively simple because the system corresponds to the method disclosed by the embodiment, and the relevant points can be referred to the method part for description.
The principles and embodiments of the present invention have been described herein using specific examples, which are provided only to help understand the method and the core concept of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, the specific embodiments and the application range may be changed. In view of the above, the present disclosure should not be construed as limiting the invention.

Claims (8)

1. A method for determining the sample size of the testability verification fault of equipment is characterized by comprising the following steps:
constructing a testability verification model according to the functional structure of the equipment; the testability verification model comprises a plurality of hierarchical nodes; the testability verification model is a hierarchical Bayesian network model;
calculating posterior probability distribution of the fault detection rate of the testability verification model;
calculating a risk value of a receiver and a risk value of a user according to the posterior probability distribution;
calculating a fault sample size and a fault criterion according to the risk value of the underwriter and the risk value of the user;
distributing the fault sample size according to the fault sample size and the fault criterion;
and limiting the fault sample size according to the distribution condition to obtain the final fault sample size.
2. The method for determining the equipment testability verification fault sample size according to claim 1, wherein the calculating a posterior probability distribution of the fault detection rate of the testability verification model specifically includes:
calculating posterior distribution of the hierarchical nodes without father nodes, wherein the posterior distribution is self-prior;
calculating posterior distribution of the level nodes with the father nodes as inheritance prior;
fusing the self-prior and the inheritance prior to obtain node joint prior distribution;
acquiring success-failure type verification test data pairs of the level nodes;
and calculating the posterior probability distribution of the fault detection rate of the testability verification model according to the combined posterior distribution and the success-or-failure verification test data pair.
3. The method for determining the equipment testability verification fault sample size according to claim 1, wherein the step of limiting the fault sample size according to the distribution condition to obtain a final fault sample size specifically comprises:
judging whether the fault sample size can cover the number of fault modes of each layer of the equipment;
if not, recalculating the fault sample size;
if so, judging whether the sample allocation amount of the fault mode with low fault frequency is less than 1;
if so, re-determining the sample allocation amount of the fault mode with low fault frequency to obtain the limited sample allocation amount of the fault mode;
and determining the final fault sample amount according to the limited fault mode sample allocation amount.
4. The method of claim 3, wherein the determining the final failure sample size according to the distribution of the failure mode samples after the limiting further comprises:
and calculating a final fault criterion according to the final fault sample amount.
5. An equipment testability verification fault sample size determination system, comprising:
the model construction module is used for constructing a testability verification model according to the functional structure of the equipment; the testability verification model comprises a plurality of hierarchical nodes; the testability verification model is a hierarchical Bayesian network model;
the posterior probability distribution calculating module is used for calculating posterior probability distribution of the fault detection rate of the testability verification model;
the risk value calculation module is used for calculating the risk value of the underwriter and the risk value of the user according to the posterior probability distribution;
the fault sample amount calculation module is used for calculating a fault sample amount and a fault criterion according to the risk value of the receiver and the risk value of the user;
the distribution module is used for distributing the fault sample size according to the fault sample size and the fault criterion;
and the limiting module is used for limiting the fault sample size according to the distribution condition to obtain the final fault sample size.
6. The system for determining the sample size of the equipment testability verification fault according to claim 5, wherein the posterior probability distribution calculating module specifically includes:
the self-prior calculating unit is used for calculating the posterior distribution of the hierarchical nodes without father nodes, and the posterior distribution is self-prior;
the inheritance prior calculation unit is used for calculating posterior distribution of the level nodes with father nodes and is inheritance prior;
the fusion unit is used for fusing the autopriors and the inheritance priors to obtain node joint prior distribution;
the acquisition unit is used for acquiring success-failure type verification test data pairs of the level nodes;
and the posterior probability distribution calculating unit is used for calculating the posterior probability distribution of the fault detection rate of the testability verification model according to the combined posterior distribution and the success-or-failure type verification test data pair.
7. The equipment testability verification fault sample size determination system of claim 5, wherein the limiting module specifically comprises:
the first judging unit is used for judging whether the fault sample size can cover the number of the fault modes of each layer of the equipment;
the fault sample amount calculating unit is used for recalculating the fault sample amount when the fault sample amount cannot cover the fault mode number of each layer of the equipment;
the second judging unit is used for judging whether the sample distribution amount of the fault mode with low fault frequency is less than 1 or not when the fault sample amount can cover the number of the fault modes of each layer of the equipment;
the first determining unit is used for re-determining the sample allocation amount of the fault mode with low fault frequency to obtain the limited sample allocation amount of the fault mode when the sample allocation amount of the fault mode with low fault frequency is smaller than 1;
and the second determining unit is used for determining the final fault sample amount according to the limited fault mode sample distribution amount.
8. The equipment testability verification fault sample size determination system of claim 7, wherein the limit module further comprises:
and the final fault criterion calculating unit is used for calculating a final fault criterion according to the final fault sample size.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114218775A (en) * 2021-12-06 2022-03-22 中国航空综合技术研究所 Complex system task reliability test case design method under fault propagation model

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103714256A (en) * 2013-12-30 2014-04-09 北京航天测控技术有限公司 Sample size extraction determination method for testability verification of airplane airborne equipment
CN104915779A (en) * 2015-06-15 2015-09-16 北京航空航天大学 Sampling test design method based on Bayesian network
CN106124175A (en) * 2016-06-14 2016-11-16 电子科技大学 A kind of compressor valve method for diagnosing faults based on Bayesian network
CN109858097A (en) * 2018-12-29 2019-06-07 北京航天测控技术有限公司 A kind of spacecraft single machine test assessment methods of sampling

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103714256A (en) * 2013-12-30 2014-04-09 北京航天测控技术有限公司 Sample size extraction determination method for testability verification of airplane airborne equipment
CN104915779A (en) * 2015-06-15 2015-09-16 北京航空航天大学 Sampling test design method based on Bayesian network
CN106124175A (en) * 2016-06-14 2016-11-16 电子科技大学 A kind of compressor valve method for diagnosing faults based on Bayesian network
CN109858097A (en) * 2018-12-29 2019-06-07 北京航天测控技术有限公司 A kind of spacecraft single machine test assessment methods of sampling

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
史贤俊等: "基于层次Bayesian网络及后验风险准则的故障样本量确定方法", 《兵工学报》, vol. 40, no. 1, 31 January 2019 (2019-01-31), pages 171 - 181 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114218775A (en) * 2021-12-06 2022-03-22 中国航空综合技术研究所 Complex system task reliability test case design method under fault propagation model
CN114218775B (en) * 2021-12-06 2023-11-28 中国航空综合技术研究所 Complex system task reliability test case design method under fault propagation model

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