CN111782268A - Method, apparatus, device and computer readable medium for allocating hardware resources - Google Patents
Method, apparatus, device and computer readable medium for allocating hardware resources Download PDFInfo
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- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
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Abstract
The invention discloses a method, a device, equipment and a computer readable medium for allocating hardware resources, and relates to the technical field of computers. One embodiment of the method comprises: allocating a device identifier of a device register of a hardware device and an address index of a queue register of the hardware device to a client; binding the device identification of the assigned device register with the address index of the assigned queue register and storing the queue index base address of the queue register and the number of assigned queues to assign queue resources of the hardware device to the client; receiving an access request of the client to the hardware device, the access request including a device identification of a device register. According to the implementation method, hardware resources do not need to be distributed through a software middle layer, the system overhead can be reduced, and meanwhile the transmission efficiency is improved.
Description
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a method, an apparatus, a device, and a computer-readable medium for allocating hardware resources.
Background
The configuration register is an interface to configure software or read the hardware state. In order to meet the requirement of high performance, most peripheral hardware adopts a multi-queue structure. In a multi-queue architecture, there is one configuration register set for each queue, and the multiple queues form a configuration register queue. The configuration register sets and the queues are in one-to-one correspondence.
In the existing virtualization technology, a software middle layer is adopted, such as: and (4) simulating the virtualization effect of hardware by the Hypervisor. The configuration registers of the hardware are also simulated by the device simulation software.
In the process of implementing the invention, the inventor finds that at least the following problems exist in the prior art: the peripheral hardware directly utilizes virtualization to realize seamless connection with the client, but adopts a software intermediate layer to distribute hardware resources, increases the system overhead and reduces the transmission efficiency.
Disclosure of Invention
In view of this, embodiments of the present invention provide a method, an apparatus, a device, and a computer readable medium for allocating hardware resources, which do not need to allocate hardware resources through a software middle layer, and can reduce system overhead and improve transmission efficiency.
To achieve the above object, according to an aspect of an embodiment of the present invention, there is provided a method of allocating hardware resources, including:
allocating a device identifier of a device register of a hardware device and an address index of a queue register of the hardware device to a client;
binding the device identification of the assigned device register with the address index of the assigned queue register and storing the queue index base address of the queue register and the number of assigned queues to assign queue resources of the hardware device to the client;
receiving an access request of the client to the hardware device, the access request including a device identification of a device register.
After the binding the device identifier of the allocated device register with the address index of the allocated queue register and storing the queue index base address of the queue register and the number of allocated queues, the method further comprises:
reallocating queue resources of the target hardware equipment according to the equipment identifier of the equipment register and the number of the allocated queues;
the device identification of the device register is bound to the address index of the reallocated queue register, and the queue index base address of the reallocated queue register and the number of allocated queues are stored to migrate the client to the target hardware device.
After the binding the device identifier of the allocated device register with the address index of the allocated queue register and storing the queue index base address of the queue register and the number of allocated queues, the method further comprises:
deleting the binding relationship of the device identification of the allocated device register and the address index of the allocated queue register, and deleting the queue index base address of the queue register and the number of allocated queues to release the allocated device register and the allocated queue register.
The binding of the device identification of the assigned device register with the address index of the assigned queue register and storing the queue index base address of the queue register and the number of assigned queues includes:
setting a queue index base address table and a queue index offset table,
the queue index base address table records the corresponding relation between the device identification and the base address of the queue register, the queue index base address of the queue register is determined by the number of clients and the number of the distributed queues,
the queue index offset table records the relationship of the device identification and the offset, which is determined by the number of allocated queues.
The access request further includes an offset of the queue register, a maximum value of the offset being determined by the number of allocated queues.
The binding the device identification of the assigned device register with the address index of the assigned queue register, comprising:
the device identification of the assigned device register is bound to the address index of the assigned first queue register.
The device register mapped to a first device register address and a second device register address, the queue register mapped to a first queue register address and a second queue register address,
the guest accesses the device register via a first device register address, the host accesses the device register via a second device register address,
the client accesses the queue register through a first queue register address, and the host accesses the queue register through a second queue register address.
According to a second aspect of the embodiments of the present invention, there is provided an apparatus for allocating hardware resources, including:
the allocation module is used for allocating the equipment identifier of the equipment register of the hardware equipment and the address index of the queue register of the hardware equipment to the client;
a binding module for binding the device identifier of the allocated device register with the address index of the allocated queue register, and storing the queue index base address of the queue register and the number of allocated queues to allocate queue resources of the hardware device to the client;
and the access module is used for receiving an access request of the client to the hardware equipment, wherein the access request comprises the equipment identification of the equipment register.
According to a third aspect of the embodiments of the present invention, there is provided an electronic device for allocating hardware resources, including:
one or more processors;
a storage device for storing one or more programs,
when executed by the one or more processors, cause the one or more processors to implement the method as described above.
According to a fourth aspect of embodiments of the present invention, there is provided a computer readable medium, on which a computer program is stored, which when executed by a processor, implements the method as described above.
One embodiment of the above invention has the following advantages or benefits: firstly, allocating the equipment identifier of an equipment register of hardware equipment and the address index of a queue register of the hardware equipment to a client; then, binding the device identifier of the allocated device register and the address index of the allocated queue register, and storing the queue index base address of the queue register and the number of the allocated queues to allocate the queue resource of the hardware device to the client; finally, an access request from the client to the hardware device is received, the access request including the device identification of the device register. In the process of allocating the hardware equipment resources, the queue resources of the hardware equipment can be allocated to the client without adopting a software middle layer, so that the system overhead can be reduced, and the transmission efficiency can be improved.
Further effects of the above-mentioned non-conventional alternatives will be described below in connection with the embodiments.
Drawings
The drawings are included to provide a better understanding of the invention and are not to be construed as unduly limiting the invention. Wherein:
FIG. 1 is a schematic diagram of a main flow of a method of allocating hardware resources according to an embodiment of the present invention;
FIG. 2 is a diagram illustrating an application scenario of a method for allocating hardware resources according to an embodiment of the present invention;
FIG. 3 is a schematic flow diagram of migrating a hardware device in accordance with an embodiment of the present invention;
FIG. 4 is a schematic diagram of a differentiated access configuration channel according to an embodiment of the invention;
FIG. 5 is a flow diagram of an access configuration channel according to an embodiment of the invention;
FIG. 6 is a flow diagram illustrating host access to registers, according to an embodiment of the invention;
FIG. 7 is a schematic flow diagram of a client accessing a register, according to an embodiment of the invention;
FIG. 8 is a flow diagram illustrating a hardware device accepting host access according to an embodiment of the present invention;
FIG. 9 is a flowchart illustrating a hardware device accepting client access according to an embodiment of the invention;
fig. 10 is a schematic diagram of a main structure of an apparatus for allocating hardware resources according to an embodiment of the present invention;
FIG. 11 is an exemplary system architecture diagram in which embodiments of the present invention may be employed;
fig. 12 is a schematic structural diagram of a computer system suitable for implementing a terminal device or a server according to an embodiment of the present invention.
Detailed Description
Exemplary embodiments of the present invention are described below with reference to the accompanying drawings, in which various details of embodiments of the invention are included to assist understanding, and which are to be considered as merely exemplary. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the invention. Also, descriptions of well-known functions and constructions are omitted in the following description for clarity and conciseness.
Currently, the configuration registers and the queues under the hardware are fixed bindings. Hardware cannot be created, uninstalled or migrated, and it is difficult to dynamically allocate hardware resources. The dynamic allocation of hardware resources can only be simulated by adding a software middle layer. Meanwhile, the use of the software middle layer also increases the system overhead. The transmission efficiency is reduced.
In order to solve the technical problems of increasing the system overhead and reducing the transmission efficiency, the following technical scheme in the embodiment of the present invention may be adopted.
Referring to fig. 1, fig. 1 is a schematic diagram of a main flow of a method for allocating hardware resources according to an embodiment of the present invention, and allocates a device identifier of a device register of a hardware device and an address index of a queue register of the hardware device to a client, and binds the device identifier and the address index, so that an access request of the client to the hardware device can be received. As shown in fig. 1, the method specifically comprises the following steps:
and S101, allocating the device identification of the device register of the hardware device and the address index of the queue register of the hardware device to the client.
The client is a system which is operated by a user on a host machine, and the user can freely set up a server on the system to operate own programs. The client mainly obtains various hardware resources through the host machine.
Referring to fig. 2, fig. 2 is a schematic view of an application scenario of a method for allocating hardware resources according to an embodiment of the present invention, where fig. 2 includes a client 1, a client 2, and a host.
The host may be located on the cloud computing platform, and the host may provide hardware resource services for the client 1 and the client 2, respectively.
As an example, client 1 needs to store 20 Terabytes (TB) of material at the host, which can provide client 1 with 20TB of storage space as client 1 requires. As another example, client 2 requires a host to provide network capabilities to transfer large amounts of data. The host may provide the required network capabilities for the client 2 according to the requirements of the client 2.
In the embodiment of the present invention, the host may be an execution subject of each step in fig. 1. The host machine comprises a plurality of hardware devices. The registers of the hardware device are divided into device registers and queue registers according to different addressing modes. It will be appreciated that the device registers and queue registers are addressed differently.
The device register is bound to each hardware device and is accessed via the device identification and the address of the device register. As one example, the address of the device register may be preset. The queue register is bound to the queue and accessed via the queue index and the base address of the queue register. In a conventional hardware device, the number of queues to which each hardware device belongs is fixed.
In the embodiment of the present invention, the queue under each hardware device is not fixed. With the establishment/uninstallation of the client, the hardware devices can also be dynamically configured, and the number of queues to which each hardware device belongs can also be dynamically configured.
From the perspective of a client, hardware is hardware equipment, and the hardware equipment belongs to a plurality of queues. As one example, a host may dynamically configure the relationship between a hardware device and a queue. Such as: hardware device a is configured with 20 queues. Thus, the host can allocate queue resources to the client according to the 20 queues configured by the hardware device a.
The host allocates queue resources to the client, and may allocate, to the client, a device identifier of a device register of the hardware device and an address index of a queue register of the hardware device.
Specifically, the device identifier is a parameter for the client to access the hardware device, and the hardware device accessed by the client can be known according to the device identifier. For a hardware device, there may be one device register, and then the device identifier of the device register of the hardware device may be allocated to the client.
Each hardware device belongs to a plurality of queues, the queues are bound with queue registers, and the queue registers can be accessed through the address indexes of the queue registers, so that the address indexes of the queue registers of the hardware devices can be distributed to clients.
S102, binding the device identification of the allocated device register and the address index of the allocated queue register, and storing the queue index base address of the queue register and the number of the allocated queues to allocate the queue resources of the hardware device to the client.
After allocating the device identifier of the device register of the hardware device and the address index of the queue register of the hardware device to the client, the hardware device may also correspond to another queue because the hardware device and the queue do not have a fixed correspondence.
To facilitate client access to the hardware device, the device identification of the assigned device register may be bound to the address index of the assigned queue register. As one example, an address index of the assigned queue register may be stored in a particular device register.
One or more queues are allocated for the client, each queue being bound to a queue register. In the case where multiple queues are allocated for a client, the address indices of the multiple queue registers are consecutive.
The queue index base address is a base address of a first one of the address indices of the plurality of queue registers. The offset of the queue index may be known through a queue offset register in the device register. The client may access the allocated queue register of the hardware device based on the queue index base address in combination with the offset of the queue index.
Thus, the queue index base of the queue register and the number of queues may be stored. This may allocate queue resources of the hardware device to the client. The queue offset is self-configured when the client accesses the queue resource.
In one embodiment of the invention, the device identification and address index may be bound by setting a queue index base address table and a queue index offset table, and storing the queue index base address of the queue register and the number of allocated queues.
The queue index base address table records the corresponding relation between the equipment identification and the base address of the queue register. The base address of the queue register can be obtained by inquiring the queue index base address table according to the equipment identification. The queue index base of the queue register is determined by the number of clients and the number of queues assigned to each client.
The queue index base address of the queue register is the address of the queue register of the first queue assigned to the client. The addresses of queues assigned by the host to the same client must be consecutive. For example, the host has allocated 3 queues to the current client. The queue register address for the first queue is base0, the queue register address for the second queue is base0+1, and the queue register address for the third queue is base0+ 2.
The queue index offset table records the device identification versus the offset, which is determined by the number of allocated queues. It will be appreciated that the maximum offset is equal to the number of queues assigned to the client minus 1.
S103, receiving an access request of a client to the hardware device, wherein the access request comprises the device identification of the device register.
The host may send the device identification of the assigned device register to the client to assign queue resources for the hardware device. The client may send an access request to the host to access the hardware device, the access request including a device identification of a device register of the hardware device.
As one example, a host receives an access request from a client to a hardware device, the access request including a device identification of a device register. The client may access the device register based on the device flag of the device register.
It should be noted that the address of the device register is preset, and both the host and the client know the address of the device register, because there is no need to separately send the address of the device register to the client. As one example, the address of the device register is set in accordance with the PCI-Express (Peripheral Component interconnect Express) standard.
In one embodiment of the invention, a host receives an access request from a client to a hardware device, the access request including a device identification of a device register and an offset to a queue register. The client may access the queue register based on the device identification of the device register and the offset of the queue register.
In one embodiment of the invention, the host has allocated queue resources for the hardware device for the client. In the case that a hardware device needs to be migrated, such as: the host machine allocates queue resources of the hardware device a for the client machine. Due to the failure of the hardware device a, in order not to apply the normal use of queue resources by the client, the client needs to be migrated from the hardware device a to a hardware device b, and the hardware device b is called a target hardware device.
Referring to fig. 3, fig. 3 is a schematic flowchart of migrating a hardware device according to an embodiment of the present invention, which specifically includes:
s301, according to the device identification of the device register and the number of the allocated queues, the queue resources of the target hardware device are reallocated.
In an embodiment of the present invention, the hardware device to which the client is migrated is referred to as a target hardware device. The target hardware device is subordinate to a plurality of queues. Considering that migration of the hardware device affects the client as little as possible, if the client is a device identifier access host based on the device register, the queue of the target hardware device may be reallocated according to the device identifier of the device register and the number of allocated queues. In this way, the device identification of the device register in the access request does not change for the client.
S302, binding the device identification of the device register and the address index of the reallocated queue register, and storing the queue index base address of the reallocated queue register and the number of allocated queues to migrate the client to the target hardware device.
Similar to the process of assigning a hardware device to a client, the device identification of the device register needs to be bound to the address index of the reallocated queue register and the queue index base address of the reallocated queue register and the number of allocated queues are stored to migrate the client to the target hardware device.
In the embodiment of fig. 3, the client needs to be migrated from one hardware device to another, and the reassignment may be made according to the device identification of the native device register and the number of queues assigned in order to reduce the impact on the client.
In one embodiment of the invention, the allocated device registers and the allocated queue registers may be freed in the event that a guest on a hardware device has migrated to another hardware device or in the event that the guest no longer needs to use the hardware device.
Specifically, the device identification of the assigned device register is deleted from the binding relationship with the address index of the assigned queue register, and the queue index base address of the queue register and the number of assigned queues are deleted. In this way, the assigned device registers and the assigned queue registers may also be assigned to other clients.
In one embodiment of the invention, the device identification of the assigned device register may be bound to the address index of the assigned first queue register. The purpose of this is to: all queue registers may be accessed in turn based on the address index of the first queue register and the number of queues allocated.
As an example, for device identity a, the address index of the first queue register allocated is base1, binding device identity a and base 1. The number of allocated queues is 10, the address indices of the queue registers are consecutive, and the offset is equal to the number of allocated queues-1, i.e. the offset ranges from 0 to 9. The 10 queue registers can be accessed sequentially by changing the base1 and offset from small to large.
In one embodiment of the invention, the host needs to allocate queue resources of the hardware device and the client needs to access the hardware device. In order to facilitate the hardware device to identify the host and the client, different addresses need to be set for the host and the client. Among other things, hardware devices involve device registers and queue registers.
Specifically, the client accesses the device register through the first device register address, and the host accesses the device register through the second device register address; the client accesses the queue register through the first queue register address, and the host accesses the queue register through the second queue register address.
As an example, the first device register address and the second device register address belong to different device register address fields by which it can be distinguished whether a guest accesses a device register or a host accesses a device register.
Similarly, the first queue register address and the second queue register address belong to different queue register address segments by which it can be distinguished whether the queue register is accessed by a client or the queue register is accessed by a host.
In the above embodiment, first, the device identifier of the device register of the hardware device and the address index of the queue register of the hardware device are allocated to the client; then, binding the device identifier of the allocated device register and the address index of the allocated queue register, and storing the queue index base address of the queue register and the number of the allocated queues to allocate the queue resource of the hardware device to the client; finally, an access request from the client to the hardware device is received, the access request including the device identification of the device register. After the hardware equipment resources are distributed, the client can directly access the queue resources without adopting a software intermediate layer, so that the system overhead can be reduced, and the transmission efficiency is improved.
The technical solution of the present invention is exemplarily described below with reference to the specific embodiments and the accompanying drawings.
In embodiments of the present invention, the path that a guest accesses a hardware configuration register is referred to as the front-end configuration path. The path of the host machine accessing the hardware configuration registers is called the backend configuration path. The hardware configuration registers are registers for storing configuration parameters for clients to access the hardware.
Referring to fig. 4, fig. 4 is a schematic diagram of differentiating access configuration channels according to an embodiment of the present invention, which specifically includes:
s401, register access request.
The hardware device receives a register access request.
S402, the base address of the access address belongs to the front-end configuration channel.
And judging whether the front-end configuration channel belongs to or belongs to the back-end configuration channel by the base address of the access address. Since the address segment of the front-end configuration channel is different from the address segment of the back-end configuration channel, the base address of the front-end configuration channel is different from the base address of the back-end configuration channel. It is understood that the access address is a preset address.
If the base address of the access address belongs to the front-end configuration channel, executing S403; if the base address of the access address belongs to the back-end configuration channel, S404 is executed.
And S403, entering a front end configuration channel.
And if the access request is the access request of the client, entering a front-end configuration channel.
And S404, entering a rear-end configuration channel.
And if the access request is the access request of the host, entering a back-end configuration channel.
Referring to fig. 5, fig. 5 is a schematic diagram of an access configuration channel according to an embodiment of the present invention, which specifically includes:
the client can directly access the equipment register by adopting the equipment identification and the address of the equipment register through the front-end configuration channel, and access the queue register by adopting the queue index base address and the offset.
The host can directly access the device register and the queue register through the back-end configuration channel.
Referring to fig. 6, fig. 6 is a schematic flowchart of a host accessing a register according to an embodiment of the present invention, which specifically includes:
s601, judging whether to access the queue register.
Whether the host accesses the queue register can be judged, and if the host accesses the queue register, S602 is executed; if the host does not access the queue register, the device register is accessed, and S603 is executed. As an example, whether a host accesses a queue register or a device register may be determined by an address.
And S602, accessing a queue index register.
The host may access a queue index register in which a queue index is stored. And the host machine obtains the queue index from the queue index register according to the address.
And S603, accessing a device number register.
The host machine can access the device number register, and the device number, i.e. the device identifier, is stored in the device number register. The host obtains the device number from the device number register according to the address.
And S604, accessing a queue register.
The host accesses the queue register based on the address and the queue index.
And S605, accessing the device register.
The host accesses the device registers based on the address and device number.
Referring to fig. 7, fig. 7 is a schematic flowchart of a client accessing a register according to an embodiment of the present invention, which specifically includes:
s701, judging whether to access the queue register.
The client can decide by itself whether to access the queue register. If the client accesses the queue register, executing S702; if the client does not access the queue register, the device register is accessed, and S703 is performed.
As an example, a client may send an access request that includes a device number and does not include an offset, then a device register is accessed; the access request includes a device number and an offset, the queue register is accessed.
And S702, setting an offset.
The base address is stored in the queue index base address table, and the client queries the queue index base address table based on the device number to obtain the base address. And setting offset on the basis of the base address to obtain the address of the queue register.
And S703, directly accessing the device register.
The client can directly access the device register by the device number and the address of the device register.
S704, accessing a queue register.
The client can access the queue register allocated by the host through the address of the queue register.
Referring to fig. 8, fig. 8 is a schematic flowchart of a process of receiving host access by a hardware device according to an embodiment of the present invention, which specifically includes:
and S801, a back-end access request.
The hardware device receives an access request of a host machine, namely a back-end access request.
S802, judging whether to access the equipment register.
And judging whether to access the equipment register according to the access address. If the host machine accesses the device register, executing S803; if the host does not access the device register, the queue register is accessed, then S804 is executed.
S803, the device number is taken out from the back-end access device number register.
The relationship between the device number and the address is recorded in the back-end access device number register, and the device number can be taken out from the back-end access device number register based on the address.
S804, the queue index is taken out from the back-end access queue index register.
The back-end access queue index register records the relation between the queue index and the address, and the queue index can be taken out from the back-end access queue index register based on the address.
And S805, accessing a device register.
The host accesses the device register according to the address and the device number.
And S806, accessing a queue register.
The host machine processes the queue register according to the address and the queue index.
Referring to fig. 9, fig. 9 is a schematic flowchart of a hardware device receiving a client access according to an embodiment of the present invention, which specifically includes:
and S901, a client accesses the request.
The client sends an access request and the address of the device register is preset.
S902, judging whether to access the device register.
Judging whether the equipment register is accessed according to the address of the equipment register, and if the equipment register is accessed, executing S903; if the device register is not accessed, and the address of the device register is not included in the access request, S904 is executed.
And S903, accessing the equipment register.
The client accesses the device register based on the device number and the address of the device register.
And S904, accessing the queue index base address table.
And acquiring a queue index base address in a queue index base address table according to the equipment number.
S905, accessing a queue index offset table.
And acquiring an offset in the queue index offset table according to the equipment number.
And S906, obtaining a queue index.
And combining the queue index base address and the offset to obtain the address of the queue register.
And S907, accessing a queue register.
The queue register is accessed according to its address.
Referring to fig. 10, fig. 10 is a schematic diagram of a main structure of an apparatus for allocating hardware resources according to an embodiment of the present invention, where the apparatus for allocating hardware resources may implement a method for allocating hardware resources, and as shown in fig. 10, the apparatus for allocating hardware resources specifically includes:
an allocating module 1001 configured to allocate, to the client, the device identifier of the device register of the hardware device and the address index of the queue register of the hardware device.
A binding module 1002 for binding the device identification of the allocated device register with the address index of the allocated queue register, and storing the queue index base address of the queue register and the number of allocated queues to allocate queue resources of the hardware device to the client.
The accessing module 1003 is configured to receive an access request from a client to a hardware device, where the access request includes a device identifier of a device register.
In an embodiment of the present invention, the binding module 1002 is further configured to reallocate queue resources of the target hardware device according to the device identifier of the device register and the number of allocated queues;
the device identification of the bound device register is indexed with the address of the reallocated queue register and the queue index base address of the reallocated queue register and the number of allocated queues are stored to migrate the client to the target hardware device.
In an embodiment of the present invention, the binding module 1002 is further configured to delete the binding relationship between the device identifier of the allocated device register and the address index of the allocated queue register, and delete the queue index base address of the queue register and the number of allocated queues to release the allocated device register and the allocated queue register.
In one embodiment of the invention, the binding module 1002, in particular for setting a queue index base address table and a queue index offset table,
a queue index base address table records a correspondence of device identification to a queue register base address, the queue index base address of the queue register being determined by the number of clients and the number of the allocated queues,
the queue index offset table records the device identification versus the offset, which is determined by the number of allocated queues.
In one embodiment of the invention, the access request further includes an offset to the queue register, the offset being determined by the number of queues allocated.
In an embodiment of the present invention, the binding module 1002 is specifically configured to bind the device identifier of the allocated device register with the address index of the allocated first queue register.
In one embodiment of the invention, the device register is mapped to a first device register address and a second device register address, the queue register is mapped to a first queue register address and a second queue register address,
the client accesses the device register via the first device register address, the host accesses the device register via the second device register address,
the client accesses the queue register through the first queue register address, and the host accesses the queue register through the second queue register address.
Fig. 11 illustrates an exemplary system architecture 1100 of a method of allocating hardware resources or an apparatus for allocating hardware resources to which embodiments of the present invention may be applied.
As shown in fig. 11, the system architecture 1100 may include terminal devices 1101, 1102, 1103, a network 1104, and a server 1105. The network 1104 is a medium to provide communication links between the terminal devices 1101, 1102, 1103 and the server 1105. Network 1104 may include various connection types, such as wired, wireless communication links, or fiber optic cables, to name a few.
A user may use terminal devices 1101, 1102, 1103 to interact with a server 1105 over a network 1104 to receive or send messages or the like. Various messaging client applications, such as shopping applications, web browser applications, search applications, instant messaging tools, mailbox clients, social platform software, etc. (examples only) may be installed on the terminal devices 1101, 1102, 1103.
The terminal devices 1101, 1102, 1103 may be various electronic devices having a display screen and supporting web browsing, including but not limited to smart phones, tablet computers, laptop portable computers, desktop computers, and the like.
The server 1105 may be a server that provides various services, such as a backend management server (for example only) that provides support for shopping-like websites browsed by users using the terminal devices 1101, 1102, 1103. The backend management server may analyze and perform other processing on the received data such as the product information query request, and feed back a processing result (for example, target push information, product information — just an example) to the terminal device.
It should be noted that the method for allocating hardware resources provided in the embodiment of the present invention is generally executed by the server 1105, and accordingly, the apparatus for allocating hardware resources is generally disposed in the server 1105.
It should be understood that the number of terminal devices, networks, and servers in fig. 11 is merely illustrative. There may be any number of terminal devices, networks, and servers, as desired for implementation.
Referring now to FIG. 12, shown is a block diagram of a computer system 1200 suitable for use with a terminal device implementing an embodiment of the present invention. The terminal device shown in fig. 12 is only an example, and should not bring any limitation to the functions and the scope of use of the embodiment of the present invention.
As shown in fig. 12, the computer system 1200 includes a Central Processing Unit (CPU)1201, which can perform various appropriate actions and processes in accordance with a program stored in a Read Only Memory (ROM)1202 or a program loaded from a storage section 1208 into a Random Access Memory (RAM) 1203. In the RAM 1203, various programs and data necessary for the operation of the system 1200 are also stored. The CPU 1201, ROM 1202, and RAM 1203 are connected to each other by a bus 1204. An input/output (I/O) interface 1205 is also connected to bus 1204.
The following components are connected to the I/O interface 1205: an input section 1206 including a keyboard, a mouse, and the like; an output portion 1207 including a display device such as a Cathode Ray Tube (CRT), a Liquid Crystal Display (LCD), and the like, and a speaker; a storage section 1208 including a hard disk and the like; and a communication section 1209 including a network interface card such as a LAN card, a modem, or the like. The communication section 1209 performs communication processing via a network such as the internet. A driver 1210 is also connected to the I/O interface 1205 as needed. A removable medium 1211, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, or the like, is mounted on the drive 1210 as necessary, so that a computer program read out therefrom is mounted into the storage section 1208 as necessary.
In particular, according to the embodiments of the present disclosure, the processes described above with reference to the flowcharts may be implemented as computer software programs. For example, embodiments of the present disclosure include a computer program product comprising a computer program embodied on a computer readable medium, the computer program comprising program code for performing the method illustrated in the flow chart. In such an embodiment, the computer program may be downloaded and installed from a network through the communication section 1209, and/or installed from the removable medium 1211. The computer program performs the above-described functions defined in the system of the present invention when executed by the Central Processing Unit (CPU) 1201.
It should be noted that the computer readable medium shown in the present invention can be a computer readable signal medium or a computer readable storage medium or any combination of the two. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples of the computer readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the present invention, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. In the present invention, however, a computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wire, fiber optic cable, RF, etc., or any suitable combination of the foregoing.
The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams or flowchart illustration, and combinations of blocks in the block diagrams or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The modules described in the embodiments of the present invention may be implemented by software or hardware. The described modules may also be provided in a processor, which may be described as: a processor includes a transmitting unit, an obtaining unit, a determining unit, and a first processing unit. The names of these units do not in some cases constitute a limitation to the unit itself, and for example, the sending unit may also be described as a "unit sending a picture acquisition request to a connected server".
As another aspect, the present invention also provides a computer-readable medium that may be contained in the apparatus described in the above embodiments; or may be separate and not incorporated into the device. The computer readable medium carries one or more programs which, when executed by a device, cause the device to comprise:
allocating a device identifier of a device register of a hardware device and an address index of a queue register of the hardware device to a client;
binding the device identification of the assigned device register with the address index of the assigned queue register and storing the queue index base address of the queue register and the number of assigned queues to assign queue resources of the hardware device to the client;
receiving an access request of the client to the hardware device, the access request including a device identification of a device register.
According to the technical scheme of the embodiment of the invention, firstly, the device identification of a device register of the hardware device and the address index of a queue register of the hardware device are distributed to a client; then, binding the device identifier of the allocated device register and the address index of the allocated queue register, and storing the queue index base address of the queue register and the number of the allocated queues to allocate the queue resource of the hardware device to the client; finally, an access request from the client to the hardware device is received, the access request including the device identification of the device register. In the process of allocating the hardware equipment resources, the queue resources of the hardware equipment can be allocated to the client without adopting a software middle layer, so that the system overhead can be reduced, and the transmission efficiency can be improved.
The above-described embodiments should not be construed as limiting the scope of the invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions can occur, depending on design requirements and other factors. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A method for allocating hardware resources, comprising:
allocating a device identifier of a device register of a hardware device and an address index of a queue register of the hardware device to a client;
binding the device identification of the assigned device register with the address index of the assigned queue register and storing the queue index base address of the queue register and the number of assigned queues to assign queue resources of the hardware device to the client;
receiving an access request of the client to the hardware device, the access request including a device identification of a device register.
2. The method of allocating hardware resources of claim 1, wherein after binding the device identification of the allocated device register with the address index of the allocated queue register and storing the queue index base address of the queue register and the number of allocated queues, further comprising:
reallocating queue resources of the target hardware equipment according to the equipment identifier of the equipment register and the number of the allocated queues;
the device identification of the device register is bound to the address index of the reallocated queue register, and the queue index base address of the reallocated queue register and the number of allocated queues are stored to migrate the client to the target hardware device.
3. The method of allocating hardware resources of claim 1, wherein after binding the device identification of the allocated device register with the address index of the allocated queue register and storing the queue index base address of the queue register and the number of allocated queues, further comprising:
deleting the binding relationship of the device identification of the allocated device register and the address index of the allocated queue register, and deleting the queue index base address of the queue register and the number of allocated queues to release the allocated device register and the allocated queue register.
4. The method of allocating hardware resources of claim 1, wherein said binding the device identification of the allocated device register with the address index of the allocated queue register and storing the queue index base address of the queue register and the number of allocated queues comprises:
setting a queue index base address table and a queue index offset table,
the queue index base address table records the corresponding relation between the device identification and the base address of the queue register, the queue index base address of the queue register is determined by the number of clients and the number of the distributed queues,
the queue index offset table records the relationship of the device identification and the offset, which is determined by the number of allocated queues.
5. The method of allocating hardware resources of claim 1, wherein said access request further comprises an offset to said queue register, a maximum value of said offset being determined by a number of allocated queues.
6. The method of allocating hardware resources of claim 1, wherein said binding the device identification of the allocated device register with the address index of the allocated queue register comprises:
the device identification of the assigned device register is bound to the address index of the assigned first queue register.
7. The method of allocating hardware resources of claim 1, wherein said device registers are mapped to a first device register address and a second device register address, said queue registers are mapped to a first queue register address and a second queue register address,
the guest accesses the device register via a first device register address, the host accesses the device register via a second device register address,
the client accesses the queue register through a first queue register address, and the host accesses the queue register through a second queue register address.
8. An apparatus for allocating hardware resources, comprising:
the allocation module is used for allocating the equipment identifier of the equipment register of the hardware equipment and the address index of the queue register of the hardware equipment to the client;
a binding module for binding the device identifier of the allocated device register with the address index of the allocated queue register, and storing the queue index base address of the queue register and the number of allocated queues to allocate queue resources of the hardware device to the client;
and the access module is used for receiving an access request of the client to the hardware equipment, wherein the access request comprises the equipment identification of the equipment register.
9. An electronic device that allocates hardware resources, comprising:
one or more processors;
a storage device for storing one or more programs,
when executed by the one or more processors, cause the one or more processors to implement the method of any one of claims 1-7.
10. A computer-readable medium, on which a computer program is stored, which, when being executed by a processor, carries out the method according to any one of claims 1-7.
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