CN111769838A - Circuit for detecting multiple signals by using single IO port and electronic product - Google Patents
Circuit for detecting multiple signals by using single IO port and electronic product Download PDFInfo
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- CN111769838A CN111769838A CN201910258867.XA CN201910258867A CN111769838A CN 111769838 A CN111769838 A CN 111769838A CN 201910258867 A CN201910258867 A CN 201910258867A CN 111769838 A CN111769838 A CN 111769838A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M11/00—Coding in connection with keyboards or like devices, i.e. coding of the position of operated keys
- H03M11/22—Static coding
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Abstract
The invention provides a circuit and an electronic product for detecting a plurality of signals by using a single IO port, comprising: the signal input circuit comprises a plurality of signal trigger devices and a plurality of resistors, and conductive loops with different loop resistance values are formed under the combination of different opening and closing states of the plurality of signal trigger devices; and the chip comprises an IO port with an analog-digital conversion function and is connected with potential acquisition points in the signal input circuit, and the potential values of the potential acquisition points are different under different loop resistance values. The invention realizes the function of simultaneously detecting a plurality of signals by single IO by using the IO port with the ADC function, thereby saving the resources of the IO port of the chip.
Description
Technical Field
The present invention relates to the field of electronic circuit technology, and in particular, to a circuit and an electronic product for detecting multiple signals by using a single IO port.
Background
With the rapid development of electronic devices, more and more signals need to be detected by the chip. Taking a key signal or a state control signal as an example, when detecting a plurality of key signals or state control signals in a conventional detection scheme, a chip needs to have enough IO ports to be respectively connected with a key or a state control switch. Under the condition that the IO port resources of the chip are in shortage, the scheme cannot meet the requirement.
The invention patent with publication number CN104065384A discloses a method for realizing key detection circuit, which realizes 2 through n IO ports n1 switching function, and when n is 1, only 1 switching function can be realized. How to realize the function of detecting a plurality of signals by using a single IO port is a technical problem which is not solved at present.
Disclosure of Invention
In view of the defects in the prior art, an object of the present invention is to provide a circuit and an electronic product for detecting multiple signals by using a single IO port.
According to the invention, the circuit for detecting a plurality of signals by using a single IO port comprises:
the signal input circuit 1 comprises a plurality of signal trigger devices and a plurality of resistors, and forms conductive loops with different loop resistance values under the combination of different opening and closing states of the plurality of signal trigger devices;
and the chip 2 comprises an IO port with an analog-digital conversion function and is connected with potential acquisition points in the signal input circuit 1, and the potential values of the potential acquisition points are different under different loop resistance values.
Preferably, the signal input circuit 1 includes a key signal circuit 11 and/or a switch signal circuit 12;
the signal trigger device of the key signal circuit 11 comprises a key, and the key comprises two open-close states of closing and opening;
the signal triggering device of the switch signal circuit 12 comprises a switch including a stationary contact and a plurality of movable contacts.
Preferably, the key signal circuit 11 includes a plurality of keys and a plurality of key signal resistors, and the key signal resistors include two connection structures of series connection and parallel connection:
when the plurality of key signal resistors are connected in series, each key is respectively connected with different key signal resistors in parallel or connected with different numbers of key signal resistors in parallel;
when the plurality of key signal resistors are connected in parallel, each key is respectively connected in series in different parallel branches.
Preferably, the switch signal circuit 12 includes a plurality of switches and a plurality of status signal resistors, and the switches include two connection structures of series connection and parallel connection:
when a plurality of switches are connected in series, the static contact of each switch is electrically connected with all the movable contacts of the other switch;
when a plurality of switches are connected in parallel, the static contact of each switch is electrically connected with the static contact or the movable contact of another switch;
wherein, each state signal resistance is respectively connected in series on different movable contacts.
Preferably, the key signal circuit 11 and the switch signal circuit 12 are connected in series, and the potential collecting point is located between the key signal circuit 11 and the switch signal circuit 12.
Preferably, the key signal circuit 11 and the switch signal circuit 12 are connected in parallel, and the potential collecting point is located at the input end or the output end of the key signal circuit 11 and the switch signal circuit 12.
Preferably, under the combination of different opening and closing states, the proportion of loop resistance values on two sides of the potential acquisition point is different.
Preferably, the difference value between different potential values of the potential acquisition points is greater than or equal to the analog-to-digital conversion resolution of the chip 2.
Preferably, the chip further comprises a power supply 3, and the power supply 3 is electrically connected to the signal input circuit 1 and the chip 2, respectively.
The invention also provides an electronic product which comprises the circuit for detecting a plurality of signals by using the single IO port.
Compared with the prior art, the invention has the following beneficial effects:
1. the invention utilizes a plurality of signal trigger devices and a plurality of resistors to form the conductive loops with different loop resistance values under the combination of different opening and closing states of the plurality of signal trigger devices, thereby obtaining corresponding different potentials through single IO detection, realizing the detection of a plurality of signals and saving the resources of the IO ports of the chip;
2. the structure of the signal input circuit is diversified, technicians can design and select the signal input circuit according to actual conditions, and the number of the monitored signals has no upper limit theoretically;
3. a plurality of different types of signal trigger devices can be adopted, so that different functions corresponding to different signal trigger devices can be visually distinguished.
Drawings
Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments with reference to the following drawings:
FIG. 1 is a schematic view of the overall structure of the present invention;
FIG. 2 is a circuit diagram of the first embodiment;
FIG. 3 is a circuit diagram of a second embodiment;
FIG. 4 is a circuit diagram of a third embodiment;
FIG. 5 is a circuit diagram of a fourth embodiment;
FIG. 6 is a circuit diagram of a fifth embodiment;
FIG. 7 is a circuit diagram of a sixth embodiment;
fig. 8 is a circuit diagram of the seventh embodiment.
Detailed Description
The present invention will be described in detail with reference to specific examples. The following examples will assist those skilled in the art in further understanding the invention, but are not intended to limit the invention in any way. It should be noted that it would be obvious to those skilled in the art that various changes and modifications can be made without departing from the spirit of the invention. All falling within the scope of the present invention.
As shown in fig. 1, the present invention provides a circuit for detecting multiple signals by using a single IO port and an electronic product using the same, including: signal input circuit 1, chip 2 and power supply 3. The power supply 3 is electrically connected with the signal input circuit 1 and the chip 2 respectively and provides voltage required by operation for the two.
The signal input circuit 1 includes a plurality of signal trigger devices and a plurality of resistors, and forms conductive loops having different loop resistance values in a combination of different open/close states of the plurality of signal trigger devices. The chip 2 comprises an IO port with an analog-digital conversion function, potential collection points in the signal input circuit 1 are connected, and potential values of the potential collection points are different under different loop resistance values, so that corresponding signals can be identified according to detected different potential values, and the purpose of saving the IO port by monitoring a plurality of signals through a single IO port is achieved.
On the basis, after function setting is carried out on each signal, the chip 2 can execute the function corresponding to the signal according to the identification result. The chip 2 may employ, for example: N76E003, stm8l151, etc., which are not intended to limit the scope of the present invention.
In the present invention, the signal input circuit 1 can be implemented by a key signal circuit, a switch signal circuit, or a combination of both. The signal trigger device of the key signal circuit comprises keys (such as a light touch key, a self-locking key and the like), and the keys comprise two open-close states of closing and opening; the signal trigger device of the switch signal circuit comprises a switch (such as a single-pole multi-throw switch, a dial switch and the like), and the switch comprises a fixed contact and a plurality of movable contacts and can realize a plurality of opening and closing states.
Specifically, the key signal circuit includes a plurality of keys and a plurality of key signal resistance, and key signal resistance is including two kinds of connection structure of series connection and parallel connection: when a plurality of key signal resistors are connected in series, each key is respectively connected with different key signal resistors in parallel or connected with different numbers of key signal resistors in parallel; when a plurality of key signal resistors are connected in parallel, each key is respectively connected in series in different parallel branches.
The switch signal circuit comprises a plurality of switches and a plurality of state signal resistors, and the switches comprise two connection structures of series connection and parallel connection: when a plurality of switches are connected in series, the static contact of each switch is electrically connected with all the movable contacts of the other switch; when a plurality of switches are connected in parallel, the static contact of each switch is electrically connected with the static contact or the movable contact of another switch; wherein, each state signal resistance is respectively connected in series with different moving contacts.
Several examples are provided below for specific illustration:
the first embodiment is as follows:
as shown in fig. 2, the signal input circuit 1 includes a key signal circuit 11 in a configuration of serially connecting key signal resistors, and a switch signal circuit 12 in a configuration of serially connecting switches.
The key signal circuit 11 includes key signal resistors R1, R2, and R3 connected in series in sequence, a key B1 connected in parallel with the resistor R1, and a key B2 connected in parallel with the resistor R1 and the resistor R2. When the button B1 is pressed, the resistor R1 is short-circuited; when the key B2 is pressed, the resistors R1 and R2 are simultaneously short-circuited, which causes a change in the loop resistance value of the key signal circuit 11.
The switch signal circuit 12 includes a switch SW1, a switch SW2, resistors R4 and R5 respectively disposed on two moving contacts of the switch SW1, and a resistor R6 disposed on one moving contact of the switch SW 2. Switches SW1 and SW2 toggle at terminals 0 and 1 to form 4 loop resistance changes for switch signal circuit 12.
The potential acquisition point X is arranged between the key signal circuit 11 and the switch signal circuit 12, the change of the resistance values at two ends of the potential acquisition point X can cause the potential change of the potential acquisition point X, the chip 2 can distinguish different signals by detecting the potential, and then different commands can be executed.
In fig. 1, keys B1, B2 are used as key signal inputs, and switches SW1, SW2 are used as state control inputs. The resistance value of the resistor is as follows: r1 ═ 4K Ω; r2 ═ 4K Ω; r3 ═ 1K Ω; r4 ═ 4K Ω; r5 ═ 2K Ω; r6 ═ 4K Ω; the power supply voltage is 3.3V; the resistance and potential conditions in different states are shown in table 1:
TABLE 1 resistance and potential in different states
When the key is not pressed down and all switches are toggled to the 0 terminal, the resistance of the key signal circuit 11 is: 9K omega. The resistance of the switching signal circuit 12 is: 8K omega. The potential at point X is 3.3 × 8/(9+8) 1.553V.
When SW1 toggles from terminal 0 to terminal 1, the resistance of switch signal circuit 12 changes from 8K Ω to 6K Ω. The resistance of the key signal circuit 11 is not changed, and the potential at the point X is changed to U1 being 3.3 × 6/(9+6) being 1.320V.
When the key 1 is pressed while keeping the U1 state, the resistance of the key signal circuit 11 changes from 9K Ω to 5K Ω. The resistance of the switching signal circuit 12 is unchanged. The potential at point X becomes U2 equal to 3.3 × 6/(5+6) equal to 1.8V.
The number N of potentials to be resolved by the ADC in total is the number of status signals x (number of key signals + 1): n ═ 2+1 × 4 ═ 12; similarly the remaining 9 potential values can be calculated as shown in table 2. The difference between all the potentials must be greater than the resolution of the chip ADC to ensure that the circuit can operate properly.
For this purpose, the difference is calculated by sorting all potentials in descending order of magnitude:
TABLE 2 all potentials are sorted in descending order of magnitude and their differences
It can be seen that the potential difference value of 72mV is much higher than the resolution of 8-bit ADC (here, 8-bit ADC resolution is taken as an example, and the ADC principle is the same for other resolutions). To ensure that potential changes can be distinguished, attention is required to select the resistance value: the difference value of the resistance values of the change of the internal signals of the key signal circuit and the switch signal circuit and the magnitude order of the overall resistance value of the circuit cannot be overlarge. In addition, the resistance value proportion of the circuits on two sides of the potential acquisition point X in different signal input states cannot be the same, otherwise, the calculated potential values are similar.
Example two:
as shown in fig. 3, in the first embodiment, the switching signal circuit 12 is changed to a structure using parallel switches. Switch SW11 is connected to the stationary contact of switch SW21 and the movable contact is also connected. The resistors R41, R51, R61 and R71 are respectively connected to the four moving contacts.
Alternatively, the stationary contact of switch SW11 is connected to the movable contact of switch SW21 and the movable contact of switch SW11 is connected to the stationary contact of switch SW21 (not shown).
Example three:
as shown in fig. 4, in the first embodiment, the key signal circuit 11 is changed to a structure in which key signal resistors are connected in parallel. The key signal resistors R12, R92 and R82 are connected in parallel, the key B12 is connected with the key signal resistor R92 in series, and the key B22 is connected with the key signal resistor R82 in series.
Example four:
as shown in fig. 5, in addition to embodiment 1, the key signal circuit 11 is configured to have the key signal resistors connected in parallel, and the switch signal circuit 12 is configured to have the parallel switches.
The key signal resistors R13, R93 and R83 are connected in parallel, the key B13 is connected with the key signal resistor R93 in series, and the key B23 is connected with the key signal resistor R83 in series. Switch SW13 is connected to the stationary contact of switch SW23 and the movable contact is also connected. The resistors R43, R53, R63 and R73 are respectively connected to the four moving contacts.
Alternatively, the stationary contact of switch SW13 is connected to the movable contact of switch SW23 and the movable contact of switch SW13 is connected to the stationary contact of switch SW23 (not shown).
Example five:
as shown in fig. 6, the first to fourth embodiments are all configured such that the key signal circuit 11 and the switch signal circuit 12 are connected in series, and the present embodiment connects the key signal circuit 11 and the switch signal circuit 12 in parallel. The potential collection point X is located at the voltage input end of the key signal circuit 11 and the switch signal circuit 12, and the input voltage VBAT and the potential collection point X need to be connected in series with a resistor R14, so as to avoid that the potential value collected by the potential collection point X is equal to the input voltage VBAT.
Example six:
as shown in fig. 7, in the first to fifth embodiments, the signal input circuit 1 adopts a combination of the key signal circuit 11 and the switch signal circuit 12, and in this embodiment, the signal input circuit 1 only adopts the key signal circuit 11, the key signal circuit 11 may be a key signal resistor series structure or a key signal resistor parallel structure, the potential collection point X is located at a voltage input end (which may also be an output end and a rear end of which needs to be connected in series with a resistor), and the input voltage VBAT and the potential collection point X need to be connected in series with a resistor R15, so as to avoid that a potential value collected by the potential collection point X is equal to the input voltage VBAT.
Example seven:
as shown in fig. 8, in the first to fifth embodiments, the signal input circuit 1 adopts a combination of the key signal circuit 11 and the switch signal circuit 12, and in this embodiment, the signal input circuit 1 only adopts the switch signal circuit 12, the switch signal circuit 12 may be in a switch series structure or a switch parallel structure, the potential collection point X is located at the voltage input end (which may also be an output end and a resistor needs to be connected in series at the rear end) of the switch signal circuit 12, and the input voltage VBAT and the potential collection point X need to be connected in series with a resistor R16, so as to avoid that the potential value collected by the potential collection point X is equal to the input voltage VBAT.
The foregoing description of specific embodiments of the present invention has been presented. It is to be understood that the present invention is not limited to the specific embodiments described above, and that various changes or modifications may be made by one skilled in the art within the scope of the appended claims without departing from the spirit of the invention. The embodiments and features of the embodiments of the present application may be combined with each other arbitrarily without conflict.
Claims (10)
1. A circuit for detecting multiple signals using a single IO port, comprising:
the signal input circuit comprises a plurality of signal trigger devices and a plurality of resistors, and conductive loops with different loop resistance values are formed under the combination of different opening and closing states of the plurality of signal trigger devices;
and the chip comprises an IO port with an analog-digital conversion function and is connected with potential acquisition points in the signal input circuit, and the potential values of the potential acquisition points are different under different loop resistance values.
2. The circuit for detecting multiple signals by using a single IO port according to claim 1, wherein the signal input circuit includes a key signal circuit and/or a switch signal circuit;
the signal trigger device of the key signal circuit comprises a key, and the key comprises a closing state and an opening state;
the signal triggering device of the switch signal circuit includes a switch including a stationary contact and a plurality of movable contacts.
3. The circuit for detecting multiple signals by using a single IO port of claim 2, wherein the key signal circuit comprises multiple keys and multiple key signal resistors, and the key signal resistors comprise two connection structures of series connection and parallel connection:
when the plurality of key signal resistors are connected in series, each key is respectively connected with different key signal resistors in parallel or connected with different numbers of key signal resistors in parallel;
when the plurality of key signal resistors are connected in parallel, each key is respectively connected in series in different parallel branches.
4. The circuit for detecting multiple signals using a single IO port of claim 2, wherein the switch signal circuit comprises multiple switches and multiple status signal resistors, and the switches comprise two connection structures of series connection and parallel connection:
when a plurality of switches are connected in series, the static contact of each switch is electrically connected with all the movable contacts of the other switch;
when a plurality of switches are connected in parallel, the static contact of each switch is electrically connected with the static contact or the movable contact of another switch;
wherein, each state signal resistance is respectively connected in series on different movable contacts.
5. The circuit for detecting multiple signals by using a single IO port of claim 2, wherein the key signal circuit and the switch signal circuit are connected in series, and the potential collecting point is located between the key signal circuit and the switch signal circuit.
6. The circuit for detecting multiple signals by using a single IO port of claim 2, wherein the key signal circuit and the switch signal circuit are connected in parallel, and the potential collecting point is located at an input end or an output end of the key signal circuit and the switch signal circuit.
7. The circuit of claim 1, wherein the ratio of the loop resistance values at two sides of the potential collection point is different in different combinations of open/close states.
8. The circuit for detecting multiple signals by using a single IO port as claimed in claim 1, wherein the difference between different potential values of the potential collection points is greater than or equal to the analog-to-digital conversion resolution of the chip.
9. The circuit for detecting multiple signals using a single IO port of claim 1, further comprising power supplies electrically connected to the signal input circuit and the chip, respectively.
10. An electronic product, characterized in that it comprises a circuit for detecting multiple signals with a single IO port according to any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910258867.XA CN111769838A (en) | 2019-04-01 | 2019-04-01 | Circuit for detecting multiple signals by using single IO port and electronic product |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201910258867.XA CN111769838A (en) | 2019-04-01 | 2019-04-01 | Circuit for detecting multiple signals by using single IO port and electronic product |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1127118A (en) * | 1997-07-07 | 1999-01-29 | Fujitsu Kiden Ltd | Multiple depression coping circuit for push switch |
| CN101359034A (en) * | 2007-07-31 | 2009-02-04 | 华矽半导体股份有限公司 | Keyboard detection circuit and method thereof |
| CN101795139A (en) * | 2010-01-27 | 2010-08-04 | 中山市嘉科电子有限公司 | Method and circuit for detecting press key |
| CN203608276U (en) * | 2013-11-22 | 2014-05-21 | 乐视致新电子科技（天津）有限公司 | ADC port simulated multi-IO port key input device and television system |
| CN209562536U (en) * | 2019-04-01 | 2019-10-29 | 上海葡萄纬度科技有限公司 | The circuit and electronic product of multiple signals are detected using single I/O port |
-
2019
- 2019-04-01 CN CN201910258867.XA patent/CN111769838A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1127118A (en) * | 1997-07-07 | 1999-01-29 | Fujitsu Kiden Ltd | Multiple depression coping circuit for push switch |
| CN101359034A (en) * | 2007-07-31 | 2009-02-04 | 华矽半导体股份有限公司 | Keyboard detection circuit and method thereof |
| CN101795139A (en) * | 2010-01-27 | 2010-08-04 | 中山市嘉科电子有限公司 | Method and circuit for detecting press key |
| CN203608276U (en) * | 2013-11-22 | 2014-05-21 | 乐视致新电子科技（天津）有限公司 | ADC port simulated multi-IO port key input device and television system |
| CN209562536U (en) * | 2019-04-01 | 2019-10-29 | 上海葡萄纬度科技有限公司 | The circuit and electronic product of multiple signals are detected using single I/O port |
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