CN111756664A - Short reference carrier index differential chaotic shift keying modulation and demodulation method and system - Google Patents
Short reference carrier index differential chaotic shift keying modulation and demodulation method and system Download PDFInfo
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Abstract
The invention discloses a short reference carrier index differential chaos shift keying modulation and demodulation method and a system. Compared with the existing method under the carrier index differential chaotic shift keying system, the method reduces the noise received by the system on the basis of improving the transmission rate of the system frequency band.
Description
Technical Field
The invention relates to a chaotic communication technology, in particular to a method for reducing noise in a received signal of a CI-DCSK system based on a short reference signal.
Background
The chaotic signal has special properties such as initial condition sensitivity, non-periodicity, special self (mutual) correlation and the like, information transmitted by taking the chaotic signal as a carrier is more difficult to be intercepted by an eavesdropper, and the communication safety is improved, so that the chaotic signal has attracted wide attention in the field of information safety and communication in recent years.
With the development of chaotic application, a chaotic digital modulation technology using a non-periodic broadband chaotic signal as a carrier wave comes into play. Chaotic digital modulation has similar advantages to other spread spectrum modulation schemes, including interference resistance, reduction of the effects of fading, and the like. In 1996, kolomb' n et al proposed a Differential Chaos Shift Keying (DCSK) technique, and this incoherent Chaos digital modulation technique adopts a Transmitted-Reference (T-R) method to transmit both a Reference signal and a signal carrying information to a receiving end. The method solves the problem of decision threshold drift in the chaos shift keying, but the transmission method takes half of bit time to transmit the reference signal without data signals, so that the transmission rate and the energy efficiency of the system are lower.
A Short Reference Differential Chaos ShiftKeying (SR-DCSK) modulation and demodulation method shortens the length of a Reference signal and keeps the length of an information signal unchanged on the basis of the existing DCSK, and then carries out moving average processing on the received information signal. Although the SR-DCSK reduces the bit energy required for sending and the noise of the received signal, and the transmission rate and the bit error rate are improved to a certain extent compared with the DCSK, the problem that the transmission rate and the energy efficiency are low cannot be fundamentally solved.
In order to solve the above problems, a Carrier-Index differential chaos Shift Keying (CI-DCSK) modulation and demodulation method simultaneously transmits a reference signal and an information signal using a plurality of subcarriers, and distinguishes the reference signal and the information signal by different subcarriers. One subcarrier is selected among all subcarriers to be allocated to the reference signal, and 1 subcarrier is selected from the remaining subcarriers for transmitting the information signal according to the data bit stream. Although the CI-DCSK eliminates a delay unit in the transceiver, and the transmission rate and the bit error rate are improved to a certain extent compared with the DCSK, the CI-DCSK still has the following defects: firstly, the transmission rate and the frequency spectrum utilization rate of the CI-DCSK are still relatively low, and the requirements of modern communication cannot be met; and secondly, the improvement of the error code performance is influenced by lower energy efficiency.
Disclosure of Invention
The purpose of the invention is as follows: in order to overcome the defects in the prior art, the invention provides a modulation and demodulation method and a modulation and demodulation system for short reference carrier index differential chaos shift keying, wherein the method is based on the following contents: 1. the system adopts a mode of combining CI-DCSK and short reference signals; 2. introducing a repetitive signal on the basis of a short reference; 3. chaotic mapping is a logistic mapping; the invention reduces the noise in the received signal of the CI-DCSK system on the basis of improving the bit transmission rate of the system.
The technical scheme is as follows: in order to achieve the purpose, the invention adopts the technical scheme that:
a short reference carrier index differential chaotic shift keying modulation method comprises the following steps:
And 2, copying the discrete chaotic signal sequence in the step 1 for S times to generate a sequence with the length of beta as an information signal of the DCSK in the current symbol period, wherein S is beta/R.
And 3, copying the discrete chaotic signal sequence in the step 1 by a to generate a new sequence with the length of a R as a reference signal of the DCSK in the current symbol period, so that a R < beta.
And 4, step 4: dividing the frequency band required for signal transmission into 2p+1 sub-carrier band with center frequency f0Is a reference carrier for transmitting a chaotic reference signal, and 2 remainspOne carrier waveIs a data carrier and is from 1 to 2pIndex marking is performed.
And 5: converting P +1 serial data bits to be transmitted in the current symbol period into index bits with the length of P and modulation bits with the length of 1 through serial-parallel change.
And 6, converting the modulation bit of the data bit generated in the step 5 into a bipolar bit through polarity conversion.
Step 7, generating 2 by performing index mapping according to the index bit of the data bit generated in step 5 and the bipolar bit of the data bit generated in step 6pIndividual information subcarrier modulationAnd (5) coefficient making.
Step 10: and multiplying the reference carrier generated in the step 4 by the DCSK reference signal generated in the step 3 to generate a DCSK reference signal subjected to carrier modulation.
Step 11, the DCSK reference signal which is generated in the step 10 and is subjected to carrier modulation and the DCSK reference signal which is generated in the step 9 and is 2pThe carrier modulated information signals are added and transmitted through an antenna.
A short reference carrier index differential chaos shift keying modulation system comprises a chaos generator, a pulse shaping filter, 2 duplicators, a serial-parallel converter, a polarity converter, an index mapper and 2pA modulation multiplier, 2p+1 carrier multipliers and carrier adders, wherein:
the chaotic generator is used for generating a discrete chaotic signal sequence.
The pulse shaping filter is used for carrying out pulse in-line filtering on the discrete chaotic signal sequence.
The 2 duplicators are respectively a first duplicator and a second duplicator, and the first duplicator is used for generating a DCSK reference signal x in the current symbol period by the line filtering signalv(t) a second duplicator for generating the line-filtered signal into a DCSK information signal y in the current symbol periodv(t)。
The serial-to-parallel converter is used for converting serial data bits to be transmitted in the current symbol period into parallel index bits.
The polarity converter is used for changing the modulation bit into a polarity modulation bit.
The index mapper is used for performing index mapping on the index bit and the bipolar bit to generate 2pPersonal information sub-carrierWave modulation factor
2 is describedpA modulation multiplier for multiplying the DCSK signal xv(t) are each independently 2pModulation factor of information subcarrierAre correspondingly multiplied to generate pieces 2pThe product signal.
2 is describedp+1 carrier multiplier for 2p+1 information subcarriers with 2 respectivelypThe +1 modulated signals are multiplied correspondingly to generate 2p+1 carrier modulated information.
The carrier adder is used for adding the DCSK reference signal subjected to carrier modulation to the DCSK 2 reference signalpThe carrier modulated information signals are added and transmitted through an antenna.
A short reference carrier index differential chaotic shift keying demodulation method comprises the following steps:
step S1: receiving the signal from the transmitting end, and comparing it with 2pMultiplying the +1 synchronous sine carriers with corresponding frequencies to generate 2p+1 product signals.
Step S2: 2 generated in step S1pThe +1 product signals are respectively matched and filtered, and the filtered 2pThe +1 product signals are subjected to time domain sampling, and 1 discrete DCSK reference signal sequence and 2 discrete DCSK reference signal sequences are respectively recoveredpA sequence of discrete information signals.
Step S3: storing the reference signal sequence generated in step S2 in matrix A1×a*RAnd the information signal sequence is stored in the matrix B2 p ×βIn (1).
Step S4: the matrix A generated in step S31×a*RDividing into a sections, marking the elements of each section, adding all the elements with same mark number and averaging to obtain new matrix A1×R。
Step S5: the matrix B generated in step S32 p ×βEach row in the matrix is divided into S sections, the elements of each section are marked, all the elements with the same marks are added and averaged to obtain a new row vector, all the row vectors are arranged according to the original sequence to obtain a new matrix B2 p ×R。
Step S6: correlating the matrix A generated in the step S4 with the transpose of the matrix B generated in the step S5 to obtain a matrix Z1×2 p。
Step S7: the result of the matrix Z generated in step S6 is input to a detector for detection, and the system calculates the absolute value of each value in Z and finds the maximum value using a detector based on the maximum energy.
Step S8: and finding the sequence number of the information subcarrier where the maximum value is located in the step S7, and recovering the demodulated index bits through an inverse index mapper.
Step S9: and performing threshold judgment on the correlation value corresponding to the maximum value in the step S7 to recover the demodulated modulation bits.
Step S10: the index bits generated at step S8 and the modulation bits generated at step S9 are combined into a demodulated serial data bit stream by parallel-to-serial conversion.
A short reference carrier index differential chaos shift keying demodulation system comprises 2p+1 carrier multiplier, 2p+1 matched filters, 2p+1 sampling switches, 2 multipliers, DSP chips and parallel-to-serial converters, wherein:
2 is describedp+1 carrier multiplier for 2pThe +1 information subcarriers are multiplied by the received signals, respectively, to generate 2p+1 product signals.
2 is describedp+1 matched filters for each pair 2pThe +1 product signals are matched filtered.
2 is describedp+1 sampling switches for matched filtered 2pThe +1 product signals are sampled in time domain, and 1 discrete DCSK reference signal sequence is recovered and stored in a matrix A1×a*RAnd 2pThe information signal sequence being stored in matrix B2 p ×β。
The 2 multipliers are respectively a first multiplier and a second multiplier, and the first multiplier is used for the matrix A1×a*RThe matrix A is obtained by segment averaging, and the second multiplier is used for the matrix B2 p ×βAnd carrying out segmentation and averaging to obtain a matrix B.
The DSP chip is used for performing correlation calculation on the matrix A and the matrix B, calculating the absolute value of each value according to the correlated matrix, finding the maximum value, recovering the index bit with the length of p according to the index of the carrier where the maximum value is located, and recovering the modulation bit through the symbol of the value with the maximum energy in the matrix.
And the parallel-serial converter combines the generated index bits and the generated modulation bits into a demodulated serial data bit stream through parallel-serial conversion.
Compared with the prior art, the invention has the following beneficial effects:
compared with the existing method under the carrier index differential chaotic shift keying system, the method reduces the noise received by the system on the basis of improving the transmission rate of the system frequency band.
Drawings
FIG. 1 is a structural diagram of a carrier index differential chaotic shift keying modulation system based on short reference signals according to the present invention;
FIG. 2 is a structural diagram of a carrier index differential chaotic shift keying demodulation system based on short reference signals according to the present invention;
fig. 3 is a comparison graph of the error code performance of the modulation and demodulation method of the present invention and the conventional CI-DCSK method in an additive white gaussian noise channel.
Detailed Description
The present invention is further illustrated by the following description in conjunction with the accompanying drawings and the specific embodiments, it is to be understood that these examples are given solely for the purpose of illustration and are not intended as a definition of the limits of the invention, since various equivalent modifications will occur to those skilled in the art upon reading the present invention and fall within the limits of the appended claims.
In order to verify that the short reference signal-based carrier index differential chaotic shift keying modulation and demodulation method provided by the invention can reduce system noise, the invention takes 1 verification example for verification description.
A short reference carrier index differential chaos shift keying modulation system, as shown in figure 1, comprises a chaos generator, a pulse shaping filter, 2 duplicators, a serial-to-parallel converter, a polarity converter, an index mapper, and 2pA modulation multiplier, 2p+1 carrier multipliers and carrier adders, wherein:
the chaotic generator is used for generating a discrete chaotic signal sequence.
The pulse shaping filter is used for carrying out pulse in-line filtering on the discrete chaotic signal sequence.
The 2 duplicators are respectively a first duplicator and a second duplicator, and the first duplicator is used for generating a DCSK reference signal x in the current symbol period by the line filtering signalv(t) a second duplicator for generating the line-filtered signal into a DCSK information signal y in the current symbol periodv(t)。
The serial-to-parallel converter is used for converting serial data bits to be transmitted in the current symbol period into parallel index bits.
The polarity converter is used for changing the modulation bit into a polarity modulation bit.
The index mapper is used for performing index mapping on the index bit and the bipolar bit to generate 2pModulation factor of information subcarrier
2 is describedpA modulation multiplier for multiplying the DCSK signal xv(t) are each independently 2pModulation factor of information subcarrierAre correspondingly multiplied to generate pieces 2pThe product signal.
2 is describedp+1 carrier multiplier for 2p+1 information subcarriers with 2 respectivelypThe +1 modulated signals are multiplied correspondingly to generate 2p+1 modulated carrierThe information of (1).
The carrier adder is used for adding the DCSK reference signal subjected to carrier modulation to the DCSK 2 reference signalpThe carrier modulated information signals are added and transmitted through an antenna.
At a transmitting end, carrying out carrier index differential chaotic shift keying modulation on a signal based on a short reference signal, and specifically comprising the following steps:
Step 2: in 1 symbol period [0, Tb]In the interior, the chaotic signal generator outputs 1 discrete chaotic signal sequence { X with the length of 101,X2,,...,X10};
And step 3: after the discrete chaotic signal sequence generated in the step 2 passes through a pulse line filter, a sequence duplicator is used for generating a DCSK reference signal in the current symbol period:
wherein T represents time, TcRepresenting the chip time.
And 4, step 4: after the discrete chaotic signal sequence generated in the step 2 passes through a pulse line filter, an information signal of the DCSK in the current symbol period is generated through a sequence duplicator:
wherein T represents time, TcRepresenting the chip time.
And 5: serial data bits 01011 of length 5 to be transmitted in the current symbol period are converted into index bits 0101 of length 4 and modulation bits 1 of length 1 by the serial-to-parallel converter SP.
Step 6: and changing the modulation bit 1 generated in the step 5 into a bipolar bit +1 through a polarity converter.
And 7: and (4) passing the index bits generated in the step (5) and the bipolar bits generated in the step (6) through an index mapper to generate 16 information subcarrier modulation coefficients, wherein the 6 th coefficient is +1, and the rest coefficients are 0.
And 8: and multiplying the DCSK information signals generated in the step 4 by the 16 information subcarrier modulation coefficients generated in the step 7 through a modulation multiplier respectively to generate 16 product signals.
And step 9: and multiplying the DCSK information signal generated in the step 4 by the 16 product signals generated in the step 8 to generate 16 modulation signals.
Step 10: and (3) multiplying the 16 data carriers generated in the step (1) by 16 modulation signals generated by data (9) to generate 16 information signals modulated by carriers.
Step 11: and multiplying the reference carrier generated in the step 1 by the DCSK reference signal generated in the step 3 to generate a DCSK reference signal subjected to carrier modulation.
Step 12: the DCSK reference signal modulated by the carrier generated in step 11 and the 16 information signals modulated by the carrier generated in step 10 are added by a carrier adder and then transmitted through an antenna.
A short reference carrier index differential chaos shift keying demodulation system is shown in figure 2 and comprises 2p+1 carrier multiplier, 2p+1 matched filters, 2p+1 sampling switches, 2 multipliers, DSP chips and parallel-to-serial converters, wherein:
2 is describedp+1 carrier multiplier for 2pThe +1 information subcarriers are multiplied by the received signals, respectively, to generate 2p+1 product signals.
2 is describedp+1 matched filters for each pair 2p+1 product signalsAnd performing matched filtering.
2 is describedp+1 sampling switches for matched filtered 2pThe +1 product signals are sampled in time domain, and 1 discrete DCSK reference signal sequence is recovered and stored in a matrix A1×a*RAnd 2pThe information signal sequence being stored in matrix B2 p ×β。
The 2 multipliers are respectively a first multiplier and a second multiplier, and the first multiplier is used for the matrix A1×a*RThe matrix A is obtained by segment averaging, and the second multiplier is used for the matrix B2 p ×βAnd carrying out segmentation and averaging to obtain a matrix B.
The DSP chip is used for performing correlation calculation on the matrix A and the matrix B, calculating the absolute value of each value according to the correlated matrix, finding the maximum value, recovering the index bit with the length of p according to the index of the carrier where the maximum value is located, and recovering the modulation bit through the symbol of the value with the maximum energy in the matrix.
And the parallel-serial converter combines the generated index bits and the generated modulation bits into a demodulated serial data bit stream through parallel-serial conversion.
At a receiving end, receiving and demodulating a signal, specifically comprising:
step S1: the receiving side receives the signal with the frequency ofThe 17 synchronous subcarriers are multiplied by a carrier multiplier to generate 17 product signals.
Step S2: pass matched filterPerforming matched filtering on the 17 product signals generated in the step S1 through 17 filters matched with the pulse shaping filter used in the step S3;
step S3: matching filter F by sampling switch0The output of the frequency domain equalizer is sampled in a time domain, and a discrete DCSK reference signal sequence is recovered.
Step S4: matched filter by sampling switchThe output of which is sampled in time domain to recover 16 discrete information signal sequences.
Step S5: storing the reference signal sequence generated in step S3 in matrix A1×90And the information signal sequence generated in step S4 is stored in matrix B16×100In (1).
Step S6: the matrix A generated in step S51×90Dividing into 9 segments, marking the elements of each segment, adding all the elements with same mark number and averaging to obtain new matrix A1×10。
Step S7: the matrix B generated in step S516×100Each row in the matrix is divided into 10 segments, the elements of each segment are marked, all the elements with the same marks are added and averaged to obtain a new row vector, all the row vectors are arranged according to the original sequence to obtain a new matrix B16×10。
Step S8: correlating the matrix A generated in the step S6 with the transpose of the matrix B generated in the step S7 to obtain a matrix Z1×16。
Step S9: the result of the matrix Z generated in step S6 is input to a detector for detection, and the system calculates the absolute value of each value in Z and finds the maximum value using a detector based on the maximum energy.
Step S10: and finding the sequence number of the information subcarrier where the maximum value is located in the step S9, and recovering the demodulated index bits through an inverse index mapper.
Step S11: and performing threshold judgment on the correlation value corresponding to the maximum value in the step S10 to recover the demodulated modulation bits.
Step S12: the index bits generated at step S10 and the modulation bits generated at step S11 are combined into a demodulated serial data bit stream by parallel-to-serial conversion.
Fig. 3 is a bit error rate performance of the method of the present invention simulated in an additive white gaussian noise channel. For comparison, the bit error rate performance of the conventional CI-DCSK method simulated under the same conditions is also shown in the figure. It can be seen that the present invention has better bit error rate performance compared to the existing CI-DCSK method.
In conclusion, the beneficial effects of the invention are as follows: 1) and under the same condition as the existing method, the noise of the CI-DCSK system is reduced. 2) Under the same condition with the existing method, the BER performance is improved. 3) Has higher spectrum utilization rate. 4) And the communication security is better.
The above description is only of the preferred embodiments of the present invention, and it should be noted that: it will be apparent to those skilled in the art that various modifications and adaptations can be made without departing from the principles of the invention and these are intended to be within the scope of the invention.
Claims (4)
1. A short reference carrier index differential chaotic shift keying modulation method is characterized by comprising the following steps:
step 1, generating a discrete chaotic signal sequence with the length of R;
step 2, the discrete chaotic signal sequence in the step 1 is copied for S times to generate a segment of sequence with the length of beta as an information signal of the DCSK in the current symbol period, wherein S is beta/R;
step 3, copying a from the discrete chaotic signal sequence in the step 1 to generate a new sequence with the length of a R as a reference signal of the DCSK in the current symbol period, and enabling a R to be beta;
and 4, step 4: dividing the frequency band required for signal transmission into 2p+1 sub-carrier band with center frequency f0Is a reference carrier for transmitting a chaotic reference signal, and 2 remainspOne carrier waveIs a data carrier and is from 1 to 2pCarrying out index marking;
and 5: converting P +1 bit serial data bits to be transmitted in a current symbol period into index bits with the length of P and modulation bits with the length of 1 through serial-parallel change;
step 6, converting the modulation bit of the data bit generated in the step 5 into a bipolar bit through polarity conversion;
step 7, generating 2 by performing index mapping according to the index bit of the data bit generated in step 5 and the bipolar bit of the data bit generated in step 6pModulation coefficients of the information subcarriers;
step 8, the DCSK information signal generated in the step 2 and the DCSK information signal generated in the step 7 are compared with 2pMultiplying the modulation coefficients of the information subcarriers to generate 2pA modulation signal;
step 9, 2 generated in step 4pData carrier and step 8 generating 2pMultiplying the modulated signals to generate 2pA carrier modulated information signal;
step 10: multiplying the reference carrier generated in the step 4 by the DCSK reference signal generated in the step 3 to generate a DCSK reference signal subjected to carrier modulation;
step 11, the DCSK reference signal which is generated in the step 10 and is subjected to carrier modulation and the DCSK reference signal which is generated in the step 9 and is 2pThe carrier modulated information signals are added and transmitted through an antenna.
2. A short reference carrier index differential chaotic shift keying modulation system is characterized in that: comprises a chaos generator, a pulse shaping filter, 2 duplicators, a serial-to-parallel converter, a polarity converter, an index mapper and 2pA modulation multiplier, 2p+1 carrier multipliers and carrier adders, wherein:
the chaotic generator is used for generating a discrete chaotic signal sequence;
the pulse shaping filter is used for performing pulse in-line filtering on the discrete chaotic signal sequence;
the 2 duplicators are respectively a first duplicator and a second duplicator, and the first duplicator is used for generating a DCSK reference signal x in the current symbol period by the line filtering signalv(t) a second duplicator for generating the line-filtered signal into a DCSK information signal y in the current symbol periodv(t);
The serial-to-parallel converter is used for converting serial data bits to be transmitted in the current symbol period into parallel index bits;
the polarity converter is used for changing the modulation bit into a polarity modulation bit;
the index mapper is used for performing index mapping on the index bit and the bipolar bit to generate 2pModulation factor of information subcarrier
2 is describedpA modulation multiplier for multiplying the DCSK signal xv(t) are each independently 2pModulation factor of information subcarrierAre correspondingly multiplied to generate pieces 2pA product signal;
2 is describedp+1 carrier multiplier for 2p+1 information subcarriers with 2 respectivelypThe +1 modulated signals are multiplied correspondingly to generate 2p+1 information modulated by a carrier;
the carrier adder is used for adding the DCSK reference signal subjected to carrier modulation to the DCSK 2 reference signalpThe carrier modulated information signals are added and transmitted through an antenna.
3. A short reference carrier index differential chaos shift keying demodulation method is characterized by comprising the following steps:
step S1: receiving the signal from the transmitting end, and comparing it with 2pMultiplying the +1 synchronous sine carriers with corresponding frequencies to generate 2p+1 product signals;
step S2: 2 generated in step S1pThe +1 product signals are respectively matched and filtered, and the filtered 2pThe +1 product signals are subjected to time domain sampling, and 1 discrete DCSK reference signal sequence and 2 discrete DCSK reference signal sequences are respectively recoveredpA sequence of discrete information signals;
step S3: the reference signal sequence generated in step S2The columns being stored in matrix A1×a*RAnd the information signal sequence is stored in the matrix B2 p ×βPerforming the following steps;
step S4: the matrix A generated in step S31×a*RDividing into a sections, marking the elements of each section, adding all the elements with same mark number and averaging to obtain new matrix A1×R;
Step S5: the matrix B generated in step S32 p ×βEach row in the matrix is divided into S sections, the elements of each section are marked, all the elements with the same marks are added and averaged to obtain a new row vector, all the row vectors are arranged according to the original sequence to obtain a new matrix B2 p ×R;
Step S6: correlating the matrix A generated in the step S4 with the transpose of the matrix B generated in the step S5 to obtain a matrix Z1×2 p;
Step S7: inputting the result of the matrix Z generated in step S6 into a detector for detection, the system using a detector based on the maximum energy, calculating the absolute value of each value in Z and finding the maximum value;
step S8: finding out the sequence number of the information subcarrier where the maximum value in the step S7 is located, and recovering the demodulated index bit through an inverse index mapper;
step S9: carrying out threshold judgment on the correlation value corresponding to the maximum value in the step S7 to recover the demodulated modulation bit;
step S10: the index bits generated at step S8 and the modulation bits generated at step S9 are combined into a demodulated serial data bit stream by parallel-to-serial conversion.
4. A short reference carrier index differential chaos shift keying demodulation system is characterized in that: comprises 2p+1 carrier multiplier, 2p+1 matched filters, 2p+1 sampling switches, 2 multipliers, DSP chips and parallel-to-serial converters, wherein:
2 is describedp+1 carrier multiplier for 2p+1 information sub-carriers respectively associated with the receivedMultiplication of signals to generate 2p+1 product signals;
2 is describedp+1 matched filters for each pair 2pPerforming matched filtering on the +1 product signals;
2 is describedp+1 sampling switches for matched filtered 2pThe +1 product signals are sampled in time domain, and 1 discrete DCSK reference signal sequence is recovered and stored in a matrix A1×a*RAnd 2pThe information signal sequence being stored in matrix B2 p ×β;
The 2 multipliers are respectively a first multiplier and a second multiplier, and the first multiplier is used for the matrix A1×a*RThe matrix A is obtained by segment averaging, and the second multiplier is used for the matrix B2 p ×βTaking average in a segmentation manner to obtain a matrix B;
the DSP chip is used for performing correlation calculation on the matrix A and the matrix B, calculating the absolute value of each value according to the correlated matrix, finding the maximum value, recovering the index bit with the length of p according to the index of the carrier where the maximum value is located, and recovering the modulation bit through the symbol of the value with the maximum energy in the matrix;
and the parallel-serial converter combines the generated index bits and the generated modulation bits into a demodulated serial data bit stream through parallel-serial conversion.
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