CN111756373A - Phase-locked loop control method and system based on memory voltage principle - Google Patents
Phase-locked loop control method and system based on memory voltage principle Download PDFInfo
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- CN111756373A CN111756373A CN202010489643.2A CN202010489643A CN111756373A CN 111756373 A CN111756373 A CN 111756373A CN 202010489643 A CN202010489643 A CN 202010489643A CN 111756373 A CN111756373 A CN 111756373A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/14—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted
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Abstract
The invention discloses a phase-locked loop control method and a system based on a memory voltage principle, which comprises the following steps: tracking the power grid voltage of a power grid in normal work in real time by using a wave recording device, and storing the power grid voltage as a memory voltage; judging whether the first voltage meets a preset voltage requirement when the power grid fails, and acquiring a judgment result; and if the judgment result indicates that the first voltage does not meet the preset voltage requirement, switching the input voltage of a phase-locked loop (PLL) in a control link, and taking the preset number of cycle waveforms before the fault moment as the input of the PLL according to the memory voltage so that the PLL outputs correct phase information. According to the method, when the voltage of the power grid drops seriously, the voltage before the fault is taken as the input signal of the phase-locked loop PLL to carry out phase locking according to the memory voltage, the photovoltaic output current is prevented from being distorted, the content of the second harmonic in the differential current can be effectively reduced, and the mistaken locking of the second harmonic braking criterion is prevented.
Description
Technical Field
The present invention relates to the field of electrical technologies, and in particular, to a method and a system for controlling a phase-locked loop based on a memory voltage principle.
Background
In recent years, distributed power generation based on renewable energy sources such as solar energy, wind energy and the like is vigorously developed in China, and when large-scale renewable energy sources are connected into a power grid, each parallel unit is required to be synchronous with the power grid. At present, a Phase Locked Loop (PLL) technology is generally adopted in an electric power system to realize lock tracking of signals such as a Phase and a frequency of a fundamental wave of a grid voltage. Information such as phase and frequency output by the PLL can participate in the control process of the distributed power supply, so that the converter outputs the phase frequency and amplitude which are the same as the grid-connected voltage. Therefore, the performance of the PLL directly affects the grid-connected control effect of the distributed power supply.
PLLs can be divided into two broad categories, single-phase PLLs and three-phase PLLs. Different from a single-phase PLL, a three-phase system has higher control requirements on the three-phase PLL because the three-phase system has negative sequence disturbance when three-phase voltage is unbalanced in addition to harmonic disturbance existing in the single-phase system. The three-phase PLL mainly has: the phase-locked loop comprises a zero-crossing comparison phase-locked loop, a multiplication phase-demodulation phase-locked loop, a phase-locked loop based on a single synchronous coordinate system, a phase-locked loop based on a decoupling double synchronous coordinate system and the like.
At present, the research on the PLL mainly focuses on improving the tracking performance of the PLL under the conditions of unbalanced power grid voltage or harmonic waves and the like, and the research on the influence of the PLL performance on relay protection is lacked. However, with the increase of the permeability of renewable energy, PLL is widely used, and the problem that the operation of the relay protection device is affected by PLL becomes more and more prominent. Especially, when a grid-connected point has a serious fault, because PLLs of various principles need to acquire the voltage of the grid-connected point, the serious drop of the voltage during the fault can cause the PLL to output wrong phase information to act on a control system, and further, the reliability of the relay protection device can be reduced.
Disclosure of Invention
The invention provides a phase-locked loop control method and a phase-locked loop control system based on a memory voltage principle, which aim to solve the problem of how to control a phase-locked loop (PLL).
In order to solve the above problem, according to an aspect of the present invention, there is provided a phase-locked loop control method based on a principle of a memorized voltage, the method including:
tracking the power grid voltage of a power grid in normal work in real time by using a wave recording device, and storing the power grid voltage as a memory voltage;
judging whether the first voltage meets a preset voltage requirement when the power grid fails, and acquiring a judgment result;
and if the judgment result indicates that the first voltage does not meet the preset voltage requirement, switching the input voltage of a phase-locked loop (PLL) in a control link, and taking the preset number of cycle waveforms before the fault moment as the input of the PLL according to the memory voltage so that the PLL outputs correct phase information.
Preferably, the determining whether the first voltage meets a preset voltage requirement when the power grid fails includes:
and judging whether the first voltage when the power grid fails meets the normal working voltage which is greater than or equal to the preset percentage and is used when the power grid normally works.
Preferably, wherein the preset percentage is 15%.
Preferably, wherein the method further comprises:
and if the judgment result indicates that the first voltage meets the preset voltage requirement, the input voltage of a phase-locked loop (PLL) is not switched, and the first voltage is used as the input of the PLL.
Preferably, the preset number is: 3.
according to another aspect of the present invention, there is provided a pll control system based on a memorized voltage principle, the system comprising:
the memory voltage acquisition unit is used for tracking the power grid voltage when the power grid normally works in real time by utilizing the wave recording device and storing the power grid voltage as the memory voltage;
the judgment result acquisition unit is used for judging whether the first voltage meets the preset voltage requirement when the power grid fails and acquiring a judgment result;
and the phase-locked loop control unit is used for switching the input voltage of the PLL in the phase-locked loop control link if the judgment result indicates that the first voltage does not meet the preset voltage requirement, and taking the preset number of cycle waveforms before the fault moment as the input of the PLL according to the memory voltage so that the PLL outputs correct phase information.
Preferably, the determining unit determines whether the first voltage meets a preset voltage requirement when the power grid fails, including:
and judging whether the first voltage when the power grid fails meets the normal working voltage which is greater than or equal to the preset percentage and is used when the power grid normally works.
Preferably, wherein the preset percentage is 15%.
Preferably, the phase-locked loop control unit is further configured to:
and if the judgment result indicates that the first voltage meets the preset voltage requirement, the input voltage of a phase-locked loop (PLL) is not switched, and the first voltage is used as the input of the PLL.
Preferably, the preset number is: 3.
the invention provides a phase-locked loop control method and system based on a memory voltage principle, according to the periodicity principle of a power grid voltage, the phase of a three-phase voltage with a lower amplitude value during a near-region three-phase short circuit is the same as the phase of a memory voltage before three cycles, the problem of PLL performance reduction caused by too low voltage during a near-region three-phase short circuit fault is solved by using the memory voltage, when the power grid voltage drops seriously, the voltage before the fault is used as an input signal of the phase-locked loop PLL for phase locking according to the memory voltage, the photovoltaic output current is prevented from being distorted, the second harmonic content in differential current can be effectively reduced, and the error locking of a second harmonic braking criterion is.
Drawings
A more complete understanding of exemplary embodiments of the present invention may be had by reference to the following drawings in which:
FIG. 1 is a flowchart of a PLL control method 100 based on a voltage-memorizing principle according to an embodiment of the present invention;
FIG. 2 is a diagram illustrating an improved PLL based on a memorized voltage according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a pll control system 300 based on the principle of voltage memorization according to an embodiment of the present invention.
Detailed Description
The exemplary embodiments of the present invention will now be described with reference to the accompanying drawings, however, the present invention may be embodied in many different forms and is not limited to the embodiments described herein, which are provided for complete and complete disclosure of the present invention and to fully convey the scope of the present invention to those skilled in the art. The terminology used in the exemplary embodiments illustrated in the accompanying drawings is not intended to be limiting of the invention. In the drawings, the same units/elements are denoted by the same reference numerals.
Unless otherwise defined, terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Further, it will be understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense.
Fig. 1 is a flowchart of a pll control method 100 based on a voltage memorizing principle according to an embodiment of the present invention. As shown in fig. 1, according to the phase-locked loop control method based on the memory voltage principle provided by the embodiment of the present invention, according to the periodicity principle of the grid voltage, the phase of the three-phase voltage with a lower amplitude value during the short circuit of the near-region three-phase is the same as the phase of the memory voltage before the three cycles, the problem of PLL performance degradation caused by too low voltage during the short circuit fault of the near-region three-phase is solved by using the memory voltage, and when the grid voltage drops seriously, the voltage before the fault is used as the input signal of the phase-locked loop PLL for phase locking according to the memory voltage, so as to prevent the distortion of the photovoltaic output current, effectively reduce the second harmonic content in the. In the phase-locked loop control method 100 based on the principle of the memorized voltage, which is provided by the embodiment of the invention, from step 101, a wave recording device is utilized to track the power grid voltage of the power grid in real time during normal operation in step 101, and the power grid voltage is stored as the memorized voltage.
In step 102, whether the first voltage meets a preset voltage requirement when the power grid fails is judged, and a judgment result is obtained.
Preferably, the determining whether the first voltage meets a preset voltage requirement when the power grid fails includes:
and judging whether the first voltage when the power grid fails meets the normal working voltage which is greater than or equal to the preset percentage and is used when the power grid normally works.
Preferably, wherein the preset percentage is 15%.
In step 103, if the judgment result indicates that the first voltage does not meet the preset voltage requirement, the input voltage of the PLL in the phase-locked loop control link is switched, and the preset number of cycle waveforms before the fault time are used as the input of the PLL according to the memory voltage, so that the PLL outputs correct phase information.
Preferably, wherein the method further comprises:
and if the judgment result indicates that the first voltage meets the preset voltage requirement, the input voltage of a phase-locked loop (PLL) is not switched, and the first voltage is used as the input of the PLL.
Preferably, the preset number is: 3.
FIG. 2 is a diagram illustrating an improved PLL based on a memorized voltage according to an embodiment of the present invention. In an embodiment of the present invention, the PLL is improved using the principle of the memory voltage, as shown in fig. 2. Wherein, a microcomputer protection wave recording device (wave recorder) is added for tracking the voltage u of the power grid in real time when the system works normallynAnd stored as a memory voltage. When a power grid is detected to have a serious fault, u at the moment is judgednWhether the effective value of the voltage is dropped to the effective value U of the normal working voltage when the power grid works normally0Less than 15%. If u is determinedn＜15％U0Switching the input signal of the PLL, and taking the waveform of the first three cycles of the fault time as the input voltage of the PLL according to the memory voltage so that the PLL outputs correct phase information to a control system (a photovoltaic power generation system); if un≥15％U0Then, the input signal of the PLL is not switched, and the real-time grid voltage is used as the input of the PLL.
According to the periodic principle of the power grid voltage, the three-phase voltage phase with the lower amplitude value in the near three-phase short circuit is the same as the memory voltage phase before three cycles, and the problem of PLL performance reduction caused by too low voltage in the near three-phase short circuit fault is solved by using the memory voltage. The accuracy tracking of the phase of the PLL can ensure the accuracy of the frequency of the output current of the inverter, so that the problem that the secondary harmonic content of the differential current of the main transformer is high after the inverter power supply is merged into a weak power grid, and the secondary harmonic brake is locked by mistake is prevented. In three cycles of the application of the memory voltage phase lock, the differential protection can quickly and accurately remove faults.
Fig. 3 is a schematic diagram of a pll control system 300 based on the principle of voltage memorization according to an embodiment of the present invention. As shown in fig. 3, the pll control system 300 according to the embodiment of the present invention includes: a memory voltage acquisition unit 301, a determination result acquisition unit 302, and a phase-locked loop control unit 303.
Preferably, the memory voltage obtaining unit 301 is configured to track a power grid voltage of a power grid during normal operation in real time by using a wave recording device, and store the power grid voltage as a memory voltage.
Preferably, the determination result obtaining unit 302 is configured to determine whether the first voltage meets a preset voltage requirement when the power grid fails, and obtain a determination result.
Preferably, the determining unit 302 determines whether the first voltage meets a preset voltage requirement when the power grid fails, including:
and judging whether the first voltage when the power grid fails meets the normal working voltage which is greater than or equal to the preset percentage and is used when the power grid normally works.
Preferably, wherein the preset percentage is 15%.
Preferably, the PLL control unit 303 is configured to switch an input voltage of a PLL in a PLL control link if the determination result indicates that the first voltage does not meet a preset voltage requirement, and use a preset number of cycle waveforms before the fault time as inputs of the PLL according to the memory voltage, so that the PLL outputs correct phase information.
Preferably, the phase-locked loop control unit is further configured to: and if the judgment result indicates that the first voltage meets the preset voltage requirement, the input voltage of a phase-locked loop (PLL) is not switched, and the first voltage is used as the input of the PLL.
Preferably, the preset number is: 3.
the pll control system 300 based on the principle of memorizing voltage according to the embodiment of the present invention corresponds to the method 100 of pll control system based on the principle of memorizing voltage according to another embodiment of the present invention, and is not described herein again.
The invention has been described with reference to a few embodiments. However, other embodiments of the invention than the one disclosed above are equally possible within the scope of the invention, as would be apparent to a person skilled in the art from the appended patent claims.
Generally, all terms used in the claims are to be interpreted according to their ordinary meaning in the technical field, unless explicitly defined otherwise herein. All references to "a/an/the [ device, component, etc ]" are to be interpreted openly as referring to at least one instance of said device, component, etc., unless explicitly stated otherwise. The steps of any method disclosed herein do not have to be performed in the exact order disclosed, unless explicitly stated.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solutions of the present invention and not for limiting the same, and although the present invention is described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: modifications and equivalents may be made to the embodiments of the invention without departing from the spirit and scope of the invention, which is to be covered by the claims.
Claims (10)
1. A phase-locked loop control method based on a memory voltage principle is characterized by comprising the following steps:
tracking the power grid voltage of a power grid in normal work in real time by using a wave recording device, and storing the power grid voltage as a memory voltage;
judging whether the first voltage meets a preset voltage requirement when the power grid fails, and acquiring a judgment result;
and if the judgment result indicates that the first voltage does not meet the preset voltage requirement, switching the input voltage of a phase-locked loop (PLL) in a control link, and taking the preset number of cycle waveforms before the fault moment as the input of the PLL according to the memory voltage so that the PLL outputs correct phase information.
2. The method of claim 1, wherein the determining whether the first voltage at the time of the grid fault meets a preset voltage requirement comprises:
and judging whether the first voltage when the power grid fails meets the normal working voltage which is greater than or equal to the preset percentage and is used when the power grid normally works.
3. The method according to claim 2, characterized in that said preset percentage is 15%.
4. The method of claim 1, further comprising:
and if the judgment result indicates that the first voltage meets the preset voltage requirement, the input voltage of a phase-locked loop (PLL) is not switched, and the first voltage is used as the input of the PLL.
5. The method of claim 1, wherein the predetermined number is: 3.
6. a pll control system based on a memory voltage principle, said system comprising:
the memory voltage acquisition unit is used for tracking the power grid voltage when the power grid normally works in real time by utilizing the wave recording device and storing the power grid voltage as the memory voltage;
the judgment result acquisition unit is used for judging whether the first voltage meets the preset voltage requirement when the power grid fails and acquiring a judgment result;
and the phase-locked loop control unit is used for switching the input voltage of the PLL in the phase-locked loop control link if the judgment result indicates that the first voltage does not meet the preset voltage requirement, and taking the preset number of cycle waveforms before the fault moment as the input of the PLL according to the memory voltage so that the PLL outputs correct phase information.
7. The system of claim 6, wherein the determining unit determines whether the first voltage at the time of the grid fault meets a preset voltage requirement, and comprises:
and judging whether the first voltage when the power grid fails meets the normal working voltage which is greater than or equal to the preset percentage and is used when the power grid normally works.
8. The system according to claim 7, characterized in that said preset percentage is 15%.
9. The system of claim 6, wherein the phase-locked loop control unit is further configured to:
and if the judgment result indicates that the first voltage meets the preset voltage requirement, the input voltage of a phase-locked loop (PLL) is not switched, and the first voltage is used as the input of the PLL.
10. The system of claim 6, wherein the predetermined number is: 3.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140210282A1 (en) * | 2013-01-30 | 2014-07-31 | Virginia Tech Intellectual Properties, Inc. | Anti-Islanding Detection for Three-Phase Distributed Generation |
| CN105244876A (en) * | 2015-10-30 | 2016-01-13 | 南方电网科学研究院有限责任公司 | Simulation playback method for fault recording of high-voltage direct-current transmission system |
| CN106226653A (en) * | 2016-08-11 | 2016-12-14 | 国网浙江省电力公司宁波供电公司 | The transfer law assessment system of the voltage dip of multistage power grid and appraisal procedure |
| CN107579509A (en) * | 2017-09-14 | 2018-01-12 | 南京国电南自电网自动化有限公司 | A kind of method for solving sampling frequency deviation and being influenceed on current protection directional element |
| CN109444640A (en) * | 2018-11-28 | 2019-03-08 | 南京国电南自电网自动化有限公司 | A kind of power distribution network single-phase high-impedance detection method, system and storage medium |
-
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- 2020-06-02 CN CN202010489643.2A patent/CN111756373A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140210282A1 (en) * | 2013-01-30 | 2014-07-31 | Virginia Tech Intellectual Properties, Inc. | Anti-Islanding Detection for Three-Phase Distributed Generation |
| CN105244876A (en) * | 2015-10-30 | 2016-01-13 | 南方电网科学研究院有限责任公司 | Simulation playback method for fault recording of high-voltage direct-current transmission system |
| CN106226653A (en) * | 2016-08-11 | 2016-12-14 | 国网浙江省电力公司宁波供电公司 | The transfer law assessment system of the voltage dip of multistage power grid and appraisal procedure |
| CN107579509A (en) * | 2017-09-14 | 2018-01-12 | 南京国电南自电网自动化有限公司 | A kind of method for solving sampling frequency deviation and being influenceed on current protection directional element |
| CN109444640A (en) * | 2018-11-28 | 2019-03-08 | 南京国电南自电网自动化有限公司 | A kind of power distribution network single-phase high-impedance detection method, system and storage medium |
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