CN111751699A - Semiconductor memory aging test system, test method and development method - Google Patents
Semiconductor memory aging test system, test method and development method Download PDFInfo
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- CN111751699A CN111751699A CN202010898177.3A CN202010898177A CN111751699A CN 111751699 A CN111751699 A CN 111751699A CN 202010898177 A CN202010898177 A CN 202010898177A CN 111751699 A CN111751699 A CN 111751699A
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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- G11C—STATIC STORES
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- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
Abstract
The invention discloses a semiconductor memory aging test system, a test method and a development method, wherein a public library in the system provides aging test data for a main program; the plug-in module sends a plug-in calling instruction to the main program; the main program loads corresponding plug-ins in the plug-in modules or does not load any plug-ins; the plug-in module comprises a lower computer core board monitoring plug-in, a chip aging test function plug-in, a temperature control plug-in and a chip information monitoring plug-in; through carrying out plug-in components modularization to aging testing, realized aging testing system and hardware's loose coupling design, reduced the complexity of system, each plug-in components module can independent development and maintenance, has increased stability, robustness and the expansibility of system for the iterative speed of system aging testing system update has reduced research and development expense cost, has shortened aging testing system's research and development cycle.
Description
Technical Field
The invention relates to the field of memory testing, in particular to a semiconductor memory aging testing system, a testing method and a developing method.
Background
Semiconductor memories (Semi-Conductor memories) are important components of modern digital systems, particularly computer systems, and as the integration of semiconductor memories is higher, the size of semiconductor device grains is smaller, and the failure rate of semiconductor devices is increased.
The reliability of the semiconductor memory device requires that defective cells be detected before shipment, and the defective cells can be quickly exposed as soon as possible by a Test Burn-In (TDBI) Test; the existing aging test system is generally of an integral structure, the modification of one function generally relates to the integral modification, and the aging test system is taken as an integral single-machine system, has extremely high integration level and is often required to be developed again when different requirements are met; when the requirement changes, the change often involves the whole system, so that the research and development cost is increased, the research and development period is prolonged, and the cost for carrying out different aging tests is higher.
Disclosure of Invention
The invention mainly aims to provide a semiconductor memory aging test system, a test method and a development method, and aims to solve the technical problems that in the prior art, an aging test system is high in integration level and needs to be developed again when meeting different requirements, so that the research and development cost is increased, the research and development period is prolonged, and the cost for carrying out different aging tests is high.
In a first aspect, the present invention provides a semiconductor memory burn-in test system, including:
the public library is used for providing aging test data for the main program;
the plug-in module is used for registering to the main program and sending a plug-in calling instruction to the main program;
the main program is used for loading the corresponding plug-in the plug-in module or not loading any plug-in according to the plug-in calling instruction; the plug-in module comprises a lower computer core board monitoring plug-in, a chip aging test function plug-in, a temperature control plug-in and a chip information monitoring plug-in; wherein the content of the first and second substances,
the lower computer core board monitoring plug-in is used for acquiring FPGA program version information and core board temperature information of a core board of a semiconductor memory to be tested and sending the FPGA program version information and the core board temperature information to the chip aging test functional plug-in;
the temperature control plug-in is used for adjusting the current temperature of the aging test box to the test temperature of the aging test box;
the chip aging test functional plug-in is used for performing aging test on the semiconductor memory to be tested at the aging box test temperature according to the FPGA program version information and the core board temperature information;
the chip information monitoring plug-in is used for acquiring the chip information of the semiconductor memory to be tested after the aging test, and judging whether the semiconductor memory to be tested is aged successfully or not according to the chip information.
Optionally, the chip aging test functional plug-in is further configured to set an aging box test temperature according to the core board temperature information and the FPGA program version information;
the chip information monitoring plug-in is also used for judging whether the semiconductor memory to be tested is a fault memory or not according to the chip information.
Optionally, the temperature control plug-in is further configured to obtain a current temperature of an aging test box, and determine to trigger generation of a temperature increase instruction or a temperature decrease instruction according to a magnitude relationship between the current temperature and the test temperature of the aging test box;
and the temperature control plug-in is also used for adjusting the current temperature to the test temperature of the aging box according to the heating instruction or the cooling instruction.
Optionally, the plug-in module further comprises: a chip data export function plug-in; wherein the content of the first and second substances,
the chip data export function plug-in is used for sending a data export instruction to a client of a core board of the semiconductor memory to be tested so that the client can read memory data of the semiconductor memory to be tested according to the data export instruction and store the exported data.
Optionally, the plug-in module further comprises: a functional plug-in is burned on the chip; wherein the content of the first and second substances,
the chip burning function plug-in is used for sending a preset burning file to a client of a core board of the semiconductor memory to be tested through a File Transfer Protocol (FTP) and a burning command, so that the client writes the preset burning file into the semiconductor memory to be tested according to the burning command.
Optionally, the plug-in module further comprises: a user management plug-in and an API agent plug-in; wherein the content of the first and second substances,
the user management plug-in is used for managing user accounts logging in the semiconductor memory aging test system and granting different operation authorities to the user accounts of different levels;
the API proxy plug-in is used for integrating an application program interface, providing an external calling control interface, receiving a customization instruction according to the external calling control interface and sending the customization instruction to the plug-in module.
Optionally, the main program is further configured to run a chinese translation loading module, a network initialization module, a main interface loading module, a plug-in function module, and a user login module.
Optionally, the public library comprises: the system comprises a TCP network communication library, a Modbus communication library, a serial port communication library, a graphic meeting library, a text printing library, a configuration text database reading library, a custom graphic library, a drawing consignment library, a user role single-case library and a DUT state single-case library.
In a second aspect, the present invention further provides a semiconductor memory aging test method, where the semiconductor memory aging test method includes:
the public library provides aging test data for the main program;
the plug-in module registers to the main program and sends a plug-in calling instruction to the main program;
the main program loads the corresponding plug-in the plug-in module or does not load any plug-in according to the plug-in calling instruction; the plug-in module comprises a lower computer core board monitoring plug-in, a chip aging test function plug-in, a temperature control plug-in and a chip information monitoring plug-in; wherein the content of the first and second substances,
the lower computer core board monitoring plug-in obtains FPGA program version information and core board temperature information of a core board of a semiconductor memory to be tested, and sends the FPGA program version information and the core board temperature information to the chip aging test functional plug-in;
the temperature control plug-in adjusts the current temperature of the aging test box to the test temperature of the aging test box;
the chip aging test functional plug-in carries out aging test on the semiconductor memory to be tested at the aging box test temperature according to the FPGA program version information and the core board temperature information;
the chip information monitoring plug-in obtains the chip information after the aging test of the semiconductor memory to be tested, and judges whether the aging of the semiconductor memory to be tested is successful or not according to the chip information.
In a third aspect, the present invention further provides a method for developing a burn-in test of a semiconductor memory, where the method for developing a burn-in test of a semiconductor memory includes:
when testing requirement change of a semiconductor memory to be tested is detected, determining a corresponding plug-in module function code according to a requirement change parameter corresponding to the testing requirement;
selecting a corresponding plug-in module according to the plug-in module function code for development, and calling the developed plug-in module to realize the corresponding plug-in module function;
and defining a plug-in calling interface according to the functions of the plug-in modules, and dynamically loading the plug-in modules and calling the plug-in calling interface when a plug-in loading instruction is received.
The invention provides a semiconductor memory aging test system, which provides aging test data to a main program through a public library; the plug-in module registers to the main program and sends a plug-in calling instruction to the main program; the main program loads the corresponding plug-in the plug-in module or does not load any plug-in according to the plug-in calling instruction; the plug-in module comprises a lower computer core board monitoring plug-in, a chip aging test function plug-in, a temperature control plug-in and a chip information monitoring plug-in; the lower computer core board monitoring plug-in obtains FPGA program version information and core board temperature information of a core board of a semiconductor memory to be tested, and sends the FPGA program version information and the core board temperature information to the chip aging test functional plug-in; the temperature control plug-in adjusts the current temperature of the aging test box to the test temperature of the aging test box; the chip aging test functional plug-in carries out aging test on the semiconductor memory to be tested at the aging box test temperature according to the FPGA program version information and the core board temperature information; the chip information monitoring plug-in obtains the chip information of the semiconductor memory to be tested after the aging test, and judges whether the aging of the semiconductor memory to be tested is successful or not according to the chip information; by plug-in modularization of the aging test, the aging test can be realized when the requirements change, the problem location or the version release is involved, the development cost can be reduced, the development period can be shortened, the working efficiency can be greatly improved, the loose coupling design of the aging test system and hardware can be realized, the complexity of the system is reduced, each plug-in module can be independently developed and maintained, the stability and the robustness of the system are improved, and the development of new modules for new requirements is facilitated, the expansibility of the system is increased, the processing capacity and the processing speed of the system for different types of requests are improved, the updating iteration speed of the aging test system is increased, the research and development cost and the aging test cost are reduced, the research and development period of the aging test system is shortened, and the development time of aging tests for different requirements is saved.
Drawings
FIG. 1 is a functional block diagram of a semiconductor memory burn-in system according to a first embodiment of the present invention;
FIG. 2 is a functional block diagram of a semiconductor memory burn-in system according to a second embodiment of the present invention;
FIG. 3 is a functional block diagram of a semiconductor memory burn-in system according to a third embodiment of the present invention;
FIG. 4 is a functional block diagram of a semiconductor memory burn-in system according to a fourth embodiment of the present invention;
FIG. 5 is a functional block diagram of a burn-in test box of the semiconductor memory based burn-in test system according to the present invention;
FIG. 6 is a flowchart illustrating a semiconductor memory burn-in method according to a first embodiment of the present invention;
FIG. 7 is a flowchart illustrating a development method of burn-in test for semiconductor memory according to a first embodiment of the present invention.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The solution of the embodiment of the invention is mainly as follows: the system provides aging test data for the main program through the public library; the plug-in module registers to the main program and sends a plug-in calling instruction to the main program; the main program loads the corresponding plug-in the plug-in module or does not load any plug-in according to the plug-in calling instruction; the plug-in module comprises a lower computer core board monitoring plug-in, a chip aging test function plug-in, a temperature control plug-in and a chip information monitoring plug-in; the lower computer core board monitoring plug-in obtains FPGA program version information and core board temperature information of a core board of a semiconductor memory to be tested, and sends the FPGA program version information and the core board temperature information to the chip aging test functional plug-in; the temperature control plug-in adjusts the current temperature of the aging test box to the test temperature of the aging test box; the chip aging test functional plug-in carries out aging test on the semiconductor memory to be tested at the aging box test temperature according to the FPGA program version information and the core board temperature information; the chip information monitoring plug-in obtains the chip information of the semiconductor memory to be tested after the aging test, and judges whether the aging of the semiconductor memory to be tested is successful or not according to the chip information; by modularizing the plug-in modules for the aging test, when the requirements change, the problem location or the version release are involved, the development cost can be reduced only by modifying or releasing the corresponding plug-in modules, the development period is shortened, the working efficiency is greatly improved, the loose coupling design of the aging test system and hardware is realized, the complexity of the system is reduced, each plug-in module can be independently developed and maintained, the stability and the robustness of the system are increased, the new module is conveniently developed for the new requirements, the expansibility of the system is increased, the processing capability and the processing speed of the system for different types of requests are improved, the updating iteration speed of the aging test system is accelerated, the development cost and the aging test cost are reduced, the development period of the aging test system is shortened, and the development time of the aging test for different requirements is saved, the technical problems that in the prior art, an aging test system is high in integration level and needs to be developed again when different requirements are met, research and development cost is increased, and research and development period is prolonged are solved.
Referring to fig. 1, fig. 1 is a functional block diagram of a semiconductor memory burn-in test system according to a first embodiment of the present invention.
In a first embodiment of a burn-in test system for a semiconductor memory according to the present invention, the burn-in test system for a semiconductor memory includes:
a common library 10 for providing the aging test data to the main program;
the plug-in module 20 is used for registering to the main program and sending a plug-in calling instruction to the main program;
the main program 30 is used for loading the corresponding plug-in the plug-in module or not loading any plug-in according to the plug-in calling instruction; the plug-in module 20 comprises a lower computer core board monitoring plug-in 21, a chip aging test functional plug-in 22, a temperature control plug-in 23 and a chip information monitoring plug-in 24; wherein the content of the first and second substances,
the lower computer core board monitoring plug-in is used for acquiring FPGA program version information and core board temperature information of a core board of a semiconductor memory to be tested and sending the FPGA program version information and the core board temperature information to the chip aging test functional plug-in;
the temperature control plug-in is used for adjusting the current temperature of the aging test box to the test temperature of the aging test box;
the chip aging test functional plug-in is used for performing aging test on the semiconductor memory to be tested at the aging box test temperature according to the FPGA program version information and the core board temperature information;
the chip information monitoring plug-in is used for acquiring the chip information of the semiconductor memory to be tested after the aging test, and judging whether the semiconductor memory to be tested is aged successfully or not according to the chip information.
It should be noted that the semiconductor memory aging test system of the present embodiment is an upper computer system, and the semiconductor memory aging test system includes a common library, a main program, and a plug-in module; wherein the public library comprises: the system comprises a TCP network communication library, a Modbus communication library, a serial communication library, a graphic generation library, a text printing library, a configuration text database reading library, a custom graphic library, a drawing commission library, a user role single-case library and a DUT state single-case library, and may also include more or fewer libraries, which is not limited in this embodiment.
It should be understood that the main program is also used for operating a chinese translation loading module, a network initialization module, a main interface loading module, a plug-in function module, and a user login module, different modules correspond to different functions, different function modules are called when user requirements change, and a common library needs to be called when the main program is operated.
It will be appreciated that the plug-in module registers with a host program, which may choose to load any one or more plug-ins, or none; the plug-in comprises a plurality of plug-in modules with different functions, the plug-in is an independent plug-in software module for dividing and packaging the aging test function of the upper computer, namely the aging test function of the upper computer is divided according to the integral aging test requirement of the aging test system, and the divided functions are packaged into independent plug-in software modules; certainly, the plug-in may be reset or added according to the actual situation at the later stage, which is not limited in this embodiment; the method comprises the steps that a corresponding driver is arranged in a plug-in module, the driver is based on a Linux kernel state, is relatively closed, cannot be called at will and can be called only by a certain management authority, a required panel plug-in can be selected through a user operation instruction, and therefore the semiconductor memory to be tested is subjected to aging test.
It should be understood that, the semiconductor memory to be tested is a semiconductor memory which needs to be subjected to an aging test, because the performance of a new semiconductor memory is unstable, the semiconductor memory to be tested can be subjected to a corresponding aging test through the chip aging test functional plug-in, so that the semiconductor memory to be tested can reach the standard of normal use in advance, the performance of the semiconductor memory to be tested reaches a stable state, the aging of the semiconductor memory to be tested can be accelerated through the aging test, and the defects of the semiconductor memory can be exposed as soon as possible, so that an unqualified memory can be detected, and the yield of the semiconductor memory can be improved.
It should be noted that the semiconductor memory aging test system of the present application is essentially an upper computer system, is a plug-in architecture oriented to the software development process and the software maintenance process, and has high code expansibility and portability, and the plug-in code realizing a certain function can be reused to another plug-in system through simple registration and calling, thereby solving the problems of high software code coupling degree, low and inconvenient multi-user parallel development efficiency, and in the version updating process, only corresponding plug-in modules can be released and deployed to the field without being released in whole package; if code maintenance is needed, only the corresponding plug-in is needed to be maintained, only the corresponding module needs to be added/deleted/modified, and the whole modification is not needed, so that the development/maintenance complexity is greatly reduced.
Accordingly, the plug-in module 20 comprises:
the lower computer core board monitoring plug-in 21, the chip aging test function plug-in 22, the temperature control plug-in 23 and the chip information monitoring plug-in 24; wherein the content of the first and second substances,
the lower computer core board monitoring plug-in 21 is configured to acquire FPGA program version information and core board temperature information of a core board of a semiconductor memory to be tested, and send the FPGA program version information and the core board temperature information to the chip aging test function plug-in.
It should be noted that the FPGA program version information is version information corresponding to a current FPGA program of the semiconductor memory to be tested, and the FPGA program version information can be obtained by a lower computer core board monitoring plug-in; the core board temperature information is the current temperature information of the core board of the semiconductor memory to be tested, the FPGA program version information is the version information corresponding to the current FPGA program of the semiconductor memory to be tested, and the core board temperature information and the FPGA program version information can be acquired through the monitoring plug-in of the core board of the lower computer.
And the temperature control plug-in 23 is used for adjusting the current temperature of the aging test box to the test temperature of the aging test box.
It should be understood that the burn-in test box is a device for performing burn-in test on the semiconductor memory to be tested, the temperature control plug-in is a plug-in for acquiring temperature information of the burn-in test box and performing temperature adjustment, the temperature control plug-in may be a Chamber control plug-in, or of course, other plug-ins capable of achieving the same or similar functions, and this embodiment is not limited thereto; the current temperature of the aging test box can be adjusted to the temperature corresponding to the test temperature of the aging test box through the temperature control plug-in.
It is to be understood that the test temperature required for the semiconductor memory to be tested to perform the burn-in test can be generally determined by the burn-in box control instruction, and a relatively suitable burn-in box test temperature can be set by combining the burn-in box temperature adjustment information.
In the specific implementation, the temperature of the aging test box can be acquired in real time through the Chamber control plug-in, the aging test box can generally communicate with a Chamber controller through a serial port, a temperature line graph is drawn on an upper computer interface, meanwhile, the temperature of the Chamber controller is set through the Chamber control plug-in, and the Chamber controller is controlled to carry out heating or cooling operation, so that the temperature in the aging test box is controlled, and the aging test of the semiconductor memory to be tested is carried out in a matching manner.
The chip aging test functional plug-in 22 is used for performing aging test on the semiconductor memory to be tested at the aging box test temperature according to the FPGA program version information and the core board temperature information.
It should be understood that the Field Programmable Gate Array (FPGA) program version information may be obtained by a lower core board monitoring plug-in, the lower core board monitoring plug-in may monitor state information of a plurality of core boards of the semiconductor memory to be tested, and the chip burn-in test function plug-in may perform burn-in test on the semiconductor memory to be tested according to the FPGA program version information after receiving the FPGA program version information sent by the lower core board monitoring plug-in.
It can be understood that, since the performance of the new semiconductor memory is unstable, the chip burn-in test functional plug-in can perform a corresponding burn-in test on the semiconductor memory to be tested at the burn-in box test temperature, so that the semiconductor memory to be tested can reach the standard of normal use in advance, the performance of the semiconductor memory to be tested can reach a stable state, the burn-in test can accelerate the burn-in of the semiconductor memory to be tested, and the defects of the semiconductor memory can be exposed as soon as possible, thereby detecting the unqualified memory and improving the yield of the semiconductor memory.
The chip information monitoring plug-in 24 is configured to obtain chip information after the aging test of the semiconductor memory to be tested, and determine whether the aging of the semiconductor memory to be tested is successful according to the chip information.
It should be noted that the chip information monitoring plug-in is a plug-in used for monitoring the state of the semiconductor memory to be tested and acquiring corresponding information, where the chip information may include chip power-on information, chip voltage, chip ID, chip operation state, chip operation execution result, and the like, and may also include a current erasing and writing state of the semiconductor memory, a current aging test degree, and the like, and certainly may also include more or less information, which is not limited in this embodiment.
It can be understood that whether the semiconductor memory to be tested is aged successfully or not can be determined through the chip information, generally, whether the semiconductor memory to be tested is aged successfully or not can be determined through comprehensive analysis according to the power-on state, the current erasing state and the aging test degree of the semiconductor memory, and certainly, whether the semiconductor memory to be tested is aged successfully or not can also be determined through other manners, for example, by combining more chip information or only performing judgment according to single chip information, for example, determining whether the semiconductor memory is aged successfully or not according to the size relationship between the aging test degree and the preset aging test degree, which is not limited in this embodiment.
According to the scheme, the system provides aging test data for the main program through the public library; the plug-in module registers to the main program and sends a plug-in calling instruction to the main program; the main program loads the corresponding plug-in the plug-in module or does not load any plug-in according to the plug-in calling instruction; the plug-in module comprises a lower computer core board monitoring plug-in, a chip aging test function plug-in, a temperature control plug-in and a chip information monitoring plug-in; the lower computer core board monitoring plug-in obtains FPGA program version information and core board temperature information of a core board of a semiconductor memory to be tested, and sends the FPGA program version information and the core board temperature information to the chip aging test functional plug-in; the temperature control plug-in adjusts the current temperature of the aging test box to the test temperature of the aging test box; the chip aging test functional plug-in carries out aging test on the semiconductor memory to be tested at the aging box test temperature according to the FPGA program version information and the core board temperature information; the chip information monitoring plug-in obtains the chip information of the semiconductor memory to be tested after the aging test, and judges whether the aging of the semiconductor memory to be tested is successful or not according to the chip information; by plug-in modularization of the aging test, the aging test can be realized when the requirements change, the problem location or the version release is involved, the development cost can be reduced, the development period can be shortened, the working efficiency can be greatly improved, the loose coupling design of the aging test system and hardware can be realized, the complexity of the system is reduced, each plug-in module can be independently developed and maintained, the stability and the robustness of the system are improved, and the development of new modules for new requirements is facilitated, the expansibility of the system is increased, the processing capacity and the processing speed of the system for different types of requests are improved, the updating iteration speed of the aging test system is increased, the research and development cost and the aging test cost are reduced, the research and development period of the aging test system is shortened, and the development time of aging tests for different requirements is saved.
Further, with continued reference to fig. 1, the chip burn-in test functional plug-in 22 is further configured to set a burn-in box test temperature according to the core board temperature information and the FPGA program version information.
It should be noted that the core board temperature information and the Field Programmable Gate Array (FPGA) program version information of the semiconductor memory to be tested may be obtained through a lower computer core board monitoring plug-in, which may monitor state information of a plurality of core boards of the semiconductor memory to be tested, where the state information includes the core board temperature information, and the chip burn-in test function plug-in may set a burn-in box test temperature of a burn-in test box according to the core board temperature information and the FPGA program version information after receiving the core board temperature information and the FPGA program version information sent by the lower computer core board monitoring plug-in, where the burn-in box test temperature is a test environment temperature required by the semiconductor memory to be tested for burn-in test.
It can be understood that the chip aging test function plug-in unit generates the aging box temperature regulation information according to the core board temperature information, namely the chip aging test function plug-in unit can issue the core board temperature information to the temperature control single chip microcomputer of the aging test box, so that the aging box temperature regulation information is generated according to the temperature value of the core board temperature, and different aging box temperature regulation information is correspondingly generated by different temperature values.
It should be understood that control instruction sets corresponding to different FPGA program versions are also correspondingly different, the chip burn-in test function plug-in may obtain a corresponding burn-in box control instruction according to the FPGA program version information, where the instruction obtaining manner may be obtained by searching an instruction set, or obtained by matching with a related instruction in a preset instruction database, or obtained by other manners, which is not limited in this embodiment.
The chip information monitoring plug-in 24 is further configured to determine whether the semiconductor memory to be tested is a failed memory according to the chip information.
It is understood that whether the semiconductor memory to be tested has a corresponding hardware defect or software defect can be determined through the chip information, and if a defect or other type of fault exists, the semiconductor memory to be tested can be determined to be a faulty memory.
Further, with reference to fig. 1, the temperature control plug-in 23 is further configured to obtain a current temperature of the burn-in test box, and determine to trigger generation of a temperature-increasing instruction or a temperature-decreasing instruction according to a magnitude relationship between the current temperature and the test temperature of the burn-in test box.
It should be noted that the temperature of the check ring of the aging test box can be directly obtained through the temperature control plug-in, and generally, the temperature control plug-in can communicate with the temperature detection device through a serial port, so as to query the current temperature of the aging test box.
It can be understood that, the temperature control plug-in can determine whether to carry out heating operation or cooling operation by comparing the magnitude relation of the current temperature and the ageing box test temperature, when the current temperature is greater than the ageing box test temperature, then cooling operation needs to be carried out, and at this moment, a cooling instruction can be generated by determining to trigger, when the current temperature is less than the ageing box test temperature, then heating operation needs to be carried out, and at this moment, a heating instruction can be generated by determining to trigger.
And the temperature control plug-in 23 is further configured to adjust the current temperature to the test temperature of the aging box according to the heating instruction or the cooling instruction.
It should be understood that the temperature control plug-in may raise the current temperature according to a temperature raising instruction until the current temperature reaches the burn-in box test temperature, and the temperature control plug-in may lower the current temperature according to a temperature lowering instruction until the current temperature reaches the burn-in box test temperature; acquiring the current temperature of the aging test box through a temperature control plug-in; the temperature control plug-in determines to trigger and generate a heating instruction or a cooling instruction according to the magnitude relation between the current temperature and the test temperature of the aging box; the temperature control plug-in adjusts the current temperature to the aging box test temperature according to the heating instruction or the cooling instruction, so that the accuracy of the aging test temperature of the semiconductor memory can be improved, the aging test speed of the semiconductor memory is accelerated, the test time is saved, the complexity of the system is reduced, the research and development cost and the aging test cost are reduced, the research and development period of the aging test system is shortened, and the development time of the aging test with different requirements is saved.
Further, fig. 2 is a functional block diagram of a second embodiment of the burn-in test system for a semiconductor memory according to the present invention, and as shown in fig. 2, the second embodiment of the burn-in test system for a semiconductor memory according to the present invention is provided based on the first embodiment, in this embodiment, the plug-in module 20 further includes: a chip data export function plug-in 25; wherein the content of the first and second substances,
the chip data export function plug-in 25 is configured to send a data export instruction to a client of the core board of the semiconductor memory to be tested, so that the client performs a memory data reading operation on the semiconductor memory to be tested according to the data export instruction, and stores the exported data.
It should be noted that the chip data export function plug-in is a plug-in for exporting data of the semiconductor memory to be tested, the chip data export function plug-in sends an instruction to a client of the core board, and the client can read memory data of the client according to the data export instruction, that is, the client can read memory data of the semiconductor memory to be tested according to the data export instruction, and after reading the data, the data is generally stored in a file form.
According to the scheme, the memory data of the semiconductor memory to be tested can be effectively stored through the chip data export functional plug-in, the data security of the semiconductor memory to be tested is guaranteed, the subsequent memory data can be rapidly recovered, and the service recovery time is shortened.
Further, fig. 3 is a functional block diagram of a semiconductor memory aging test system according to a third embodiment of the present invention, and as shown in fig. 3, the third embodiment of the semiconductor memory aging test system according to the present invention is provided based on the first embodiment, in this embodiment, the plug-in module 20 further includes: a chip burning function plug-in 26; wherein the content of the first and second substances,
the chip burning function plug-in 26 is configured to send a preset burning file to a client of the core board of the semiconductor memory to be tested through a file transfer protocol FTP and a burning command, so that the client writes the preset burning file into the semiconductor memory to be tested according to the burning command.
It should be understood that the chip burning functional plug-in is a plug-in for burning data of the semiconductor memory to be tested, the preset burning File is a File formed by preset burning data, generally, the chip burning functional plug-in can send the preset burning File to the client through a File Transfer Protocol (FTP), and can send a burning instruction to the client at the same time, and after receiving the burning instruction, the client can write the preset burning File into the semiconductor memory to be tested, that is, write data of the preset burning File into a chip memory of the semiconductor memory to be tested.
According to the scheme, the memory data reading operation and the writing operation of the semiconductor memory to be tested can be completed through the chip burning functional plug-in, the aging test speed of the semiconductor memory is accelerated, the test time is saved, the complexity of the system is reduced, the research and development cost and the aging test cost are reduced, the research and development period of the aging test system is shortened, and the development time of the aging test with different requirements is saved.
Further, fig. 4 is a functional block diagram of a semiconductor memory aging test system according to a fourth embodiment of the present invention, and as shown in fig. 4, the fourth embodiment of the semiconductor memory aging test system according to the present invention is provided based on the first embodiment, in this embodiment, the plug-in module 20 further includes: a user management plug-in 27 and an API proxy plug-in 28; wherein the content of the first and second substances,
the user management plug-in 27 is used for managing user accounts logged in the semiconductor memory aging test system and granting different operation permissions to user accounts of different levels.
It should be noted that the user management plug-in is used for managing users logging in the aging test system, and giving different operation permissions to user accounts of different levels, that is, determining and distinguishing different operation permissions according to different user account levels.
The API proxy plug-in 28 is configured to integrate an application program interface, provide an external call control interface, receive a customized instruction according to the external call control interface, and send the customized instruction to the plug-in module.
It can be understood that the Application Programming Interface (API) proxy plug-in provides an external calling control Interface, integrates various API interfaces, enables the overall aging test system to perform an aging test by itself, receives a customized instruction according to the external calling control Interface, and sends the customized instruction to the chip aging test functional plug-in, thereby implementing a customized aging test according to the external calling Interface.
In a specific implementation, the plug-in module may further include other plug-ins, such as a registration plug-in, a login plug-in, a user management plug-in, a system setting plug-in (including program upgrade), a company About information plug-in, or other types of service plug-ins that may be expanded, which is not limited in this embodiment.
This embodiment is through above-mentioned scheme, through the user management plug-in can be for different users distribution different operation authorities, thereby accelerate semiconductor memory aging testing's speed, test time has been saved, through the various API interfaces of integration, make whole aging testing system can carry out aging testing by oneself, and conveniently provide multiple mode of operation, conveniently develop new module to newly-increased demand, the expansibility of system has been increased, the throughput and the processing speed of system to the different grade type request have been promoted, the speed of aging testing system update iteration has been accelerated, research and development expense and aging testing cost have been reduced, the research and development cycle of aging testing system has been shortened, the development time to the aging testing of different demands has been saved.
Correspondingly, the invention further provides a burn-in test box based on the semiconductor memory burn-in test system.
Referring to fig. 5, fig. 5 is a functional block diagram of a burn-in test box based on the semiconductor memory burn-in test system of the present invention.
The invention relates to an aging test box based on an aging test method of a semiconductor memory, which comprises the following steps:
the upper computer is used for testing the core board and the test carrier board; wherein the content of the first and second substances,
and the upper computer is used for receiving user operation information and carrying out communication interaction with the client of the test core board according to the user operation information.
It should be noted that, the host computer can be computer or server, and the host computer generally communicates with the ethernet switch and interacts, the host computer can receive user operation information, and can be according to user operation information generates corresponding order, thereby with the order send to test core plate, with this control test core plate is right the operation of test carrier plate, the host computer can communicate with polylith test core plate simultaneously, the host computer can communicate with a plurality of core plates simultaneously, has increased the quantity of the same time operation chip of aging testing system, has improved aging testing's speed and efficiency.
And the test core board is used for receiving the interactive command of the upper computer and carrying out aging test on the semiconductor memory to be tested through the FPGA control chip.
It can be understood that the test core board is responsible for receiving the interactive command sent by the upper computer, so as to perform the burn-in test on the semiconductor memory to be tested according to the interactive command of the upper computer, and generally, the related operations of erasing, reading and writing can be performed through the FPGA control chip.
The test carrier plate is used for placing the semiconductor device to be tested and controlling and adjusting the test temperature of the aging box through a Chamber control plug-in.
It should be understood that, the test carrier plate with generally can link to each other with both by the backplate between the test core plate, the test carrier plate is used for placing the semiconductor device that awaits measuring, the host computer, the test core plate reaches the test carrier plate all is located the aging testing incasement, generally, the host computer is located the normal temperature district of aging testing incasement, the test core plate reaches the test carrier plate is located the aging zone of aging testing incasement, the test carrier plate can be through the intensification or the cooling of Chamber of the control regulation aging testing of Chamber plug-in components to maintain the required temperature environment of memory chip aging testing.
The steps of implementing the functions of the test core board and the test carrier board in the burn-in test box based on the semiconductor memory burn-in test method may refer to various embodiments of the semiconductor memory burn-in test system of the present invention, and are not described herein again.
Correspondingly, the invention further provides a semiconductor memory aging test method.
Referring to fig. 6, fig. 6 is a flowchart illustrating a semiconductor memory burn-in test method according to a first embodiment of the present invention.
In a first embodiment, the semiconductor memory burn-in test method includes the steps of:
step S10, the public library provides the main program with the burn-in test data.
And step S20, registering the plug-in module with the main program, and sending a plug-in calling instruction to the main program.
Step S30, the main program loads the corresponding plug-in the plug-in module or does not load any plug-in according to the plug-in calling instruction; the plug-in module comprises a lower computer core board monitoring plug-in, a chip aging test function plug-in, a temperature control plug-in and a chip information monitoring plug-in.
Step S40, the lower computer core board monitoring plug-in obtains FPGA program version information and core board temperature information of a core board of the semiconductor memory to be tested, and sends the FPGA program version information and the core board temperature information to the chip aging test function plug-in.
And step S50, the temperature control plug-in adjusts the current temperature of the burn-in test box to the test temperature of the burn-in test box.
And step S60, the chip aging test functional plug-in carries out aging test on the semiconductor memory to be tested at the aging box test temperature according to the FPGA program version information and the core board temperature information.
Step S70, the chip information monitoring plug-in obtains the chip information after the aging test of the semiconductor memory to be tested, and judges whether the aging of the semiconductor memory to be tested is successful or not according to the chip information.
The description of each step of the semiconductor memory aging test method refers to each functional module of the semiconductor memory aging test system of the invention, and is not repeated herein.
Correspondingly, the invention further provides a development method based on the semiconductor memory aging test.
Fig. 7 is a flowchart illustrating a method for developing a burn-in test of a semiconductor memory according to a first embodiment of the present invention, and as shown in fig. 7, the method for developing a burn-in test of a semiconductor memory includes the following steps:
b10, when the test requirement change of the semiconductor memory to be tested is detected, determining the corresponding plug-in module function code according to the requirement change parameter corresponding to the test requirement.
It should be noted that different types of semiconductor memories may have different test requirements, and when the test requirements change, different requirement change parameters may be generated, where the requirement change parameters are corresponding requirement data generated according to the changed test requirements, and the different requirement change parameters correspond to different plug-in module function codes, that is, correspond to different plug-in module functions, and the plug-in module functions correspond to functions to be implemented according to the different test requirements.
It can be understood that the conventional burn-in test system is an integral single-machine structure, and when a function or detection requirement is changed, the integral development is required, the development cost is high, the development period is long, by the aging test development method of the semiconductor memory in the embodiment, the loose coupling design of the software and the hardware of the aging test system can be realized, the semiconductor memory aging test development method is essentially a software development method, reduces the complexity of the system, can independently develop and maintain each plug-in module, increases the stability and the robustness of the system, and the development of new modules for new requirements is facilitated, the expansibility of the system is increased, the processing capacity and the processing speed of the system for different types of requests are improved, the updating iteration speed of the aging test system is increased, and the development time of aging tests for different requirements is saved.
And B20, selecting a corresponding plug-in module according to the plug-in module function code for development, and realizing the corresponding plug-in module function according to the developed plug-in module.
It can be understood that different plug-in module functions correspond to different plug-in modules, the corresponding plug-in modules can be selected for development in a targeted manner through the plug-in module functions, and the plug-in module functions can be realized according to the developed plug-in modules, that is, the plug-in modules can be used for aging testing of the semiconductor memory to be tested in a targeted manner according to the change of requirements, so that the aging testing processing capacity and the processing speed for different types of requests are improved; in actual operation, different plug-in modules can be freely combined and called according to actual test requirements, so that timeliness and test efficiency of the aging test are improved.
B30, defining a plug-in calling interface according to the functions of the plug-in modules, and dynamically loading the plug-in modules and calling the plug-in calling interface when a plug-in loading instruction is received.
It should be understood that the plug-in calling interface is an interface for calling each plug-in module, and the plug-in calling interface is defined by the function of the plug-in module, so that each plug-in module can have a matched interface, thereby facilitating the use of the plug-in module, and the plug-in loading instruction is a preset instruction for calling and loading the plug-in, and may be a plug-in loading instruction generated by triggering a specific calling signal, or a plug-in loading instruction directly sent by a developer or a user, which is not limited in this embodiment; when a plug-in loading instruction is received, the plug-in module can be dynamically loaded and the plug-in calling interface is called.
In concrete realization, software development main program and each plug-in module are independent respectively, and each plug-in module can be developed in parallel, and required plug-in module of dynamic loading and the plug-in of calling that calls correspond are called the interface according to the demand when software development main program is run, has increased aging test's stability and robustness to the convenience is to newly-increased demand development pertinence plug-in module, has increased aging test's expansibility and timeliness.
According to the scheme, when the test requirement change of the semiconductor memory to be tested is detected, the corresponding plug-in module function is determined according to the requirement change parameter corresponding to the test requirement; selecting a corresponding plug-in module according to the plug-in module function for development, and realizing the plug-in module function according to the developed plug-in module; defining a plug-in calling interface according to the functions of the plug-in modules, and dynamically loading the plug-in modules and calling the plug-in calling interface when a plug-in loading instruction is received; can be when involving the demand change, problem location or version are released, only need to modify or release the plug-in module that corresponds just can reduce the research and development cost, shorten the research and development cycle, very big improvement work efficiency, realize the loose coupling design of aging testing system and hardware, the complexity of system has been reduced, each plug-in module can independently be developed and maintain, the stability and the robustness of system have been increased, and conveniently develop new module to newly-increased demand, aging testing's expansibility has been increased, aging testing has promoted the throughput and the processing speed of aging testing to different grade type requests, the speed of aging testing system update iteration has been accelerated, research and development expense and aging testing cost have been reduced, aging testing system's research and development cycle has been shortened, aging testing's development time to different demands has been saved.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A semiconductor memory burn-in test system, comprising:
the public library is used for providing aging test data for the main program;
the plug-in module is used for registering to the main program and sending a plug-in calling instruction to the main program;
the main program is used for loading the corresponding plug-in the plug-in module or not loading any plug-in according to the plug-in calling instruction; the plug-in module comprises a lower computer core board monitoring plug-in, a chip aging test function plug-in, a temperature control plug-in and a chip information monitoring plug-in; wherein the content of the first and second substances,
the lower computer core board monitoring plug-in is used for acquiring FPGA program version information and core board temperature information of a core board of a semiconductor memory to be tested and sending the FPGA program version information and the core board temperature information to the chip aging test functional plug-in;
the temperature control plug-in is used for adjusting the current temperature of the aging test box to the test temperature of the aging test box;
the chip aging test functional plug-in is used for performing aging test on the semiconductor memory to be tested at the aging box test temperature according to the FPGA program version information and the core board temperature information;
the chip information monitoring plug-in is used for acquiring the chip information of the semiconductor memory to be tested after the aging test, and judging whether the semiconductor memory to be tested is aged successfully or not according to the chip information.
2. The semiconductor memory burn-in test system of claim 1, wherein the chip burn-in test function plug-in is further configured to set a burn-in box test temperature according to the core board temperature information and the FPGA program version information;
the chip information monitoring plug-in is also used for judging whether the semiconductor memory to be tested is a fault memory or not according to the chip information.
3. The system for burn-in testing of a semiconductor memory according to claim 1, wherein the temperature control plug-in is further configured to obtain a current temperature of a burn-in test box, and determine to trigger generation of a temperature-increasing instruction or a temperature-decreasing instruction according to a magnitude relationship between the current temperature and the test temperature of the burn-in test box;
and the temperature control plug-in is also used for adjusting the current temperature to the test temperature of the aging box according to the heating instruction or the cooling instruction.
4. The semiconductor memory burn-in test system of claim 1, wherein the plug-in module further comprises: a chip data export function plug-in; wherein the content of the first and second substances,
the chip data export function plug-in is used for sending a data export instruction to a client of a core board of the semiconductor memory to be tested so that the client can read memory data of the semiconductor memory to be tested according to the data export instruction and store the exported data.
5. The semiconductor memory burn-in test system of claim 1, wherein the plug-in module further comprises: a functional plug-in is burned on the chip; wherein the content of the first and second substances,
the chip burning function plug-in is used for sending a preset burning file to a client of a core board of the semiconductor memory to be tested through a File Transfer Protocol (FTP) and a burning command, so that the client writes the preset burning file into the semiconductor memory to be tested according to the burning command.
6. The semiconductor memory burn-in test system of claim 1, wherein the plug-in module further comprises: a user management plug-in and an API agent plug-in; wherein the content of the first and second substances,
the user management plug-in is used for managing user accounts logging in the semiconductor memory aging test system and granting different operation authorities to the user accounts of different levels;
the API proxy plug-in is used for integrating an application program interface, providing an external calling control interface, receiving a customization instruction according to the external calling control interface and sending the customization instruction to the plug-in module.
7. The semiconductor memory burn-in test system of claim 1, wherein the main program is further configured to run a chinese translation loading module, a network initialization module, a main interface loading module, a plug-in function module, and a user login module.
8. The semiconductor memory burn-in test system of claim 1, wherein the common bank comprises: the system comprises a TCP network communication library, a Modbus communication library, a serial port communication library, a graphic meeting library, a text printing library, a configuration text database reading library, a custom graphic library, a drawing consignment library, a user role single-case library and a DUT state single-case library.
9. A semiconductor memory burn-in test method based on the semiconductor memory burn-in test system according to any one of claims 1 to 8, characterized in that the semiconductor memory burn-in test method comprises:
the public library provides aging test data for the main program;
the plug-in module registers to the main program and sends a plug-in calling instruction to the main program;
the main program loads the corresponding plug-in the plug-in module or does not load any plug-in according to the plug-in calling instruction; the plug-in module comprises a lower computer core board monitoring plug-in, a chip aging test function plug-in, a temperature control plug-in and a chip information monitoring plug-in; wherein the content of the first and second substances,
the lower computer core board monitoring plug-in obtains FPGA program version information and core board temperature information of a core board of a semiconductor memory to be tested, and sends the FPGA program version information and the core board temperature information to the chip aging test functional plug-in;
the temperature control plug-in adjusts the current temperature of the aging test box to the test temperature of the aging test box;
the chip aging test functional plug-in carries out aging test on the semiconductor memory to be tested at the aging box test temperature according to the FPGA program version information and the core board temperature information;
the chip information monitoring plug-in obtains the chip information after the aging test of the semiconductor memory to be tested, and judges whether the aging of the semiconductor memory to be tested is successful or not according to the chip information.
10. A semiconductor memory burn-in test development method based on the semiconductor memory burn-in test system according to any one of claims 1 to 8, characterized in that the semiconductor memory burn-in test development method comprises:
when testing requirement change of a semiconductor memory to be tested is detected, determining a corresponding plug-in module function code according to a requirement change parameter corresponding to the testing requirement;
selecting a corresponding plug-in module according to the plug-in module function code for development, and calling the developed plug-in module to realize the corresponding plug-in module function;
and defining a plug-in calling interface according to the functions of the plug-in modules, and dynamically loading the plug-in modules and calling the plug-in calling interface when a plug-in loading instruction is received.
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