CN111747377A - Low-stress silicon-based thick film based on silicon on insulator and preparation method thereof - Google Patents

Low-stress silicon-based thick film based on silicon on insulator and preparation method thereof Download PDF

Info

Publication number
CN111747377A
CN111747377A CN202010705386.1A CN202010705386A CN111747377A CN 111747377 A CN111747377 A CN 111747377A CN 202010705386 A CN202010705386 A CN 202010705386A CN 111747377 A CN111747377 A CN 111747377A
Authority
CN
China
Prior art keywords
silicon
layer
thick film
stress
low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202010705386.1A
Other languages
Chinese (zh)
Inventor
方青
胡鹤鸣
邵瑶
张馨丹
顾苗苗
陈华
陈晓峰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
China Online Shanghai Energy Internet Research Institute Co ltd
Harbin Zhongda Electronic Co Ltd
Kunming University of Science and Technology
Original Assignee
China Online Shanghai Energy Internet Research Institute Co ltd
Harbin Zhongda Electronic Co Ltd
Kunming University of Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by China Online Shanghai Energy Internet Research Institute Co ltd, Harbin Zhongda Electronic Co Ltd, Kunming University of Science and Technology filed Critical China Online Shanghai Energy Internet Research Institute Co ltd
Priority to CN202010705386.1A priority Critical patent/CN111747377A/en
Publication of CN111747377A publication Critical patent/CN111747377A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
    • B81C1/00119—Arrangement of basic structures like cavities or channels, e.g. suitable for microfluidic systems
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00349—Creating layers of material on a substrate
    • B81C1/00365—Creating layers of material on a substrate having low tensile stress between layers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
    • B81C1/00523—Etching material
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00642—Manufacture or treatment of devices or systems in or on a substrate for improving the physical properties of a device
    • B81C1/0065—Mechanical properties
    • B81C1/00666—Treatments for controlling internal stress or strain in MEMS structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Dispersion Chemistry (AREA)
  • Analytical Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Inorganic Chemistry (AREA)
  • Mechanical Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

The invention discloses a low-stress silicon-based thick film based on silicon on an insulator and a preparation method thereof, belonging to the technical field of semiconductor preparation. The low-stress silicon-based thick film comprises a substrate silicon layer, a silicon oxide layer, a coating layer and a silicon-based thick film layer, wherein the silicon oxide layer is arranged on the substrate silicon layer, the silicon-based thick film layer is deposited on the silicon oxide layer, a grid-shaped groove is arranged on the silicon-based thick film layer, the silicon-based thin film is divided into a plurality of independent units by the grid-shaped groove, and the coating layer is filled in the grid-shaped groove; the silicon-based thick film can improve the condition of uneven stress borne by the inside of the thick film, reduce the stress of the thick film, increase the maximum thickness of the deposited thick film and realize the large-scale production of devices.

Description

Low-stress silicon-based thick film based on silicon on insulator and preparation method thereof
Technical Field
The invention relates to a low-stress silicon-based thick film based on silicon on an insulator and a preparation method thereof, belonging to the technical field of semiconductor preparation.
Background
Silicon-On-Insulator (SOI) technology is widely used in the fields of satellites, electronics, computers, aerospace, and the like because of its characteristics of low power consumption, high speed, small parasitic capacitance, and strong radiation resistance.
The deposited film layers can be classified into thick films and thin films according to the thickness of the device layer. Thick film generally refers to device layers greater than 1 μm thick, primarily for use in micro-electromechanical systems (MEMS) and power devices; the thin film is a device layer with the thickness of 0.1-1 μm and is mainly used for submicron integrated circuits such as Complementary Metal Oxide Semiconductors (CMOS).
In recent years, with the rapid development of MEMS and smart power device markets, silicon-based thick film materials have attracted extensive attention in the industry. However, the residual stress in the thick film prepared by the conventional method is determined by the structure and defects of the thick film and the difference in physical properties between the thick film and the substrate, and the film structure is cracked due to excessive tensile residual stress (tensile stress), and the wafer is expanded or warped due to excessive compressive residual stress (compressive stress). Both of these conditions increase process difficulties and may cause device failure.
Disclosure of Invention
Aiming at the problems and the defects of the prior art, the invention aims to overcome the defects that the residual stress of the prepared film is too large, so that the micro device unit and even the whole device structure are deformed, unstable, misconducted by signals, even system failure and the like, and provides a low-stress silicon-based thick film based on silicon on an insulator, wherein the film has good insulativity, stability and mechanical property.
The purpose of the invention is realized by the following scheme: the low-stress silicon-based thick film based on silicon on an insulator comprises a substrate silicon layer, a silicon oxide layer, a coating layer and a silicon-based thick film layer, wherein the silicon oxide layer grows on the substrate silicon layer, the silicon-based thick film layer is deposited on the silicon oxide layer, a latticed groove is formed in the silicon-based thick film layer and divides the silicon-based thin film into a plurality of independent units, and the coating layer is filled in the latticed groove.
Preferably, the thickness of the silicon-based thick film layer is more than 1 micron, and the thickness of the silicon oxide layer is 2-3 microns.
Preferably, the size of the independent units of the invention is 5-25mm × 5-32 mm; the width of the groove is 180-220 nm, and the length of the groove spans the whole substrate.
Another objective of the present invention is to provide a method for preparing a low stress silicon-based thick film based on silicon on insulator, which has a simple process, and specifically comprises the following steps:
(1) generating a silicon oxide layer on a silicon substrate, then depositing a silicon-based film layer, etching the silicon-based film layer along the x direction at intervals of 5-25mm to generate a groove, etching the silicon-based film layer along the y direction at intervals of 5-32mm to generate a groove, removing the photoresist, cleaning and then reserving for later use.
(2) Depositing a low-stress coating layer above the film, wherein the thickness of the coating layer material is higher than that of the silicon-based film material; and filling the groove with a low-stress cladding layer material.
(3) And removing the coating material on the silicon-based thin film layer by polishing through a reverse coating etching process and a chemical mechanical planarization process, and reserving the coating material of the groove to obtain a flat upper surface.
(4) Repeating the steps (1), (2) and (3) for a plurality of times to enable the thickness of the silicon substrate film to reach more than 1 mu m and keep the low warping degree of the wafer.
Preferably, the thick film material of the invention comprises SiN and Si3N4、SiN2、Si(OH)4Or polysilicon, other satisfactory film materials may also be used in the present invention.
Preferably, the trench filling material is SiO2Or SiON, other satisfactory low stress fill materials may also be used in the present invention.
The invention has the beneficial effects that:
(1) the invention is an effective improvement to the present preparation method of the silicon-based thick film with large stress, through increasing the technology of etching the ditch groove and filling the low stress cladding layer material in the course of depositing, divide the original continuous silicon-based thick film deposition into several stages of preparing the low stress film repeatedly, each stage needs to etch the ditch groove after depositing the film and divide the silicon-based thin film into several independent units, then deposit the cladding layer material of the low stress in the ditch groove, after each stage repeats in order, reach the necessary thickness finally, in this way, on one hand, can improve the situation that the stress is inhomogeneous in the thick film in the course of depositing, reduce the thick film stress; on the other hand, the reduction in stress increases the maximum thickness of the deposited thick film.
(2) The invention releases stress by a method of forming the groove, reduces the stress accumulation of the thick film and increases the maximum thickness of the thick film which can be deposited; meanwhile, all the processes in the invention are completely compatible with the current CMOS process, can realize large-scale mass production of devices, and is beneficial to promoting the wide application of silicon photonic integrated devices.
Drawings
FIG. 1 is a schematic layer structure of a low stress silicon-based thick film prepared by the present invention.
Fig. 2 is a top view of a thick film prepared according to the present invention.
FIG. 3 is a schematic flow chart of the thick film prepared by the present invention.
FIG. 4 is a process flow diagram of the preparation process described in example 1.
In fig. 1: 1-a substrate silicon layer; a 2-silicon oxide layer; 3-coating layer; 4-silicon-based thick film layer.
Detailed Description
The following describes the embodiments of the present invention with reference to the examples; the following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present invention is not limited thereby.
Example 1
The low-stress silicon-based thick film based on silicon on an insulator comprises a substrate silicon layer, a silicon oxide layer, a coating layer and a silicon-based thick film layer, wherein the silicon oxide layer is arranged on the substrate silicon layer, the silicon-based thick film layer is deposited on the silicon oxide layer, a grid-shaped groove is arranged on the silicon-based thick film layer, the silicon-based thin film is divided into a plurality of independent units by the grid-shaped groove, and the coating layer is filled in the grid-shaped groove; the thickness of the silicon oxide layer was 2 μm; the individual cells were 32mm 25mm in size.
The preparation method of the low-stress silicon-based thick film based on silicon on an insulator specifically comprises the following steps:
(1) providing a silicon wafer with the thickness of 750 microns as a substrate, wherein the surface of the substrate is provided with a silicon dioxide layer grown by thermal oxidation, the thickness of the silicon dioxide layer is 2 microns, and cleaning the semiconductor substrate and the silicon dioxide film by adopting a cleaning agent containing alkaline solution.
(2) Depositing a layer of Si with the thickness of 500 nanometers on the substrate pretreated in the step (1) by PECVD equipment3N4A thin film layer; in this embodiment, the silicon-based thick film material is deposited by a plasma enhanced chemical vapor deposition method, or any suitable deposition process, which is conventional, but not limited thereto.
(3) Etching grooves with the width of 200nm and the length spanning the whole substrate at equal intervals along the longitudinal direction and the transverse direction by an etching process, and etching Si3N4The film is divided into a plurality of 32mm 25mm film blocks.
(4) After photoresist is removed and cleaned, a PECVD deposition method is used for carrying out secondary deposition, and a low-stress silicon dioxide layer with the thickness of 800 nanometers is deposited.
(5) By reverse etching of SiO2The coating layer exposes Si coated with the silicon dioxide layer3N4After the film is formed, obtaining a flat upper surface through a chemical mechanical planarization process; then, the steps (2) to (5) were repeated 2 times to obtain Si with a thickness of 1 μm3N4And the film is used for keeping the wafer warping degree low.
In a semiconductor manufacturing process, the stress magnitude of a wafer can be represented by the bending degree of the wafer; when the bending radius of the wafer is smaller than a certain value (generally 50 meters), the wafer cannot be normally processed in the machine; in this example, the original 8 inch Si wafer (thickness 725um) has a bend radius of 270 + -30 meters. Directly depositing 10um silicon dioxide on an original 8-inch Si wafer (thickness 725um) by a conventional method, wherein the bending radius is 30 +/-5 meters; on an original 8 inch Si wafer (thickness 725um), 10um silicon dioxide was deposited by the scheme of example 1 with a bend radius of 150 ± 20 meters; it can also be seen that the invention relieves stress by forming the trench, reduces thick film stress accumulation, and increases the maximum thickness of the thick film that can be deposited.
Example 2
The low-stress silicon-based thick film based on silicon on an insulator comprises a substrate silicon layer, a silicon oxide layer, a coating layer and a silicon-based thick film layer, wherein the silicon oxide layer is arranged on the substrate silicon layer, the silicon-based thick film layer is deposited on the silicon oxide layer, a grid-shaped groove is arranged on the silicon-based thick film layer, the silicon-based thin film is divided into a plurality of independent units by the grid-shaped groove, and the coating layer is filled in the grid-shaped groove; the thickness of the silicon oxide layer was 2 μm; the individual cells were 25mm by 30mm in size.
The method for preparing the silicon-based thick film in the embodiment is as in embodiment 1, wherein the difference from embodiment 1 is as follows: the low-stress cladding layer material is SiON.
Example 3
The low-stress silicon-based thick film based on silicon on an insulator comprises a substrate silicon layer, a silicon oxide layer, a coating layer and a silicon-based thick film layer, wherein the silicon oxide layer is arranged on the substrate silicon layer, the silicon-based thick film layer is deposited on the silicon oxide layer, a grid-shaped groove is arranged on the silicon-based thick film layer, the silicon-based thin film is divided into a plurality of independent units by the grid-shaped groove, and the coating layer is filled in the grid-shaped groove; the thickness of the silicon oxide layer was 2 μm; the individual cells are 5mm by 5mm in size.
The method for preparing the silicon-based thick film in the embodiment is as in embodiment 1, wherein the difference from embodiment 1 is as follows: the repetition times of the steps (2) to (5) are 4, and Si with the thickness of 2 microns is obtained3N4A film.
Example 4
The method for preparing the silicon-based thick film in the embodiment is as in embodiment 1, wherein the difference from embodiment 1 is as follows: the deposited silicon-based material is a polysilicon material.
Example 5
In a semiconductor manufacturing process, the stress magnitude of a wafer can be represented by the bending degree of the wafer; when the bending radius of the wafer is smaller than a certain value (generally 50 meters), the wafer cannot be normally processed in the machine; in this example, the original 8 inch Si wafer (thickness 725um) has a bend radius of 270 + -30 meters. Directly depositing 10um silicon dioxide on an original 8-inch Si wafer (thickness 725um) by a conventional method, wherein the bending radius is 30 +/-5 meters; on an original 8 inch Si wafer (thickness 725um), 10um silicon dioxide was deposited by the scheme of example 1 with a bend radius of 150 ± 20 meters; it can also be seen that the invention relieves stress by forming the trench, reduces thick film stress accumulation, and increases the maximum thickness of the thick film that can be deposited.

Claims (6)

1. A low stress silicon-based thick film based on silicon on insulator, characterized in that: the silicon-based thin film solar cell comprises a substrate silicon layer, a silicon-based oxide layer, a coating layer and a silicon-based thick film layer, wherein the silicon-based oxide layer grows on the substrate silicon layer, the silicon-based thick film layer is deposited on the silicon-based oxide layer, a latticed groove is formed in the silicon-based thick film layer and divides the silicon-based thin film into a plurality of independent units, and the coating layer is filled in the latticed groove.
2. The silicon-on-insulator based low stress thick silicon-based film of claim 1, wherein: the thickness of the silicon-based thick film layer is more than 1 micron, and the thickness of the silicon oxide layer is 2-3 microns.
3. The silicon-on-insulator based low stress thick silicon-based film of claim 1, wherein: the size of each independent unit is 5-25mm multiplied by 5-32 mm; the width of the groove is 180-220 nm, and the length of the groove spans the whole substrate.
4. The method for preparing the low-stress silicon-based thick film based on silicon on insulator as claimed in any one of claims 1 to 3, comprising the following steps:
(1) forming a silicon oxide layer on a silicon substrate, depositing a silicon-based thin film layer, etching the silicon-based thin film layer along the x direction at intervals of 5-25mm to generate a groove, etching the silicon-based thin film layer along the y direction at intervals of 5-32mm to generate a groove, removing the photoresist, cleaning and reserving the silicon-based thin film layer for later use;
(2) depositing a low-stress coating layer above the film, wherein the thickness of the coating layer material is higher than that of the silicon-based film material; filling the groove with a low-stress cladding layer material;
(3) removing the coating material on the silicon-based thin film layer by polishing through a reverse coating etching process and a chemical mechanical planarization process, and reserving the coating material of the groove to obtain a flat upper surface;
(4) repeating the steps (1), (2) and (3) for a plurality of times to enable the thickness of the silicon substrate film to reach more than 1 mu m and keep the low warping degree of the wafer.
5. The method for preparing a low stress silicon-based thick film based on silicon on insulator as claimed in claim 4, wherein: the thick film material comprises the components of SiN and Si3N4、SiN2、Si(OH)4Or polysilicon.
6. Root of herbaceous plantThe method of claim 4, wherein the silicon-on-insulator based low stress silicon-based thick film is prepared by: the groove filling material is SiO2Or SiON.
CN202010705386.1A 2020-07-21 2020-07-21 Low-stress silicon-based thick film based on silicon on insulator and preparation method thereof Pending CN111747377A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010705386.1A CN111747377A (en) 2020-07-21 2020-07-21 Low-stress silicon-based thick film based on silicon on insulator and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010705386.1A CN111747377A (en) 2020-07-21 2020-07-21 Low-stress silicon-based thick film based on silicon on insulator and preparation method thereof

Publications (1)

Publication Number Publication Date
CN111747377A true CN111747377A (en) 2020-10-09

Family

ID=72710108

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010705386.1A Pending CN111747377A (en) 2020-07-21 2020-07-21 Low-stress silicon-based thick film based on silicon on insulator and preparation method thereof

Country Status (1)

Country Link
CN (1) CN111747377A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113034483A (en) * 2021-04-07 2021-06-25 昆明理工大学 Cigarette defect detection method based on deep migration learning

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113034483A (en) * 2021-04-07 2021-06-25 昆明理工大学 Cigarette defect detection method based on deep migration learning
CN113034483B (en) * 2021-04-07 2022-06-10 昆明理工大学 Cigarette defect detection method based on deep migration learning

Similar Documents

Publication Publication Date Title
US8193069B2 (en) Stacked structure and production method thereof
TW201130731A (en) silicon nanostructures and method for producing the same and application thereof
CN1930671A (en) Tri-gate transistors and methods to fabricate same
CN106044701B (en) Method for producing a microelectromechanical structure in a layer sequence and corresponding electronic component having a microelectromechanical structure
CN112285827B (en) Preparation method of multilayer silicon photonic device
CN103663357B (en) The lithographic method of silicon
CN111747377A (en) Low-stress silicon-based thick film based on silicon on insulator and preparation method thereof
CN110441860B (en) Grooving preparation method for thick film silicon nitride waveguide
US7514282B2 (en) Patterned silicon submicron tubes
JP2010517259A (en) Roughening treatment method
US20110146791A1 (en) Epitaxial growth of silicon for layer transfer
CN212609552U (en) Low-stress silicon-based thick film based on silicon on insulator
US20230075685A1 (en) Method for manufacturing a film on a flexible sheet
US20220301923A1 (en) Method for manufacturing a film on a support having a non-flat surface
CN108463431A (en) Method for manufacturing multilayer MEMS component and corresponding multilayer MEMS component
CN110752218A (en) Multilayer SOI and preparation method thereof
TWI717491B (en) Method for manufacturing a structure for forming a tridimensional monolithic integrated circuit
WO2011012036A1 (en) Micro-scale grid made of single-crystal silicon and method of manufancturing the same
CN108807170A (en) A kind of production method of nano wire
CN112680715B (en) Growth method of silicon nitride film and preparation method of thick film silicon nitride waveguide device
EP2109582A1 (en) Process for forming and controlling rough interfaces
CN107473178A (en) A kind of MEMS wet-etching technology
CN116169023A (en) Step metal structure and preparation method of silicon photonic device structure
US9275888B2 (en) Temporary substrate, transfer method and production method
Kumaresan et al. Technologies for realisation of ultra-thin chips

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination