CN111708540A - Variable parameter function analysis method, analyzer and storage device - Google Patents

Variable parameter function analysis method, analyzer and storage device Download PDF

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CN111708540A
CN111708540A CN202010364978.1A CN202010364978A CN111708540A CN 111708540 A CN111708540 A CN 111708540A CN 202010364978 A CN202010364978 A CN 202010364978A CN 111708540 A CN111708540 A CN 111708540A
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function
embedded
parameter
operator
operation queue
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CN111708540B (en
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许贝贝
宋智文
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Beijing Peking Technology Co ltd
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Beijing Peking Technology Co ltd
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    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
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    • G06F8/40Transformation of program code
    • G06F8/41Compilation
    • G06F8/42Syntactic analysis
    • G06F8/427Parsing

Abstract

The invention provides a variable parameter function analysis method, an analyzer and a storage device. The method comprises the following steps: acquiring an expression of a variable parameter function and description information of an embedded function in the variable parameter function, analyzing the expression of the variable parameter function, sequentially reading elements in the expression, analyzing the embedded function according to the function name, a parameter delimiter and the description information of the embedded function if the elements are the function name of the embedded function, acquiring an execution result of the embedded function, and putting the execution result into an operation queue as an operand; if the element is an operator, pushing the operator into an operator stack; and after the execution results of all embedded functions adjacent to the operator are placed in an operation queue, the operator is popped from the operator stack, and the popped operator is inserted into the operation queue. Through the mode, the problem that the number of the actual parameters cannot be determined can be solved, and therefore the function resolver supports the variable parameter function.

Description

Variable parameter function analysis method, analyzer and storage device
Technical Field
The present disclosure relates to the field of computer technologies, and in particular, to a method and an apparatus for variable parameter function analysis.
Background
In the implementation of an interpreter, one of the most important steps is to convert a infix expression into a prefix expression or a suffix expression for computer processing. In the function resolver realized based on the scheduling field algorithm, for the function with fixed parameters, the parameter boundary can be determined according to the number. When the number of the function parameters is uncertain, additional boundary information needs to be provided.
The existing technical scheme can not determine the actual parameter number of the variable parameter function, different function names need to be provided for function interfaces with the same function and different parameter numbers, the unity of the function names is violated, and the use of the function by a user is lack of flexibility.
Disclosure of Invention
The application provides a variable parameter function analysis method, an analyzer and a storage device, which can solve the problem that the number of actual parameters cannot be determined, thereby realizing the support of the variable parameter function by the function analyzer.
In order to solve the technical problem, the application adopts a technical scheme that: a parameter-varying function analysis method is provided, which comprises the following steps:
acquiring an expression of a variable parameter function and description information of an embedded function in the variable parameter function, wherein the expression comprises a function name of the embedded function, a parameter delimiter of the embedded function and an operator between the embedded functions, the parameter delimiter is adjacent to the function name and is used for indicating real parameters of the embedded function, the description information of the embedded function comprises the minimum parameter number and the maximum parameter number of the embedded function, and the variable parameter function comprises at least two embedded functions;
analyzing the expression of the variable parameter function, reading the elements in the expression in sequence,
if the element is the function name of the embedded function, analyzing the embedded function according to the function name, the parameter delimiter and the description information of the embedded function, acquiring the execution result of the embedded function, and putting the execution result into an operation queue as an operand;
if the element is an operational character, pushing the operational character into an operational character stack;
and after the execution results of all embedded functions adjacent to the operator are placed in an operation queue, the operator is popped from the operator stack, and the popped operator is inserted into the operation queue.
In order to solve the above technical problem, another technical solution adopted by the present application is: provided is a parameter-varying function analysis device including:
the variable parameter function comprises a function name of the embedded function, a parameter delimiter of the embedded function and an operator between the embedded functions, the parameter delimiter is adjacent to the function name and used for indicating real parameters of the embedded function, the description information of the embedded function comprises the number of the minimum parameters and the number of the maximum parameters of the embedded function, and the variable parameter function comprises at least two embedded functions.
The function analysis module is used for analyzing the expression of the variable parameter function, reading elements in the expression in sequence, analyzing the embedded function according to the function name, the parameter delimiter and the description information of the embedded function if the elements are the function name of the embedded function, acquiring the execution result of the embedded function, and putting the execution result into an operation queue as an operand; and if the element is an operator, pushing the operator to an operator stack.
And the function output module is used for popping the operational character from the operational character stack and inserting the popped operational character into the operation queue after the execution results of all the embedded functions adjacent to the operational character are put into the operation queue.
In order to solve the above technical problem, another technical solution adopted by the present application is: providing a argument function resolver, which comprises a processor, and a memory coupled with the processor, wherein the memory stores program instructions for implementing the argument function resolver method; the processor is to execute the program instructions stored by the memory to parse the argument function.
In order to solve the above technical problem, the present application adopts another technical solution that: a storage device is provided for storing a program file capable of implementing the parameter varying function analysis method.
The beneficial effect of this application is: the variable parameter function analysis method, the variable parameter function analyzer and the storage device analyze the embedded function according to the function name, the parameter delimiter and the description information of the embedded function to obtain the execution result of the embedded function, the execution result is used as an operand and is put into an operation queue, the operator is pressed into an operator stack, after the execution results of all the embedded functions adjacent to the operator are put into the operation queue, the operator is popped from the operator stack, and the popped operator is inserted into the operation queue to complete the analysis of the variable parameter function.
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FIG. 1 is a schematic flow chart of a parameter-varying function analysis method according to a first embodiment of the present application;
FIG. 2 is an exemplary diagram of a method of argument function parsing in accordance with an embodiment of the present application;
FIG. 3 is a schematic structural diagram of a parameter-varying function analysis apparatus according to an embodiment of the present application;
FIG. 4 is a schematic structural diagram of a argument function parser of an embodiment of the present application;
fig. 5 is a schematic structural diagram of a memory device according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terms "first", "second" and "third" in this application are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any indication of the number of technical features indicated. Thus, a feature defined as "first," "second," or "third" may explicitly or implicitly include at least one of the feature. In the description of the present application, "plurality" means at least two, e.g., two, three, etc., unless explicitly specifically limited otherwise. All directional indications (such as up, down, left, right, front, and rear … …) in the embodiments of the present application are only used to explain the relative positional relationship between the components, the movement, and the like in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indication is changed accordingly. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
For the convenience of understanding, the argument functions and their analyses are described first, the argument functions can be operated with at least M parameters and at most N parameters (M < ═ N), and in the implementation of the interpreter, one of the most important steps is to convert the prefix expression or the suffix expression from the prefix expression to the suffix expression for computer processing. When using the hunting-yard Algorithm to convert the infix expression into the suffix expression (i.e. the inverse wave-blue expression), the integer values of the parameter number pc of the variable parameter function in the interval of [ M, N ] can be correctly analyzed, and in the function analyzer implemented based on the scheduling field Algorithm, the boundary of the parameter can be determined according to the number of the fixed parameter functions. When the number of the function parameters is uncertain, boundary information needs to be additionally provided, in one embodiment, function analysis firstly needs to add boundary marks to a variable parameter function, the boundary marks are firstly inserted into a queue, then the queue is inserted according to a function analysis algorithm, function parameters are obtained according to the parameter boundary values during function analysis, a result of an execution function is obtained, and the result is used as an operand and is stacked to obtain a standard scheduling field algorithm expression. When the variable parameter function parameters are not fixed, the method needs to rely on the input of a user, different function names need to be provided for functions with the same function and different parameter numbers, the uniformity of the function names is violated, and the user can lack flexibility in using the functions. Therefore, the variable parameter function analysis method provided by the invention can well solve the problem that the number of actual parameters cannot be determined, thereby realizing the support of the variable parameter function by the function analyzer.
Referring to fig. 1, fig. 1 is a schematic flow chart illustrating a parameter-varying function analysis method according to a first embodiment of the present invention. It should be noted that the method of the present invention is not limited to the flow sequence shown in fig. 1 if the results are substantially the same. As shown in fig. 1, the method comprises the steps of:
step S101: the method comprises the steps of obtaining an expression of a variable parameter function and description information of an embedded function in the variable parameter function, wherein the expression comprises a function name of the embedded function, a parameter delimiter of the embedded function and an operator character among the embedded functions, the parameter delimiter is adjacent to the function name and used for indicating real parameters of the embedded function, the description information of the embedded function comprises the minimum parameter number and the maximum parameter number of the embedded function, and the variable parameter function comprises at least two embedded functions.
It should be noted that, in the field of computer science, the scheduling field algorithm is a method for resolving mathematical expressions, especially infix expressions. The algorithm can output a character string of a suffix notation method and also can output an abstract syntax tree structure, the algorithm is named as a dispatching field algorithm, because the operation of the algorithm is similar to that of a railway dispatching field, the function expression is similar to that of a train on a railway, each carriage is an embedded function, the connection between the carriages is an operator, the dispatching field algorithm dispatches the embedded function to an output queue, the operator is dispatched to an operator stack, and the suffix expression which is finally analyzed and completed is respectively extracted and output from the output queue and the operator stack according to a certain rule during final output.
In step S101, before analyzing a variable parameter function, an expression of the variable parameter function needs to be obtained, where the expression of the variable parameter function includes a function name of an embedded function in the variable parameter function, a parameter delimiter and an operator between the embedded functions, the parameter delimiter is adjacent to the function name and is used to indicate an actual parameter of the embedded function, and the operator is used to indicate an operation relationship between the embedded functions. In this embodiment, the function name of the embedded function may have the same function name as the variable parameter function, and the parameter delimiters of the plurality of embedded functions may also be the same.
Further, it is also required to obtain description information of an embedded function in the variable parameter function, where the description information of the embedded function may include the minimum parameter number and the maximum parameter number of the embedded function, and in this embodiment, the variable parameter function includes at least two embedded functions, for example: the obtained expression of the variable parameter function comprises three embedded functions with the same function name, namely a first embedded function, a second embedded function and a third embedded function, a first operator is arranged between the first inline function and the second inline function, a second operator is arranged between the second inline function and the third inline function, the description information of the inline functions is the minimum parameter number 1 and the maximum parameter number 3, and the parameter delimiters of the first embedded function, the second embedded function and the third embedded function are the same, if both are the symbol "(", the parameter decomposer of the first inline function indicates that the real parameter of the first inline function is the first parameter, the parameter decomposer of the second inline function indicates that the parameter of the second inline function is a second parameter, the parameter decomposer of the third inline function indicates that the parameter of the third inline function is a third parameter.
Step S102: analyzing the expression of the variable parameter function, reading elements in the expression in sequence, executing step S103 if the elements are the function names of the embedded functions, and executing step S104 if the elements are the operators.
It should be noted that, after obtaining the expression of the variable parameter function, parsing is performed according to a certain reading sequence, and in the parsing process, elements in the expression of the variable parameter function are sequentially determined, where the elements may include two types: function names and operators of inline functions.
Step S103: analyzing the embedded function according to the function name, the parameter delimiters and the description information of the embedded function, acquiring the execution result of the embedded function, and putting the execution result into an operation queue as an operand.
In step S103, if the expression of the variable parameter function is analyzed, the currently obtained element is a function name of an embedded function, in this embodiment, the parameter delimiter is first placed in an operation queue; after the parameter delimiters are placed in an operation queue, determining parameters of the embedded function according to the parameter delimiters, and judging whether the number of the parameters is larger than or equal to the minimum parameter number and smaller than or equal to the maximum parameter number; and if so, sequentially putting the parameters and the function names of the embedded functions into an operation queue.
Still by way of example in the above steps, the currently obtained element is a function name of an embedded function, and if the currently obtained element is a function name of the first embedded function, the parameter delimiter "(" is placed in an operation queue) of the first embedded function, and whether the number of the first parameters of the first embedded function determined by the parameter delimiter is greater than or equal to the minimum parameter number 1 and less than or equal to the maximum parameter number 3 is determined, and if the number of the parameters in the first parameters is 1, the first parameters and the function name of the first embedded function are sequentially placed in the parameter delimiter "(" in the operation queue.
In another embodiment, determining the parameters of the embedded function from the parameter delimiters may also determine elements read between two reads to a parameter delimiter as parameters of the embedded function.
Further, obtaining an execution result of the embedded function, placing the execution result as an operand into an operation queue to obtain a value of a parameter of the embedded function, calling the embedded function, performing operation to obtain the execution result, as described above, substituting the first parameter into the first embedded function to perform calculation to obtain a first result, and placing the first result as the operand into the operation queue. The analyzing process of each embedded function is the same, when the obtained element is the function name of the embedded function, the embedded function is analyzed into a parameter delimiter, an actual parameter of the embedded function and an execution result of the embedded function, and the parameter delimiter, the actual parameter of the embedded function and the execution result of the embedded function are used as operands and are placed in an operation queue.
It should be noted that, in step S103, the number of arguments of different inline functions may be different, for example: the number of the first parameters of the first inline function may be 1, the number of the second parameters of the second inline function may be 2, and the number of the third parameters of the third inline function may be 3, where the third parameters may include the second parameters or the first parameters, and the second parameters may include the first parameters.
Step S104: and pushing the operator to an operator stack.
In step S104, if the expression of the argument function is analyzed, the currently acquired element is an operator. The operator is pushed to the operator stack. After the first inline function is analyzed, the first operator after the first inline function is acquired, and the operator is pressed into the operator stack.
Further, after the operator is pushed into the operator stack, the operand corresponding to the embedded function which is adjacent to the operator and the execution result of which is put into the operation queue is inserted into the output queue.
Step S105: and after the execution results of all embedded functions adjacent to the operator are placed in an operation queue, the operator is popped from the operator stack, and the popped operator is inserted into the operation queue.
In this embodiment, after the analysis results of all the embedded functions adjacent to the operator are placed in the operation queue, and after the execution result is calculated according to the parameters of the embedded functions, when the output queue outputs the analysis results of the embedded functions, the operator is pushed off the operator stack, the pushed-off operator is inserted into the operation queue, and then the analysis results are sequentially output.
Still by way of example, after the first parameter is substituted into the first inline function to calculate a first result, and the first operator is pressed into the operator stack, the second inline function is analyzed by a method for analyzing the first inline function, and the second parameter of the second inline function is substituted into the calculation to obtain a second result and put into the output queue, the first operator is popped up and output to the output queue, then the second operator between the second inline function and the third inline function is obtained in the process of continuing the analysis, the second operator is pressed into the operator stack, then the third inline function is obtained by continuing the analysis, the third inline function is still analyzed by the method, the third result of the third inline function is output to the output queue, the second operator pop-up is added to the output queue, and after the analysis of all the inline functions of the variable parameter function is completed, and outputting analysis results in sequence.
Referring to fig. 2, fig. 2 is a diagram illustrating an exemplary method for analyzing a parameter-varying function according to an embodiment of the invention. The argument function analysis method is described below with reference to specific examples, for example: the variable parameter function FuncA, where the description information of the function FuncA indicates that the function includes at least one parameter, and at most three parameters may be used, that is, M is 1, N is 3, the actual parameters of the function are denoted by a1, a2, and a3, and the actual parameters differ among the functions, where a1, a2, and a3 are only placeholders, and funclaesult is a uniform placeholder for the execution result of the function. Analyzing an expression: FuncA (a1) -FuncA (a1, a2) + FunctA (a1, a2, a3), the specific process is as follows:
(a) inputting an analytical expression FuncA (a1) -FuncA (a1, a2) + FunctA (a1, a2, a3), wherein FuncA (a1) is a first inline function, FuncA (a1, a2) is a second inline function, FunctA (a1, a2, a3) is a third inline function, "-" is a first operator located between the first and second inline functions, and "+" is a second operator located between the second and third inline functions, and inserting the first inline function FuncA (a1) into an operation queue;
(b) parsing the first inline function FuncA (a1) into a first parameter delimiter "(", a first parameter "a 1", a first function name FuncA;
(c) pushing the first operator "-" into an operator stack;
(d) obtaining a first execution result FuncAResult by combining the description information of the embedded function of the first embedded function, and inserting the second embedded function FuncA (a1, a2) into an output queue;
(e) parsing the second inline function FuncA (a1, a2) into a second parameter delimiter "(", a second parameter "a 1, a 2", a second function name FuncA;
(f) obtaining a second execution result FuncAResult by combining the description information of the embedded function of the second embedded function;
(g) popping a first operator "-" in the operator stack;
(h) pushing the second operator "+" into an operator stack;
(i) inserting the third inline function FunctA (a1, a2, a3) into an operation queue;
(j) parsing the third inline function FunctA (a1, a2, a3) into a third parameter delimiter "(", a third parameter "a 1, a2, a 3", a third function name FuncA;
(k) obtaining a third execution result FuncAResult by combining the description information of the embedded function of the second embedded function;
(l) Popping a second operator "+" in the operator stack;
(m) outputting the first execution result, the second execution result, the third execution result, the first operator and the second operator which are sequentially arranged from one side, namely, outputting the analysis formula of the variable parameter function.
The variable parameter function analysis method comprises the steps of analyzing the embedded function according to the function name, the parameter delimiter and the description information of the embedded function, obtaining the execution result of the embedded function, placing the execution result as an operand into an operation queue, pressing the operational character into an operational character stack, popping the operational character from the operational character stack after the execution results of all the embedded functions adjacent to the operational character are placed into the operation queue, inserting the popped operational character into the operation queue, and completing analysis of the variable parameter function.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a parameter-varying function analysis apparatus according to an embodiment of the present invention. As shown in fig. 3, the apparatus includes a function acquisition module 21, a function analysis module 22, and a function output module 23.
The function obtaining module 21 is configured to obtain an expression of a variable parameter function and description information of an embedded function in the variable parameter function, where the expression includes a function name of the embedded function, a parameter delimiter of the embedded function, and an operator between the embedded functions, the parameter delimiter is adjacent to the function name and is used to indicate real parameters of the embedded function, the description information of the embedded function includes the minimum parameter number and the maximum parameter number of the embedded function, and the variable parameter function includes at least two embedded functions.
The function analysis module 22 is configured to analyze the expression of the variable parameter function, sequentially read elements in the expression, analyze the embedded function according to the function name, the parameter delimiter and the description information of the embedded function if the element is the function name of the embedded function, obtain an execution result of the embedded function, and place the execution result as an operand in an operation queue; and if the element is an operator, pushing the operator to an operator stack.
Optionally, the function parsing module 22 may be further configured to put the parameter delimiter into an operation queue first; after the parameter delimiters are placed in an operation queue, determining parameters of the embedded function according to the parameter delimiters, and judging whether the number of the parameters is larger than or equal to the minimum parameter number and smaller than or equal to the maximum parameter number; and if so, sequentially putting the parameters and the function names of the embedded functions into an operation queue.
Optionally, the function parsing module 22 may be further configured to obtain a value of a parameter of the embedded function, call the embedded function, and perform an operation to obtain the execution result.
Optionally, the function parsing module 22 may be further configured to determine the element read between two times of reading the parameter delimiter as the parameter of the embedded function.
And the function output module 23 is configured to, after the execution results of all the embedded functions adjacent to the operator are placed in an operation queue, pull the operator from the operator stack, and insert the pulled operator into the operation queue.
Optionally, the function output module 23 may be further configured to insert, into the output queue, an operand corresponding to the inline function that is adjacent to the operator and in which the execution result is placed in the operation queue after the operator is pushed into the operator stack.
The variable parameter function analysis device analyzes the embedded function according to the function name, the parameter delimiter and the description information of the embedded function to obtain the execution result of the embedded function, the execution result is used as an operand and is put into an operation queue, the operational character is pressed into an operational character stack, after the execution results of all the embedded functions adjacent to the operational character are put into the operation queue, the operational character is popped from the operational character stack, the popped operational character is inserted into the operation queue to complete the analysis of the variable parameter function.
It can be understood that the specific manner for implementing each function by each module of the variable parameter function analyzing apparatus may refer to the specific steps corresponding to the above embodiments, and therefore, the detailed description thereof is omitted here.
Referring to fig. 4, fig. 4 is a schematic structural diagram of a argument function parser according to an embodiment of the present invention. As shown in fig. 4, the argument function parser 60 comprises a processor 61 and a memory 62 coupled to the processor 61.
The memory 62 stores program instructions for implementing the argument function parsing method described in any of the above embodiments.
The processor 61 is configured to execute program instructions stored in the memory 62 to perform the argument function.
The processor 61 may also be referred to as a CPU (Central Processing Unit). The processor 61 may be an integrated circuit chip having signal processing capabilities. The processor 61 may also be a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
Referring to fig. 5, fig. 5 is a schematic structural diagram of a memory device according to an embodiment of the invention. The storage device of the embodiment of the present invention stores a program file 71 capable of implementing all the parameter-varying function parsing methods, where the program file 71 may be stored in the storage device in the form of a software product, and includes several instructions to enable a computer device (which may be a personal computer, a server, or a network device) or a processor (processor) to execute all or part of the steps of the methods according to the embodiments of the present application. The aforementioned storage device includes: various media capable of storing program codes, such as a usb disk, a mobile hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, or terminal devices, such as a computer, a server, a mobile phone, and a tablet.
In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, a division of a unit is merely a logical division, and an actual implementation may have another division, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit. The above embodiments are merely examples and are not intended to limit the scope of the present disclosure, and all modifications, equivalents, and flow charts using the contents of the specification and drawings of the present disclosure or those directly or indirectly applied to other related technical fields are intended to be included in the scope of the present disclosure.

Claims (7)

1. A parameter-varying function analysis method is characterized by comprising the following steps:
acquiring an expression of a variable parameter function and description information of an embedded function in the variable parameter function, wherein the expression comprises a function name of the embedded function, a parameter delimiter of the embedded function and an operator between the embedded functions, the parameter delimiter is adjacent to the function name and is used for indicating real parameters of the embedded function, the description information of the embedded function comprises the minimum parameter number and the maximum parameter number of the embedded function, and the variable parameter function comprises at least two embedded functions;
analyzing the expression of the variable parameter function, reading the elements in the expression in sequence,
if the element is the function name of the embedded function, analyzing the embedded function according to the function name, the parameter delimiter and the description information of the embedded function, acquiring the execution result of the embedded function, and putting the execution result into an operation queue as an operand;
if the element is an operator, pushing the operator into an operator stack;
and after the execution results of all embedded functions adjacent to the operator are placed in an operation queue, the operator is popped from the operator stack, and the popped operator is inserted into the operation queue.
2. The argument function parsing method of claim 1, wherein said parsing said inline function based on a function name, a parameter delimiter and description information of said inline function, comprises:
firstly, putting the parameter delimiters into an operation queue;
after the parameter delimiters are placed in an operation queue, determining parameters of the embedded function according to the parameter delimiters, and judging whether the number of the parameters is larger than or equal to the minimum parameter number and smaller than or equal to the maximum parameter number;
and if so, sequentially putting the parameters and the function names of the embedded functions into an operation queue.
3. The method for argument function parsing of claim 2, wherein said determining parameters of said inline function from said parameter delimiter comprises:
and determining the read elements between two times of reading the parameter delimiters as the parameters of the embedded function.
4. The argument function parsing method of claim 2, wherein said obtaining an execution result of said inline function comprises:
and acquiring the value of the parameter of the embedded function, calling the embedded function, and calculating to obtain the execution result.
5. The argument function parsing method of any of claims 1 to 4, characterized by: after the operator is pushed into the operator stack, the operand which is adjacent to the operator and corresponds to the embedded function of which the execution result is put into the operation queue is inserted into an output queue.
6. A argument function parser, characterized by: the argument function parser comprises a processor, a memory coupled to the processor, wherein,
the memory stores program instructions for implementing the argument function parsing method of any of claims 1-5;
the processor is configured to execute the program instructions stored by the memory to implement the parsing of the variable parameter equations.
7. A storage device storing a program file for implementing the argument function analysis method according to any one of claims 1-5.
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