CN111695320B - Method for obtaining circuit directed graph based on traversing wire - Google Patents
Method for obtaining circuit directed graph based on traversing wire Download PDFInfo
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- CN111695320B CN111695320B CN202010544394.2A CN202010544394A CN111695320B CN 111695320 B CN111695320 B CN 111695320B CN 202010544394 A CN202010544394 A CN 202010544394A CN 111695320 B CN111695320 B CN 111695320B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/392—Floor-planning or layout, e.g. partitioning or placement
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
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Abstract
The invention discloses a method for obtaining a circuit directed graph based on a traversing wire, which comprises the following steps: step one, providing a required simulation circuit schematic diagram; step two, selecting any one wire in the simulation circuit schematic diagram obtained in the step one, counting the selected wire into a first-level node set, and judging a model connected with two ends of the selected wire; the method for acquiring the circuit directed graph based on the traversing wire is simple and easy to understand and easy to implement, greatly simplifies the complexity of the traditional manual extraction of the circuit directed graph, and provides an effective technical basis for circuit simulation software products.
Description
Technical Field
The invention belongs to the technical field of circuit directed graphs, and particularly relates to a method for acquiring a circuit directed graph based on a traversing wire.
Background
With the advent of integrated circuits, manual computing or simple computing tools are far from satisfactory, making computer applications more and more popular. The computer simulation has the characteristics of high efficiency, high precision, high reliability, low cost and the like, and larger errors brought by the analysis method in the approximation process can be avoided by the computer simulation method.
The core content of the circuit simulation software is to construct a directed graph model of the circuit, and the method is realized by adopting a circuit topology formula extraction method at present, wherein the method needs to manually draw a topological graph according to the circuit graph, analyze the serial-parallel connection relation of the circuit and establish a node association matrix, has large modeling workload and has certain difficulty in analyzing a complex circuit.
Therefore, it is necessary to study a modeling method to complete the conversion from the schematic diagram to the directed diagram to reduce the modeling workload.
Disclosure of Invention
The invention aims to provide a method for acquiring a circuit directed graph based on traversing wires, so as to solve the problems in the background art.
In order to achieve the above purpose, the present invention provides the following technical solutions: a method for obtaining a circuit directed graph based on traversing wires, comprising the steps of:
step one, providing a required simulation circuit schematic diagram;
step two, selecting any one wire in the simulation circuit schematic diagram obtained in the step one, counting the selected wire into a first-level node set, and judging the model connected with two ends of the selected wire to obtain the following three conditions:
in case 1, both ends of the selected wire are connected to the device,
in condition 2, both ends of the selected wire are connected with the wire,
in case 3, one end of the selected wire is connected to the element, the other end is connected to the wire,
judging the three conditions, wherein a primary node set is taken as a node in a condition 1, wires connected with the selected wires are counted into the primary node set in a condition 2 and a condition 3, a new set obtained by counting the wires connected with the selected wires into the primary node set in a condition 2 and a condition 3 is taken as a secondary node set, and the wires connected with the selected wires are taken as secondary wires;
judging the model connected with the other end of the secondary wire in the second step, and obtaining the following two conditions:
in condition 2-1, the other ends of the two secondary wires are connected with the wires,
in condition 2-2, the other end of one secondary wire is connected with the wire, the other end of the other secondary wire is connected with the element,
in case 3-1, the other end of the secondary wire is connected to the element,
in condition 3-2, the other end of the secondary wire is connected with the wire,
where condition 2-1 and condition 2-2 are two possible cases present in condition 2, condition 3-1 and condition 3-2 are two possible cases present in condition 3,
judging the four conditions, wherein the wires connected with the secondary wires are marked as three-level wires in the conditions 2-1, 2-2 and 3-2 and counted into a secondary node set, the wires connected with the secondary wires in the conditions 2-1, 2-2 and 3-2 are marked as three-level wires and counted into a new set after the secondary node set is counted into a three-level node set, and repeating the third step until the other end of the final wire is connected with the element, wherein the final node set is regarded as one node at the moment, and the secondary node set is regarded as a node in the condition 3-1;
traversing all wires in the simulation circuit schematic diagram according to the first step, the second step and the third step until all nodes in the simulation circuit schematic diagram are judged;
and fifthly, in the process of judging all the nodes in the simulation circuit schematic diagram in the step four, all the elements connected with the nodes can be obtained, each element is regarded as a branch, and the direction of each branch is customized, so that the circuit directed graph can be obtained.
Preferably, the node comprises all wire elements within the node set.
Compared with the prior art, the invention has the beneficial effects that: the method for acquiring the circuit directed graph based on the traversing wire is simple and easy to understand and easy to implement, greatly simplifies the complexity of the traditional manual extraction of the circuit directed graph, and provides an effective technical basis for circuit simulation software products.
Detailed Description
All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In the description of the present invention, it should also be noted that, unless explicitly specified and limited otherwise, the terms "disposed," "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; can be directly connected, can be indirectly connected through an intermediate medium, and can also be communicated with the inside of two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
The invention provides a technical scheme that: a method for obtaining a circuit directed graph based on traversing wires, comprising the steps of:
step one, providing a required simulation circuit schematic diagram;
step two, selecting any one wire in the simulation circuit schematic diagram obtained in the step one, counting the selected wire into a first-level node set, and judging the model connected with two ends of the selected wire to obtain the following three conditions:
in case 1, both ends of the selected wire are connected to the device,
in condition 2, both ends of the selected wire are connected with the wire,
in case 3, one end of the selected wire is connected to the element, the other end is connected to the wire,
judging the three conditions, wherein a primary node set is taken as a node in a condition 1, wires connected with the selected wires are counted into the primary node set in a condition 2 and a condition 3, a new set obtained by counting the wires connected with the selected wires into the primary node set in a condition 2 and a condition 3 is taken as a secondary node set, and the wires connected with the selected wires are taken as secondary wires;
judging the model connected with the other end of the secondary wire in the second step, and obtaining the following two conditions:
in condition 2-1, the other ends of the two secondary wires are connected with the wires,
in condition 2-2, the other end of one secondary wire is connected with the wire, the other end of the other secondary wire is connected with the element,
in case 3-1, the other end of the secondary wire is connected to the element,
in condition 3-2, the other end of the secondary wire is connected with the wire,
where condition 2-1 and condition 2-2 are two possible cases present in condition 2, condition 3-1 and condition 3-2 are two possible cases present in condition 3,
judging the four conditions, wherein the wires connected with the secondary wires are marked as three-level wires in the conditions 2-1, 2-2 and 3-2 and counted into a secondary node set, the wires connected with the secondary wires in the conditions 2-1, 2-2 and 3-2 are marked as three-level wires and counted into a new set after the secondary node set is counted into a three-level node set, and repeating the third step until the other end of the final wire is connected with the element, wherein the final node set is regarded as one node at the moment, and the secondary node set is regarded as a node in the condition 3-1;
traversing all wires in the simulation circuit schematic diagram according to the first step, the second step and the third step until all nodes in the simulation circuit schematic diagram are judged;
and fifthly, in the process of judging all the nodes in the simulation circuit schematic diagram in the step four, all the elements connected with the nodes can be obtained, each element is regarded as a branch, and the direction of each branch is customized, so that the circuit directed graph can be obtained.
In this embodiment, the node preferably includes all of the wire elements in the node set.
Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made therein without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (2)
1. A method for obtaining a circuit directed graph based on traversing wires, comprising the steps of:
step one, providing a required simulation circuit schematic diagram;
step two, selecting any one wire in the simulation circuit schematic diagram obtained in the step one, counting the selected wire into a first-level node set, and judging the model connected with two ends of the selected wire to obtain the following three conditions:
in case 1, both ends of the selected wire are connected to the device,
in condition 2, both ends of the selected wire are connected with the wire,
in case 3, one end of the selected wire is connected to the element, the other end is connected to the wire,
judging the three conditions, wherein a primary node set is taken as a node in a condition 1, wires connected with the selected wires are counted into the primary node set in a condition 2 and a condition 3, a new set obtained by counting the wires connected with the selected wires into the primary node set in a condition 2 and a condition 3 is taken as a secondary node set, and the wires connected with the selected wires are recorded as secondary wires;
judging the model connected with the other end of the secondary wire in the second step, and obtaining the following two conditions:
in condition 2-1, the other ends of the two secondary wires are connected with the wires,
in condition 2-2, the other end of one secondary wire is connected with the wire, the other end of the other secondary wire is connected with the element,
in case 3-1, the other end of the secondary wire is connected to the element,
in condition 3-2, the other end of the secondary wire is connected with the wire,
where condition 2-1 and condition 2-2 are two possible cases present in condition 2, condition 3-1 and condition 3-2 are two possible cases present in condition 3,
judging the four conditions, wherein the wires connected with the secondary wires are marked as three-level wires in the conditions 2-1, 2-2 and 3-2 and counted into a secondary node set, the wires connected with the secondary wires in the conditions 2-1, 2-2 and 3-2 are marked as three-level wires and counted into a new set after the secondary node set is counted into a three-level node set, and repeating the third step until the other end of the final wire is connected with the element, wherein the final node set is regarded as one node at the moment, and the secondary node set is regarded as a node in the condition 3-1;
traversing all wires in the simulation circuit schematic diagram according to the first step, the second step and the third step until all nodes in the simulation circuit schematic diagram are judged;
and fifthly, in the process of judging all the nodes in the simulation circuit schematic diagram in the step four, all the elements connected with the nodes can be obtained, each element is regarded as a branch, and the direction of each branch is customized, so that the circuit directed graph can be obtained.
2. The method for obtaining a circuit directed graph based on traversing wires of claim 1, wherein: the nodes contain all of the wire elements within the node set.
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Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5379231A (en) * | 1992-05-29 | 1995-01-03 | University Of Texas System | Method and apparatus for simulating a microelectric interconnect circuit |
| CN1508558A (en) * | 2002-12-17 | 2004-06-30 | �Ҵ���˾ | Method and system for feedback circulation detection on non-scanning storage element |
| CN104123407A (en) * | 2014-06-19 | 2014-10-29 | 电子科技大学 | Automatic testability model building method based on circuit simulation |
| CN105096694A (en) * | 2015-09-17 | 2015-11-25 | 中国人民解放军海军工程大学 | Electrical equipment virtual maintenance training system simulation method |
| CN108170871A (en) * | 2016-12-07 | 2018-06-15 | 中国电力科学研究院 | For the element browsing method of electro-magnetic transient topological data and pattern layout method |
| CN109829474A (en) * | 2018-12-27 | 2019-05-31 | 北京邮电大学 | A kind of circuit diagram recognition methods |
| CN110287735A (en) * | 2019-07-04 | 2019-09-27 | 电子科技大学 | Wooden horse based on chip netlist feature infects circuit identification method |
| CN110929323A (en) * | 2019-11-20 | 2020-03-27 | 上海建工四建集团有限公司 | Equipment route connection relation rendering path duplicate removal method and electronic equipment |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8050904B2 (en) * | 2006-09-15 | 2011-11-01 | Freescale Semiconductor, Inc. | System and method for circuit symbolic timing analysis of circuit designs |
| US7568178B2 (en) * | 2006-10-18 | 2009-07-28 | National Insturments Corporation | System simulation and graphical data flow programming in a common environment using wire data flow |
| US20100161671A1 (en) * | 2008-12-22 | 2010-06-24 | Vladimir Charnine | System and method for generating hierarchical categories from collection of related terms |
-
2020
- 2020-06-15 CN CN202010544394.2A patent/CN111695320B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5379231A (en) * | 1992-05-29 | 1995-01-03 | University Of Texas System | Method and apparatus for simulating a microelectric interconnect circuit |
| CN1508558A (en) * | 2002-12-17 | 2004-06-30 | �Ҵ���˾ | Method and system for feedback circulation detection on non-scanning storage element |
| CN104123407A (en) * | 2014-06-19 | 2014-10-29 | 电子科技大学 | Automatic testability model building method based on circuit simulation |
| CN105096694A (en) * | 2015-09-17 | 2015-11-25 | 中国人民解放军海军工程大学 | Electrical equipment virtual maintenance training system simulation method |
| CN108170871A (en) * | 2016-12-07 | 2018-06-15 | 中国电力科学研究院 | For the element browsing method of electro-magnetic transient topological data and pattern layout method |
| CN109829474A (en) * | 2018-12-27 | 2019-05-31 | 北京邮电大学 | A kind of circuit diagram recognition methods |
| CN110287735A (en) * | 2019-07-04 | 2019-09-27 | 电子科技大学 | Wooden horse based on chip netlist feature infects circuit identification method |
| CN110929323A (en) * | 2019-11-20 | 2020-03-27 | 上海建工四建集团有限公司 | Equipment route connection relation rendering path duplicate removal method and electronic equipment |
Non-Patent Citations (2)
| Title |
|---|
| 基于路径遍历的汽车电路推理模型的建立;周平,杨浩泉;上海第二工业大学学报(第03期);第20-24页 * |
| 继电控制线路的网络拓扑图的生成与再次抽取;宋政湘，王建华;计算机工程与应用(第01期);第18-20页 * |
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