CN111685761B

CN111685761B - Time domain biological impedance detection circuit based on comparator

Info

Publication number: CN111685761B
Application number: CN202010457278.7A
Authority: CN
Inventors: 秦亚杰; 董晨洁
Original assignee: Fudan University
Current assignee: Fudan University
Priority date: 2020-05-26
Filing date: 2020-05-26
Publication date: 2022-10-11
Anticipated expiration: 2040-05-26
Also published as: CN111685761A

Abstract

The invention belongs to the technical field of integrated circuits, and particularly relates to a time domain biological impedance detection circuit based on a comparator. The invention includes: the device comprises a pseudo-sine current excitation generating circuit, an analog front end amplifying circuit, a PWM wave generating circuit and an impedance reconstruction circuit. The method comprises the steps of converting the biological impedance to be detected into a voltage signal through pseudo-sinusoidal current excitation, amplifying the voltage signal by an analog front-end amplifying circuit, converting impedance information from a voltage domain to a time domain by a PWM (pulse-width modulation) wave generating circuit, and finally reconstructing the impedance information by an impedance reconstruction algorithm. The invention avoids the requirement for high-performance analog filter and high-precision analog-to-digital converter; the conversion and processing of signals after information is converted into a time domain are realized by a digital circuit, the advantages of the most advanced integrated circuit process can be fully utilized, a high-performance signal processing circuit is realized under a lower power supply voltage, and the power consumption of a system is further reduced. The invention has the characteristics of strong anti-interference capability, low power consumption and simple reconstruction algorithm.

Description

Time domain biological impedance detection circuit based on comparator

Technical Field

The invention belongs to the technical field of integrated circuits, and particularly relates to a time domain biological impedance detection circuit based on a comparator.

Background

With the cooperation of the integrated circuit industry and medical and life science disciplines going deep, the multifunctional biological detection circuit is expected to appear in the daily life of people in the future, changes the current medical care form, realizes the biological activation and autonomy of medical treatment, and particularly, the development of an implanted miniature biological signal detection system makes the real-time monitoring and treatment of the focus possible. And the bioimpedance detection circuit is an indispensable part thereof. At present, a plurality of researches show that the bioimpedance detection plays a crucial role in the aspects of new drug research and development, cell structure research, postoperative monitoring in operation and the like. The basic principle of bioimpedance measurement is to apply an excitation current to the tissue to be measured and to detect a voltage signal generated in response thereto. The traditional biological impedance detection circuit adopts a two-way quadrature demodulation principle for detection, and has the advantages that the calculation of a detection result is independent of the frequency of an excitation signal, and the harmonic wave generated by demodulation has higher performance requirements on an analog filter and an analog-to-digital converter. In addition, the requirement of the voltage domain signal for a high-performance analog circuit makes it difficult for the whole system to utilize the advantages brought by the advanced integrated circuit process, and limits the reduction of power consumption.

In order to overcome the defects, the invention provides a time domain biological impedance detection circuit based on a comparator, information is converted from a voltage domain to a time domain by using the comparator, the conversion and the processing of signals are realized by a digital circuit, the requirements on a high-performance analog filter and a high-precision analog-to-digital converter are avoided, the advantages of the most advanced integrated circuit process can be fully utilized, and a high-performance signal processing circuit is realized under a lower power supply voltage, so that the power consumption of a system is further reduced. Compared with the traditional phase-locking method, the impedance reconstruction algorithm consumes less hardware resources, thereby being beneficial to the whole-chip integration of the analog front end and the digital processing. However, the reconstruction algorithm requires that the frequency of the known excitation signal is relatively accurate, so the detection circuit has a certain limitation on the generation mode of the excitation current.

Disclosure of Invention

The invention aims to provide a biological impedance detection circuit with low power consumption and high integration level.

The invention provides a biological impedance detection circuit, which is a time domain biological impedance detection circuit based on a comparator. The circuit comprises a pseudo-sinusoidal current excitation generating circuit and a voltage signal receiving circuit; wherein:

the pseudo-sinusoidal current excitation generating circuit is used for generating sinusoidal current signals with known frequency and good linearity and is respectively applied to the biological impedance to be detected and the reference resistor. The resistance value of the reference resistor is known and is selected according to the range of the biological impedance to be detected;

the voltage signal receiving circuit comprises an analog front end amplifying circuit, a PWM wave generating circuit and an impedance reconstruction circuit; the PWM wave generating circuit comprises a comparator and a logic gate circuit; the impedance reconstruction circuit comprises a time-to-digital conversion module, a (Cordic) sine function, a multiplication function and a division function module.

In the present invention, the pseudo-sinusoidal current excitation generating circuit may be implemented in various ways, typically, for example, a circuit composed of a read only memory, a sigma-delta modulator, and a current-mode digital-to-analog converter.

In the invention, the analog front end amplification path has two identical paths, wherein one path is used for detecting the voltage at two ends of the impedance to be detected, and the other path is used for detecting the voltage at two ends of the reference resistor; each analog front end amplification path comprises a programmable voltage amplifier and a filter, and the gain is adjustable through the programmable voltage amplifier, so that a wider impedance measurement range is realized.

In the invention, the output of the two analog amplification paths enters a PWM wave generating circuit, and the information of a voltage domain is converted into a time domain through a comparator and a plurality of logic gate circuits, and is expressed by the width of a pulse.

In the invention, the impedance reconstruction circuit firstly converts the pulse width into digital information through the time-to-digital conversion module, and then reconstructs the amplitude and phase information of the impedance to be measured through the multiplication function, the division function and the sine operation function module. The multiplication, division and sine operation can be realized by software, or can be realized by an Application Specific Integrated Circuit (ASIC) or a programmable gate array (FPGA).

Compared with the traditional impedance detection method of phase-locked amplification, the invention avoids the requirements on a high-performance analog filter and a high-precision analog-to-digital converter, simultaneously, the conversion and the processing of the signals after the information is converted into the time domain are realized by a digital circuit, the advantages of the most advanced integrated circuit process can be fully utilized, a high-performance signal processing circuit is realized under the lower power supply voltage, and the power consumption of the system is further reduced. Compared with the traditional phase-locking method, the impedance reconstruction algorithm consumes less hardware resources, thereby being beneficial to the whole-chip integration of the analog front end and the digital processing. The invention has the characteristics of strong anti-interference capability, low power consumption and simple reconstruction algorithm.

Drawings

FIG. 1 is a block diagram showing the structure of a bio-impedance detection circuit according to the present invention.

Fig. 2 is a schematic diagram of an analog front end amplification path structure according to the present invention.

Fig. 3 is a schematic diagram of a PWM wave generating circuit according to the present invention.

Fig. 4 is a schematic diagram of the impedance reconstruction circuit of the present invention.

The reference numbers in the figures: the device comprises a pseudo-sine current excitation generating circuit, an analog front end amplifying circuit, a PWM wave generating circuit, an impedance reconstruction circuit, a biological impedance to be detected, a reference resistor, a current analog-to-digital converter, a Sigma-delta modulator, a read-only memory, a programmable voltage amplifier, a low-pass filter, a comparator, an exclusive-or gate circuit, a time-to-digital converter, a multiplier module, a sine function calculating module and a divider module, wherein the 1 is a pseudo-sine current excitation generating circuit, the 2 is an analog front end amplifying circuit, the 3 is a PWM wave generating circuit, the 4 is an impedance reconstruction circuit, the 5 is a biological impedance to be detected, the 6 is a reference resistor, the 7 is a current analog-to-digital converter, the 8 is a Sigma-delta modulator, the 9 is a read-only memory, the 10 is a programmable voltage amplifier, the 11 is a low-pass filter, the 12 is a comparator, the 13 is an exclusive-or gate circuit, the 14 is a time-to-digital converter, the 15 is a multiplier module, the 16 is a sine function calculating module, and the 17 is a divider module.

Detailed Description

The invention is further illustrated by the following examples in conjunction with the drawings.

In fig. 1, a pseudo-sinusoidal current excitation generating circuit 1 is used to generate a sinusoidal current signal with a known frequency and good linearity. The generation of pseudo-sinusoidal current excitations may be implemented in various ways, a specific embodiment being illustrated in fig. 1: the read-only memory 9 stores pre-generated sine signals, the data are modulated by the sigma-delta modulator 8 after being read out, and then the data are converted into current excitation signals by the low-precision current digital-to-analog converter 7 to be applied to the biological impedance 5 to be detected and the reference resistor 6 respectively. The two analog front-end amplification paths 2 respectively detect voltage signals generated on the biological impedance 5 to be detected and the reference resistor 6, and perform amplification and filtering processing. The two analog amplification paths 2 input the processed voltage signals into the PWM wave generating circuit 3, the PWM wave generating circuit 3 converts the information of the voltage domain into the time domain, outputs pulse signals, and expresses the amplitude and phase information of the impedance to be measured by the width of the output pulses. The pulse signal is finally input into an impedance reconstruction circuit 4, converted into a digital domain and further calculated, so that the reconstruction of the amplitude and phase information of the bio-impedance 5 to be measured is realized.

In fig. 2, two analog front-end amplification paths 2 respectively detect voltage signals generated on a bio-impedance 5 to be detected and a reference resistor 6. The analog front-end amplifying path 2 is composed of a programmable voltage amplifier 10 and a low-pass filter 11. The programmable voltage amplifier 10 is used for amplifying a voltage signal on the impedance 5 to be measured or the reference resistor 6, and the gain can be configured by a digital signal to realize a plurality of adjustable gains. The low-pass filter 11 is used for filtering high-frequency noise and harmonic waves and improving the linearity of the voltage signal. The output signal of the analog front end amplification path 2 for detecting the biological impedance 5 to be detected is Vin, and the output signal of the analog front end amplification path 2 for detecting the reference resistor 6 is Vref.

In fig. 3, the signals Vin and Vref are input to the PWM wave generating circuit 3, and converted by the comparator 12 into square wave signals Comp1, comp2, and Comp3 having a duty ratio of 50% but different phases. Subsequently, the signals Comp1, comp2 and Comp3 are converted into pulse signals O _ phi, O _ t2 and O _ t1 of different widths by logical operation of the xor gate 13.

In fig. 4, the aforementioned pulse signals O _ phi, O _ T2, and O _ T1 are input to the impedance reconstruction circuit 4, and the time-to-digital converter (TDC) converts the pulse widths of the signals O _ phi, O _ T2, and O _ T1 into digital signals T3, T2, and T1, respectively. And then, the multiplier module, the sine function module and the divider module calculate the amplitude and the phase of the impedance to be measured according to the following formulas, so that the reconstruction of the impedance to be measured is realized:

，

where ω represents the angular frequency of the excitation current signal,R _ref representing the resistance of the reference resistor.

The multiplier module, sine function module and divider module may be implemented in software, or may be implemented in an Application Specific Integrated Circuit (ASIC) or a programmable gate array (FPGA). Wherein, the sine function module can be realized by a Cordic algorithm.

The above is only one embodiment of the present invention for convenience of illustration, and the present disclosure is not limited by the embodiment, and any modifications within the scope of the present invention are included in the scope of the present invention.

Claims

1. A time domain biological impedance detection circuit based on a comparator is characterized by comprising a pseudo-sinusoidal current excitation generation circuit and a voltage signal receiving circuit; wherein:

the pseudo-sinusoidal current excitation generating circuit is used for generating sinusoidal current signals with known frequency and good linearity and applying the sinusoidal current signals to the biological impedance to be detected and the reference resistor respectively; the resistance value of the reference resistor is known and is selected according to the range of the biological impedance to be detected;

the voltage signal receiving circuit comprises an analog front end amplifying circuit, a PWM wave generating circuit and an impedance reconstruction circuit; the PWM wave generating circuit comprises a comparator and a logic gate circuit; the impedance reconstruction circuit comprises a time-to-digital conversion module, a Cordic sine function, a multiplication function and a division function module.

2. The comparator-based time domain bioimpedance detection circuit according to claim 1, wherein said analog front end amplification path comprises two identical paths, one for detecting the voltage across the impedance to be measured and the other for detecting the voltage across the reference resistor; the analog front-end amplification path comprises a programmable voltage amplifier and a filter, and the gain is adjustable through the programmable voltage amplifier, so that a wider impedance measurement range is realized;

the output of the two analog front-end amplifying paths enters a PWM wave generating circuit, and the information of a voltage domain is converted into a time domain through a comparator and a plurality of logic gate circuits and is expressed by the width of a pulse;

in the impedance reconstruction circuit, a time-to-digital conversion module converts pulse width into digital information, and amplitude and phase information of impedance to be measured is reconstructed through a multiplication function, a division function and a sine operation function module.

3. The comparator-based time domain bioimpedance detection circuit of claim 2, wherein the multiplication function, division function and sine function operations are implemented in software, or in an application specific integrated circuit or a programmable logic gate array.

4. The comparator-based time domain bioimpedance detection circuit of claim 3, wherein said pseudo-sinusoidal current excitation generation circuit comprises a read only memory, a sigma-delta modulator, and a current mode digital to analog converter.

5. The comparator-based time domain bioimpedance detection circuit according to claim 4, wherein a read only memory (9) stores a pre-generated sinusoidal signal, data is modulated by a sigma-delta modulator (8) after being read out, and then is converted into a current excitation signal by a current digital-to-analog converter (7) and is applied to the bioimpedance (5) to be detected and the reference resistance (6) respectively; the two analog front-end amplification paths (2) respectively detect voltage signals generated on the biological impedance (5) to be detected and the reference resistor (6), and perform amplification and filtering processing; the two analog front end amplification paths (2) input the processed voltage signals into a PWM wave generation circuit (3), the PWM wave generation circuit (3) converts the information of a voltage domain into a time domain, outputs pulse signals and expresses the amplitude and phase information of the impedance to be measured by the width of output pulses; the pulse signal is finally input into an impedance reconstruction circuit (4), converted into a digital domain and further calculated, so that the reconstruction of the amplitude and phase information of the biological impedance (5) to be detected is realized;

the analog front-end amplification path (2) consists of a programmable voltage amplifier (10) and a low-pass filter (11); the programmable voltage amplifier (10) is used for amplifying a voltage signal on the impedance (5) to be measured or the reference resistor (6), and the gain is configured by a digital signal to realize adjustable gains of a plurality of gears; the low-pass filter (11) is used for filtering high-frequency noise and harmonic waves and improving the linearity of a voltage signal; the output signal of the analog front-end amplification path (2) for detecting the biological impedance (5) to be detected is Vin, and the output signal of the analog front-end amplification path (2) for detecting the reference resistor (6) is Vref;

the signals Vin and Vref are input to a PWM wave generating circuit (3) and converted into square wave signals Comp1, comp2 and Comp3 with duty ratio of 50% but different phases by a comparator (12); the signals Comp1, comp2 and Comp3 are converted into pulse signals O _ phi, O _ t2 and O _ t1 with different widths through the logical operation of an exclusive-OR gate (13);

the pulse signals O _ phi, O _ T2 and O _ T1 are input into an impedance reconstruction circuit (4), and a time-to-digital converter converts the pulse widths of the signals O _ phi, O _ T2 and O _ T1 into digital signals T3, T2 and T1 respectively; then, the multiplier module, the sine function module and the divider module calculate the amplitude and the phase of the impedance to be measured according to the following formulas, so that the reconstruction of the impedance to be measured is realized:

，