CN111682912B - Ultra-wideband power amplifier harmonic wave elimination device and method based on FPGA - Google Patents

Ultra-wideband power amplifier harmonic wave elimination device and method based on FPGA Download PDF

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CN111682912B
CN111682912B CN202010477429.5A CN202010477429A CN111682912B CN 111682912 B CN111682912 B CN 111682912B CN 202010477429 A CN202010477429 A CN 202010477429A CN 111682912 B CN111682912 B CN 111682912B
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harmonic
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power amplifier
harmonic signal
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CN111682912A (en
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杨晶晶
柴旭荣
荆有波
蒯冲
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Institute of Microelectronics of CAS
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Institute of Microelectronics of CAS
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing
    • H04B17/30Monitoring; Testing of propagation channels
    • H04B17/309Measuring or estimating channel quality parameters
    • H04B17/345Interference values
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02Transmitters
    • H04B1/04Circuits
    • H04B1/0475Circuits with means for limiting noise, interference or distortion
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing
    • H04B17/30Monitoring; Testing of propagation channels
    • H04B17/391Modelling the propagation channel

Abstract

The invention relates to an ultra-wideband power amplifier harmonic wave elimination device and method based on an FPGA (field programmable gate array), belongs to the technical field of ultra-wideband communication, and solves the problems of hardware resource waste, large system power consumption and the like caused by the fact that the existing method only utilizes the FPGA to collect data. The harmonic elimination device is realized by an FPGA module and comprises a training signal unit for generating an initial harmonic signal; the power amplifier harmonic modeling unit is used for modeling a nonlinear channel of the harmonic frequency of the radio frequency power amplifier according to a harmonic signal and a baseband signal to obtain a channel parameter, wherein the harmonic signal comprises an initial harmonic signal and a harmonic interference signal obtained from the power amplifier module; the inverse harmonic coefficient calculation unit is used for calculating and obtaining an inverse harmonic coefficient according to the harmonic signal, the baseband signal and the channel parameter; and the anti-harmonic generation unit is used for generating an anti-harmonic signal according to the anti-harmonic coefficient so as to eliminate the harmonic interference signal generated by the radio frequency power amplifier. Hardware resources are saved, and the power consumption of the harmonic elimination device is reduced.

Description

Ultra-wideband power amplifier harmonic wave elimination device and method based on FPGA
Technical Field
The invention relates to the technical field of ultra-wideband communication, in particular to an ultra-wideband power amplifier harmonic wave elimination device and method based on an FPGA.
Background
The radio frequency power amplifier is an important component of a transmitting end of a wireless communication system and is a device with the maximum power consumption of a transmitting link. In order to improve the efficiency of the rf power amplifier and the signal-to-noise ratio of the receiver, the rf power amplifier is usually driven to a nonlinear region, but in-band intermodulation interference and out-of-band harmonic interference are caused, which causes spectrum pollution, signal distortion and performance deterioration of the communication system.
For signal distortion caused by in-band intermodulation, a digital predistortion technology is usually adopted for compensation, and the technology has been researched and applied in a large scale and becomes a key technology for improving the efficiency of a wireless communication system and the linearization of a radio frequency power amplifier. For out-of-band harmonic interference, some digital harmonic elimination devices based on MATLAB simulation application exist at present, but only in a laboratory environment, the MATLAB algorithm is not grounded on an FPGA, and the floating point simulation of the algorithm is completed only by collecting ADC and DAC data through the FPGA, so that hardware resources are wasted, the power consumption of a system is increased, and the harmonic elimination efficiency is low.
Disclosure of Invention
In view of the foregoing analysis, embodiments of the present invention provide an apparatus and a method for eliminating an ultra-wideband power amplifier harmonic based on an FPGA, so as to solve the problems of hardware resource waste, large system power consumption, and the like caused by only using the FPGA to collect data in the conventional harmonic elimination method.
On one hand, the embodiment of the invention provides an ultra-wideband power amplifier harmonic elimination device based on an FPGA, which is used for eliminating harmonic interference signals generated after carrier signals pass through a power amplifier module, and the harmonic elimination device is realized by the FPGA module and comprises the following components:
a training signal unit for generating an initial harmonic signal;
the power amplifier harmonic modeling unit is used for modeling a nonlinear channel of the harmonic frequency of the radio frequency power amplifier according to the harmonic signal and the baseband signal to obtain a channel parameter; the harmonic signals comprise original harmonic signals and harmonic interference signals acquired from a power amplifier module, and the baseband signals are baseband signals corresponding to the carrier signals;
the inverse harmonic coefficient calculation unit is used for calculating and obtaining an inverse harmonic coefficient according to the harmonic signal, the baseband signal and the channel parameter;
and the anti-harmonic generation unit is used for generating an anti-harmonic signal according to the anti-harmonic coefficient so as to eliminate the harmonic signal generated by the radio frequency power amplifier.
Further, the FPGA module further comprises a signal alignment unit for aligning the harmonic signal with the baseband signal and outputting the aligned signal to the power amplifier harmonic modeling unit and the inverse harmonic coefficient calculation unit.
Further, the FPGA module further comprises a gating unit for gating the training signal unit and outputting the initial harmonic signal to the signal alignment unit, and gating the anti-harmonic generation unit and outputting the anti-harmonic signal.
Further, the inverse harmonic generation unit generating an inverse harmonic signal includes the steps of:
obtaining an original anti-harmonic signal based on the anti-harmonic coefficient;
and optimizing complex division in the original inverse harmonic signal calculation formula based on a CORDIC algorithm to obtain an inverse harmonic signal.
Further, the calculation formula of the original anti-harmonic signal is as follows:
Figure 1
in the formula, xi(n) is the original anti-harmonic signal, n is the sampling point, xiiIs a harmonic wave memory polynomial corresponding to the baseband signal, i is the harmonic wave number, D is the memory depth, D is the real-time memory depth, NiIs the order of the nonlinear effect, j is the order of the real-time nonlinear effect, hii(d, j) is the inverse harmonic coefficient, x1(n) is a baseband signal, x1And (n-d) is an intermodulation interference item of the baseband signal.
Further, optimizing complex division in the original inverse harmonic signal calculation formula based on the CORDIC algorithm to obtain an inverse harmonic signal comprises the following steps:
respectively solving absolute values of a real part of the molecule and an imaginary part of the molecule based on the original anti-harmonic signal to obtain an absolute value of the real part of the molecule and an absolute value of the imaginary part of the molecule;
obtaining a rotation angle of a denominator based on the CORDIC Ipcore;
rotating the real part of the denominator based on the rotation angle to obtain a rotation value of the real part of the denominator;
on the basis of the divider IPcore, dividing the absolute value of the real part of the numerator by the rotation value of the real part of the denominator to obtain the real part of the anti-harmonic signal, and dividing the absolute value of the imaginary part of the numerator by the rotation value of the real part of the denominator to obtain the imaginary part of the anti-harmonic signal;
and obtaining an anti-harmonic signal based on the real part and the imaginary part of the anti-harmonic signal.
On the other hand, the embodiment of the invention provides an ultra-wideband power amplifier harmonic elimination method based on an FPGA, which is used for eliminating harmonic signals generated after carrier signals pass through a power amplifier module and comprises the following steps:
generating an initial harmonic signal;
modeling a nonlinear channel of the harmonic frequency of the radio frequency power amplifier according to the harmonic signal and the baseband signal to obtain a channel parameter; the harmonic signal comprises the initial harmonic signal and a harmonic interference signal acquired from a power amplifier module, and the baseband signal is a baseband signal corresponding to the carrier signal;
calculating according to the harmonic signal, the baseband signal and the channel parameter to obtain an anti-harmonic coefficient;
and generating an anti-harmonic signal according to the anti-harmonic coefficient so as to eliminate the harmonic interference signal generated by the radio frequency power amplifier.
Further, generating an anti-harmonic signal according to the anti-harmonic coefficient comprises the steps of:
obtaining an original anti-harmonic signal based on the anti-harmonic coefficient;
and optimizing complex division in the original inverse harmonic signal calculation formula based on a CORDIC algorithm to obtain an inverse harmonic signal.
Further, the calculation formula of the original anti-harmonic signal is as follows:
Figure 2
in the formula, xi(n) is the original anti-harmonic signal, n is the sampling point, xiiIs a harmonic wave memory polynomial corresponding to the baseband signal, i is the harmonic wave number, D is the memory depth, D is the real-time memory depth, NiIs the order of the nonlinear effect, j is the order of the real-time nonlinear effect, hii(d, j) is inverse harmonicWave coefficient, x1(n) is a baseband signal, x1And (n-d) is an intermodulation interference item of the baseband signal.
Further, optimizing complex division in the original inverse harmonic signal calculation formula based on the CORDIC algorithm to obtain an inverse harmonic signal comprises the following steps:
respectively solving absolute values of a real part of the molecule and an imaginary part of the molecule based on the original anti-harmonic signal to obtain an absolute value of the real part of the molecule and an absolute value of the imaginary part of the molecule;
obtaining a rotation angle of a denominator based on the CORDIC Ipcore;
rotating the real part of the denominator based on the rotation angle to obtain a real part rotation value of the denominator;
on the basis of the divider IPcore, dividing the absolute value of the real part of the numerator by the rotation value of the real part of the denominator to obtain the real part of the anti-harmonic signal, and dividing the absolute value of the imaginary part of the numerator by the rotation value of the real part of the denominator to obtain the imaginary part of the anti-harmonic signal;
and obtaining an anti-harmonic signal based on the real part and the imaginary part of the anti-harmonic signal.
Compared with the prior art, the invention can realize at least one of the following beneficial effects:
1. the utility model provides a non-linear channel of radio frequency power amplifier harmonic frequency is modelled to FPGA module, obtains the channel parameter, generates the anti-harmonic coefficient then, finally generates the anti-harmonic signal based on this anti-harmonic coefficient to eliminate the harmonic interference signal that carrier signal produced behind the power amplifier module, solved the extravagant hardware resource that current harmonic remove device caused and increased system consumption scheduling problem, saved the hardware resource, reduced system consumption.
2. Through the signal alignment unit, the harmonic signal and the baseband signal are aligned to eliminate the delay of the signal, support and basis are provided for post-calculation of channel parameters and anti-harmonic coefficients, and meanwhile, the accuracy of post-calculation can be effectively improved through the delay of the eliminated signal.
3. The original anti-harmonic signal is obtained through the anti-harmonic generation unit, the CORDIC algorithm is adopted to optimize complex division in the original anti-harmonic signal calculation formula, the anti-harmonic signal is finally obtained, the calculation speed of generating the anti-harmonic signal is improved, and meanwhile, the CORDIC algorithm is adopted to improve the harmonic elimination precision of the radio frequency power amplifier.
4. An ultra-wideband power amplifier harmonic elimination method based on FPGA utilizes FPGA to model a nonlinear channel of radio frequency power amplifier harmonic frequency to obtain channel parameters, then generates an anti-harmonic coefficient, and finally generates an anti-harmonic signal based on the anti-harmonic coefficient so as to eliminate harmonic interference signals generated after carrier signals pass through a power amplifier module. Meanwhile, complex division in the original anti-harmonic signal calculation formula is optimized based on the CORDIC algorithm, and the anti-harmonic signal is finally obtained, so that the speed of obtaining the anti-harmonic signal is increased, and the harmonic elimination precision of the radio frequency power amplifier is improved.
In the invention, the technical schemes can be combined with each other to realize more preferable combination schemes. Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and drawings.
Drawings
The drawings are only for purposes of illustrating particular embodiments and are not to be construed as limiting the invention, wherein like reference numerals are used to designate like parts throughout.
FIG. 1 is a diagram of an embodiment of an FPGA-based ultra-wideband power amplifier harmonic cancellation apparatus;
FIG. 2 is a schematic diagram of a harmonic memory polynomial corresponding to an FPGA-based baseband signal generation in one embodiment;
FIG. 3 is a schematic diagram of a second order harmonic memory polynomial based on FPGA generated baseband signals in one embodiment;
FIG. 4 is a schematic diagram of an embodiment of obtaining a primary anti-harmonic signal based on an FPGA;
FIG. 5 is a schematic diagram of an embodiment of a simplified original anti-harmonic signal based on an FPGA;
FIG. 6 is a schematic diagram of complex division in a calculation formula for optimizing an original anti-harmonic signal by using a CORDIC algorithm according to an embodiment;
FIG. 7 is a graph of the spectrum of the harmonic cancellation result without the CORDIC algorithm in one embodiment;
FIG. 8 is a graph of the spectrum of the harmonic cancellation result using the CORDIC algorithm in one embodiment;
fig. 9 is a flowchart of an ultra-wideband power amplifier harmonic cancellation method based on an FPGA in another embodiment.
Detailed Description
The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate preferred embodiments of the invention and together with the description, serve to explain the principles of the invention and not to limit the scope of the invention.
The existing digital harmonic elimination device only depends on an FPGA to collect data of an analog-digital conversion module and a digital-analog conversion module to complete floating point simulation of an algorithm, and then generates an anti-harmonic signal by adding other modules to eliminate harmonic interference signals generated after carrier signals pass through a power amplification module. Therefore, the device and the method for eliminating the harmonic of the ultra-wideband power amplifier based on the FPGA can acquire data through the FPGA module, generate an original anti-harmonic signal at the same time, and optimize complex division in a calculation formula of the original anti-harmonic signal by adopting a CORDIC algorithm in a soft core of the FPGA module so as to quickly obtain the anti-harmonic signal, save hardware resources, reduce the power consumption of a system and improve the efficiency of eliminating the harmonic.
The invention discloses an ultra-wideband power amplifier harmonic wave elimination device based on an FPGA (field programmable gate array), which is used for eliminating harmonic wave interference signals generated after carrier signals pass through a power amplifier module. As shown in fig. 1, the harmonic cancellation apparatus is implemented by an FPGA module, and includes: a training signal unit for generating an initial harmonic signal; the power amplifier harmonic modeling unit is used for modeling a nonlinear channel of the harmonic frequency of the radio frequency power amplifier according to the harmonic signal and the baseband signal to obtain a channel parameter, wherein the harmonic signal comprises an initial harmonic signal and a harmonic interference signal obtained from the radio frequency power amplifier; the baseband signal is a baseband signal corresponding to the carrier signal; the inverse harmonic coefficient calculation unit is used for calculating and obtaining an inverse harmonic coefficient according to the harmonic signal, the baseband signal and the channel parameter; and the anti-harmonic generation unit is used for generating an anti-harmonic signal according to the anti-harmonic coefficient so as to eliminate the harmonic interference signal generated by the radio frequency power amplifier.
In implementation, a baseband signal is generated by a baseband signal unit, the baseband signal is up-converted by an up-conversion processing unit to obtain a modulation signal, the modulation signal is subjected to radio frequency power amplification to generate a carrier signal and a harmonic interference signal, and the harmonic interference signal is an impurity signal which needs to be eliminated by an anti-harmonic signal generated by the FPGA module. The FPGA module needs to collect baseband signals and harmonic signals and finally generates anti-harmonic signals, but when the FPGA module does not collect harmonic interference signals output by the radio frequency power amplifier at the beginning, a training signal unit in the ultra-wideband power amplifier harmonic elimination device generates initial harmonic signals and outputs the initial harmonic signals to a power amplifier harmonic modeling unit to model a nonlinear channel of the radio frequency power amplifier harmonic frequency. And subsequently, acquiring the obtained harmonic interference signal from the power amplifier module. The power amplifier harmonic modeling unit models a nonlinear channel of the radio frequency power amplifier harmonic frequency according to the harmonic signal and the baseband signal to obtain a channel parameter, wherein a formula of the channel parameter is as follows:
H(n)=(XH(n)X(n))-1XH(n)Y(n) (1)
wherein H (n) is channel parameter, X (n) is baseband signal, Y (n) is harmonic signal, XH(n) is the conjugate of X (n).
Compared with the prior art, the ultra-wideband power amplifier harmonic elimination device based on the FPGA provided by the embodiment utilizes the FPGA module to model a nonlinear channel of the radio frequency power amplifier harmonic frequency, obtains channel parameters, then generates an anti-harmonic coefficient, and finally generates an anti-harmonic signal based on the anti-harmonic coefficient, so as to eliminate harmonic interference signals generated after carrier signals pass through the power amplifier module, solve the problems of hardware resource waste, system power consumption increase and the like caused by the conventional harmonic elimination device, save hardware resources, and reduce system power consumption.
Preferably, the FPGA module further includes a signal aligning unit, configured to align the harmonic signal with the baseband signal, and output the aligned signal to the power amplifier harmonic modeling unit and the inverse harmonic coefficient calculating unit. Considering that a period of time delay exists between signal transmission and signal reception, a signal alignment module is added in the method, so that the received baseband signal and the harmonic signal are aligned, the aligned signal is output to a power amplifier harmonic modeling unit to model a nonlinear channel of the harmonic frequency of the radio frequency power amplifier, and a channel parameter is obtained, or the aligned signal is output to an inverse harmonic coefficient calculation unit to generate an inverse harmonic coefficient.
The signal alignment unit aligns the harmonic signal with the baseband signal to eliminate the delay of the signal, so that support and basis are provided for post-calculation of channel parameters and anti-harmonic coefficients, and meanwhile, the elimination of the delay of the signal is beneficial to improving the accuracy of post-calculation.
Preferably, the FPGA module further includes a gating unit for gating the training signal unit and outputting the initial harmonic signal to the signal alignment unit, and gating the inverse harmonic generation unit and outputting the inverse harmonic signal. Specifically, when the FPGA module does not acquire the filtering signal output by the radio frequency power amplifier, the gating unit gates the training signal unit to output the initial harmonic signal to the signal alignment unit for alignment processing. And then, a filtering signal output by the radio frequency power amplifier is obtained in the FPGA module, and the gating unit gates the anti-harmonic generation unit to output the anti-harmonic signal so as to eliminate the harmonic interference signal generated by the radio frequency power amplifier.
Through the gating unit, the gating training signal unit outputs the initial harmonic signal to the signal alignment unit, or the gating anti-harmonic generation unit outputs the anti-harmonic signal to eliminate the harmonic interference signal generated by the radio frequency power amplifier, and the method is simple and easy to implement.
Specifically, the inverse harmonic coefficient calculation unit is configured to calculate an inverse harmonic coefficient according to the harmonic signal, the baseband signal, and the channel parameter, and obtain a calculation formula as follows:
Figure BDA0002516261390000091
in the formula, hii(d, j) is the inverse harmonic coefficient, H (1) is the corresponding channel parameter when the sampling point is 1, mu is the step factor, X (n) is the base band signal, XH(n) is the transpose of X (n), and e (n) is the systematic error.
Preferably, the anti-harmonic generation unit generates the anti-harmonic signal including the steps of:
and obtaining the original anti-harmonic signal based on the anti-harmonic coefficient. Specifically, the calculation formula of the original anti-harmonic signal is as follows:
Figure 3
in the formula, xi(n) is the original anti-harmonic signal, n is the sampling point, xiiIs a harmonic wave memory polynomial corresponding to the baseband signal, i is the harmonic wave number, D is the memory depth, D is the real-time memory depth, NiIs the order of the nonlinear effect, j is the order of the real-time nonlinear effect, hii(d, j) is the inverse harmonic coefficient, x1(n) is a baseband signal, x1And (n-d) is an intermodulation interference item of the baseband signal.
The method comprises the following steps of optimizing complex division in an original inverse harmonic signal calculation formula based on a CORDIC algorithm to obtain an inverse harmonic signal: respectively solving absolute values of a real part of the molecule and an imaginary part of the molecule based on the original anti-harmonic signal to obtain an absolute value of the real part of the molecule and an absolute value of the imaginary part of the molecule; obtaining a rotation angle of a denominator based on the CORDIC Ipcore; rotating the real part of the denominator based on the rotation angle to obtain a rotation value of the real part of the denominator; based on the divider IPcore, the real part of the anti-harmonic signal is obtained by dividing the absolute value of the real part of the numerator by the rotation value of the real part of the denominator, and the imaginary part of the anti-harmonic signal is obtained by dividing the absolute value of the imaginary part of the numerator by the rotation value of the real part of the denominator, and finally the anti-harmonic signal is obtained.
Specifically, the anti-harmonic generation unit is a calculation unit implemented based on an FPGA soft core, and in this unit, an original anti-harmonic signal can be generated based on an anti-harmonic coefficient output by the anti-harmonic coefficient calculation unit, and then a CORDIC algorithm is used to optimize complex division in a calculation formula of the original anti-harmonic signal, so as to improve efficiency of complex operation.
Specifically, because of the nonlinearity of the radio frequency power amplifier, the harmonic interference signal received by the FPGA module includes intermodulation interference of the harmonic signal and the baseband signal, and the harmonic signal of the baseband signal, and because the power of the harmonic signal is relatively low, the inverse harmonic signal is obtained by the following formula without considering the intermodulation interference of the harmonic signal itself:
Figure BDA0002516261390000101
in the formula, xi(n) is the original anti-harmonic signal, h1i(d, j) is the channel parameter corresponding to the first harmonic, x1(n-d) is the intermodulation interference term, x, of the baseband signal1 jAnd (n-d) is an intermodulation interference item corresponding to the real-time nonlinear effect time-base signal with the order of j.
The method is used for converting x in intermodulation interference items in the formula (3) based on the FPGA modulei(n-d) baseband signal x1(n) second order harmonic memory polynomial substitution, i.e. x in equation (3)iFor (n-d)
Figure BDA0002516261390000102
Instead, the calculation formula (2) of the original anti-harmonic signal in the present application is obtained. In detail, the following steps are the realization principle of the calculation formula (2) of the original anti-harmonic signal in the PFGA module:
first, a baseband signal x is generated1(n) x in the harmonic memory polynomial1(n)2、|x1(n)|、|x1(n)|2、 |x1(n)|3Each item, wherein, x1(n)2For harmonic memory quadratic polynomial, | x1(n)|、|x1(n)|2、|x1(n)|3The first-order polynomial, the second-order polynomial and the third-order polynomial which correspond to the time-base band signal with the memory depth of 0 and the nonlinear order of 1 are respectively. As shown in figure 2 of the drawings, in which,
Figure BDA0002516261390000111
the formula is realized by adopting a mode of polynomial calculation and a lookup table, and input data x1(n) entering into cordicIP IP core 102 module, and calculating module value | x1(n) |, as the address of the lookup table, go to RAM lookup table 105 to find | x |1(n)|2,|x1(n)|3(ii) a While x is obtained via the multiplier 1061(n)2And passes through delayers 107 and 108 according to the memory effect of the power amplifier, thereby obtaining x1(n)2、x1(n-1)2、x1(n-2)2Data for these three moments; through the delays 103 and 104, | x is obtained1(n)|、|x1(n-1)|、|x1(n-2) | of data at three times; through the delays 109 and 111, | x is obtained1(n)|2、|x1(n-1)|2、|x1(n-2)|2Data for these three moments; through the delays 110 and 112, | x is obtained1(n)|3、|x1(n-1)|3、|x1(n-2)|3The data at these three times are 12 sets of data.
Then generating a baseband signal x1(n) a second order harmonic memory polynomial:
Figure BDA0002516261390000112
as shown in FIG. 3, x1(n)2Obtaining H (3) × by multiplier 2011(n)2X is obtained via the multiplier 2021(n)2*|x1(n) |, and then the multiplier 203 obtains H (6) × x1(n)2*|x1(n) l, which is multiplied by multiplier 204 to obtain x1(n)2*|x1(n)|2Then, the result is multiplied by a multiplier 205 to obtain H (9) ×1(n)2*|x1(n)|2X is obtained via multiplier 2061(n)2*|x1(n)|3Then, the result is processed by the multiplier 207 to obtain H (12) ×1(n)2*|x1(n)|3;x1(n-1)2The multiplier 208 is used to obtain H (2) ×1(n)2X is obtained through the multiplier 2091(n-1)2*|x1(n-1) |, and then the multiplier 210 obtains H (5) × x1(n-1)2*|x1(n-1) |, which is passed through multiplier 211 to obtain x1(n-1)2*|x1(n-1)|2Then, the result is multiplied by a multiplier 212 to obtain H (8) ×1(n-1)2*|x1(n-1)|2X is obtained via multiplier 2131(n-1)2*|x1(n-1)|3Then, the result is multiplied by a multiplier 214 to obtain H (11) ×1(n-1)2*|x1(n-1)|3; x1(n-2)2The multiplier 215 obtains H (1) ×1(n-2)2X is obtained via the multiplier 2161(n-2)2*|x1(n-2) |, and then the multiplier 217 is used to obtain H (4) × x1(n-2)2*|x1(n-2) |, which is passed through multiplier 218 to obtain x1(n-2)2*|x1(n-2)|2And then through the multiplier 219, H (7) × x is obtained1(n-2)2*|x1(n-2)|2X is obtained via the multiplier 2201(n-2)2*|x1(n-2)|3Then, the result is multiplied by a multiplier 221 to obtain H (10) ×1(n-2)2*|x1(n-2)|3The product of the 12 terms is passed through an adder 222 to obtain
Figure BDA0002516261390000121
And obtaining a calculation formula of the original anti-harmonic signal based on the FPGA module. As shown in fig. 4, x is first determinedi(n) generating x via delay 317i(n-1), and then through the delay 318 to generate xi(n-2) with xi(n-1) as input, and H (13) × x is obtained through the multiplier 301i(n-1), which through multipliers 302 and 303 yields H (17) xi(n-1)*|x1(n-1) |, through multipliers 304 and 305, H (20) × x is obtainedi(n-1)*|x1(n-1)|2(ii) a Also in xi(n-2) is input and the multiplier 306 is used to obtain H (15) ×i(n-2) and via multipliers 307 and 308, H (18) xi(n-2)*|x1(n-2) |, and H (21) × x is obtained by multipliers 309 and 310i(n-2)*|x1(n-2)|2The seven groups of data are obtained by the adder 311 and the inverter 312
Figure BDA0002516261390000122
Obtaining the molecule of the original inverse harmonic signal calculation formula; then simultaneously with | x1(n) | is processed by multiplier 315 to obtain H (16) × |1(n)|,|x1(n)|2The multiplier 316 obtains H (19) ×1(n)|2The two sets of data and the coefficient H (13) are obtained by the adder 314
Figure BDA0002516261390000123
And obtaining the denominator of the original inverse harmonic signal calculation formula.
And finally, simplifying the calculation formula of the obtained original anti-harmonic signal, and realizing the simplified calculation formula based on a PFGA module. The principle of sequential execution of the FPGA, that is, the generation of the intermediate variable by inverse circulation cannot be realized in the FPGA module, so that the intermediate variable by inverse circulation of the final result is not needed to be generated, and a simplified formula method is adopted because the definition of the i-th order harmonic memory polynomial is that of the intermediate variable
Figure BDA0002516261390000131
So using xiiTo replace xi(n-d), so the molecule is simplified to
Figure BDA0002516261390000132
So that an FPGA can be implemented. Specifically, as shown in FIG. 5, first, the result x of the first term of the molecule is usediiAs input, H (14) × x is obtained via multiplier 301iiAnd then obtains H (17) × x through multipliers 302 and 303ii*|x1(n-1) |, through multipliers 304 and 305, H (20) × x is obtainedii*|x1(n-1)|2Likewise in xiiFor input, the multiplier 306 yields H (15) ×iiThen, H (18) × x is obtained by multipliers 307 and 308ii*|x1(n-2) |, and H (21) × x is obtained by multipliers 309 and 310ii*|x1(n-2)|2The seven groups of data are obtained by the adder 311 and the inverter 312
Figure BDA0002516261390000133
The result of (a), i.e., a molecule; then simultaneously with | x1(n) | is processed by multiplier 315 to obtain H (16) × |1(n)|,|x1(n)|2The multiplier 316 obtains H (19) ×1(n)|2The two sets of data and the coefficient H (13) are obtained by the adder 314
Figure BDA0002516261390000134
The result of (1).
And (3) optimizing complex division in the original anti-harmonic signal calculation formula by using a CORDIC algorithm based on the obtained original anti-harmonic signal calculation formula (2) to obtain an anti-harmonic signal. For complex division, cordic rotation is performed on a numerator and a denominator respectively, and then division operation of real numbers is performed. Specifically, the calculation formula of the original anti-harmonic signal is firstly simplified into
Figure BDA0002516261390000135
Form (b) x1And y1Is the real and imaginary part of the molecule, x2And y2Is the real and imaginary parts of the denominator, if according to the conventional complex division formula
Figure BDA0002516261390000141
The hardware needs to do multiplication 6 times, addition 3 times and division 2 times, and the calculation is complex and slow. The CORDIC algorithm is applied to simplify it.
A schematic diagram of the method for optimizing complex division in the original inverse harmonic signal calculation formula by using the CORDIC algorithm is shown in FIG. 6, and the real part x of the molecule is subjected to the optimization based on the original inverse harmonic signal1And of moleculesImaginary part y1Respectively calculating absolute values to obtain real part absolute values X of molecules11And the imaginary absolute value Y of the numerator11(ii) a Obtaining a rotation angle of a denominator based on the CORDIC Ipcore; rotating the real part of the denominator based on the rotation angle to obtain the real part rotation value X of the denominator22(ii) a Based on divider IPcore, real part absolute value X of molecule is utilized11Real part rotation value X divided by denominator22Obtaining the real part of the anti-harmonic signal, and using the absolute value Y of the imaginary part of the numerator11Real part rotation value X divided by denominator22And obtaining an imaginary part of the anti-harmonic signal, and finally obtaining the anti-harmonic signal. Specifically, using the Rotate function of CORDIC Ipcore, the rotation angle is given by the denominator CORDIC Ipcore. And then, only two real number divisions of the real part of the numerator divided by the denominator and the imaginary part of the numerator divided by the denominator are needed to be executed, and two divider IPcores are directly called to realize the real number division, so that the final result is obtained. As shown in table 1 below, the anti-harmonic signals obtained by using the CORDIC algorithm and without the CORDIC algorithm are compared, wherein fewer devices are used after the CORDIC algorithm is used, and hardware resources are saved. Secondly, the harmonic elimination result spectrogram without the CORDIC algorithm shown in fig. 7 and the harmonic elimination result spectrogram with the CORDIC algorithm shown in fig. 8 are inferior to the harmonic elimination effect obtained by directly performing complex division by about 3db when the CORDIC algorithm is not used, compared with the harmonic elimination effect obtained by using the CORDIC algorithm. Therefore, the harmonic elimination precision of the radio frequency power amplifier is improved by adopting the CORDIC algorithm.
TABLE 1 comparison of tables using CORDIC and without CORDI algorithms
Figure BDA0002516261390000151
The original anti-harmonic signal is obtained through the anti-harmonic generation unit, the CORDIC algorithm is adopted to optimize complex division in the original anti-harmonic signal calculation formula, the anti-harmonic signal is finally obtained, the speed of obtaining the anti-harmonic signal is improved, and meanwhile, the CORDIC algorithm is adopted to improve the harmonic elimination precision of the radio frequency power amplifier.
The invention discloses a method for eliminating harmonic waves of an ultra-wideband power amplifier based on an FPGA (field programmable gate array), which is used for eliminating harmonic interference signals generated after carrier signals pass through a power amplifier module. As shown in fig. 9, the method comprises the following steps:
and step S1, generating an initial harmonic signal.
S2, modeling a nonlinear channel of the harmonic frequency of the radio frequency power amplifier according to the harmonic signal and the baseband signal to obtain a channel parameter; the harmonic signals comprise initial harmonic signals and harmonic interference signals acquired from the power amplification module, and the baseband signals are baseband signals corresponding to the carrier signals.
And step S3, obtaining an anti-harmonic coefficient by calculation according to the harmonic signal, the baseband signal and the channel parameter.
And step S4, generating an anti-harmonic signal according to the anti-harmonic coefficient so as to eliminate the harmonic interference signal generated by the radio frequency power amplifier. The method specifically comprises the following steps:
and S41, obtaining the original anti-harmonic signal based on the anti-harmonic coefficient. The calculation formula for obtaining the original anti-harmonic signal based on the anti-harmonic coefficient is as follows:
Figure BDA0002516261390000152
in the formula, xi(n) is the original anti-harmonic signal, n is the sampling point, xiiIs a harmonic wave memory polynomial corresponding to the baseband signal, i is the harmonic wave number, D is the memory depth, D is the real-time memory depth, NiIs the order of the nonlinear effect, j is the order of the real-time nonlinear effect, hii(d, j) is the inverse harmonic coefficient, x1(n) is a baseband signal, x1And (n-d) is an intermodulation interference item of the baseband signal.
And S42, optimizing complex division in the original inverse harmonic signal calculation formula based on the CORDIC algorithm to obtain an inverse harmonic signal. The method specifically comprises the following steps:
s421, respectively calculating absolute values of the real part of the molecule and the imaginary part of the molecule based on the original anti-harmonic signal to obtain the absolute value of the real part of the molecule and the absolute value of the imaginary part of the molecule.
And S422, acquiring the rotation angle of the denominator based on the CORDIC Ipcore.
And S423, rotating the real part of the denominator based on the rotation angle to obtain a real part rotation value of the denominator.
And S424, based on the divider IPcore, dividing the absolute value of the real part of the numerator by the rotation value of the real part of the denominator to obtain the real part of the anti-harmonic signal, dividing the absolute value of the imaginary part of the numerator by the rotation value of the real part of the denominator to obtain the imaginary part of the anti-harmonic signal, and based on the real part and the imaginary part of the anti-harmonic signal, obtaining the anti-harmonic signal.
An ultra-wideband power amplifier harmonic elimination method based on FPGA utilizes FPGA to model a nonlinear channel of radio frequency power amplifier harmonic frequency to obtain channel parameters, then generates an anti-harmonic coefficient, and finally generates an anti-harmonic signal based on the anti-harmonic coefficient so as to eliminate harmonic interference signals generated after carrier signals pass through a power amplifier module. Meanwhile, complex division in the original anti-harmonic signal calculation formula is optimized based on the CORDIC algorithm, and the anti-harmonic signal is finally obtained, so that the speed of obtaining the anti-harmonic signal is increased, and the harmonic elimination precision of the radio frequency power amplifier is improved.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention.

Claims (4)

1. The utility model provides an ultra wide band power amplifier harmonic wave remove device based on FPGA for eliminate the harmonic interference signal that the carrier signal produced behind the power amplifier module, its characterized in that, harmonic wave remove device is realized by the FPGA module, include:
a training signal unit for generating an initial harmonic signal;
the power amplifier harmonic modeling unit is used for modeling a nonlinear channel of the harmonic frequency of the radio frequency power amplifier according to the harmonic signal and the baseband signal to obtain a channel parameter; the harmonic signal comprises the initial harmonic signal and a harmonic interference signal acquired from a power amplifier module, and the baseband signal is a baseband signal corresponding to the carrier signal;
the inverse harmonic coefficient calculation unit is used for calculating and obtaining an inverse harmonic coefficient according to the harmonic signal, the baseband signal and the channel parameter;
the anti-harmonic generation unit is used for generating an anti-harmonic signal according to the anti-harmonic coefficient so as to eliminate a harmonic interference signal generated by the radio frequency power amplifier; wherein the content of the first and second substances,
the anti-harmonic generation unit generating an anti-harmonic signal includes the steps of:
obtaining an original anti-harmonic signal based on the anti-harmonic coefficient; optimizing complex division in the original inverse harmonic signal calculation formula based on a CORDIC algorithm to obtain an inverse harmonic signal;
the calculation formula of the original anti-harmonic signal is as follows:
Figure FDA0003438743890000011
in the formula, xi(n) is the original anti-harmonic signal, n is the sampling point, xiiIs a harmonic wave memory polynomial corresponding to the baseband signal, i is the harmonic wave number, D is the memory depth, D is the real-time memory depth, NiIs the order of the nonlinear effect, j is the order of the real-time nonlinear effect, hii(d, j) is the inverse harmonic coefficient, x1(n) is a baseband signal, x1(n-d) is an intermodulation interference term of the baseband signal;
the method for optimizing complex division in the original inverse harmonic signal calculation formula based on the CORDIC algorithm to obtain the inverse harmonic signal comprises the following steps of:
respectively taking absolute values of the real part of the molecule and the imaginary part of the molecule based on the original anti-harmonic signal to obtain the absolute value of the real part of the molecule and the absolute value of the imaginary part of the molecule; obtaining a rotation angle of a denominator based on the CORDIC Ipcore; rotating the real part of the denominator based on the rotation angle to obtain a rotation value of the real part of the denominator; on the basis of the divider IPcore, dividing the absolute value of the real part of the numerator by the rotation value of the real part of the denominator to obtain the real part of the anti-harmonic signal, and dividing the absolute value of the imaginary part of the numerator by the rotation value of the real part of the denominator to obtain the imaginary part of the anti-harmonic signal; and obtaining an anti-harmonic signal based on the real part and the imaginary part of the anti-harmonic signal.
2. The harmonic elimination device of the ultra-wideband power amplifier of claim 1, wherein the FPGA module further comprises a signal alignment unit for aligning the harmonic signal with a baseband signal and outputting the aligned signal to the power amplifier harmonic modeling unit or the anti-harmonic coefficient calculation unit.
3. The harmonic elimination device of the ultra-wideband power amplifier of claim 2, wherein the FPGA module further comprises a gating unit for gating the training signal unit and outputting the initial harmonic signal to the signal alignment unit, and for gating the anti-harmonic generation unit and outputting the anti-harmonic signal.
4. An ultra-wideband power amplifier harmonic elimination method based on FPGA is used for eliminating harmonic interference signals generated after carrier signals pass through a power amplifier module, and is characterized by comprising the following steps:
generating an initial harmonic signal; modeling a nonlinear channel of the harmonic frequency of the radio frequency power amplifier according to the harmonic signal and the baseband signal to obtain a channel parameter; the harmonic signal comprises the initial harmonic signal and a harmonic interference signal acquired from a power amplifier module, and the baseband signal is a baseband signal corresponding to the carrier signal; calculating according to the harmonic signal, the baseband signal and the channel parameter to obtain an anti-harmonic coefficient; generating an anti-harmonic signal according to the anti-harmonic coefficient so as to eliminate a harmonic interference signal generated by the radio frequency power amplifier; wherein the content of the first and second substances,
the generating of the anti-harmonic signal according to the anti-harmonic coefficient comprises the following steps:
obtaining an original anti-harmonic signal based on the anti-harmonic coefficient; optimizing complex division in the original inverse harmonic signal calculation formula based on a CORDIC algorithm to obtain an inverse harmonic signal; the calculation formula of the original anti-harmonic signal is as follows:
Figure FDA0003438743890000031
in the formula, xi(n) is the original anti-harmonic signal, n is the sampling point, xiiIs a harmonic wave memory polynomial corresponding to the baseband signal, i is the harmonic wave number, D is the memory depth, D is the real-time memory depth, NiIs the order of the nonlinear effect, j is the order of the real-time nonlinear effect, hii(d, j) is the inverse harmonic coefficient, x1(n) is a baseband signal, x1(n-d) is an intermodulation interference term of the baseband signal;
the method for optimizing complex division in the original inverse harmonic signal calculation formula based on the CORDIC algorithm to obtain the inverse harmonic signal comprises the following steps of:
respectively solving absolute values of a real part of the molecule and an imaginary part of the molecule based on the original anti-harmonic signal to obtain an absolute value of the real part of the molecule and an absolute value of the imaginary part of the molecule; obtaining a rotation angle of a denominator based on the CORDIC Ipcore; rotating the real part of the denominator based on the rotation angle to obtain a real part rotation value of the denominator; on the basis of the divider IPcore, dividing the absolute value of the real part of the numerator by the rotation value of the real part of the denominator to obtain the real part of the anti-harmonic signal, and dividing the absolute value of the imaginary part of the numerator by the rotation value of the real part of the denominator to obtain the imaginary part of the anti-harmonic signal; and obtaining an anti-harmonic signal based on the real part and the imaginary part of the anti-harmonic signal.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6911925B1 (en) * 2004-04-02 2005-06-28 Tektronix, Inc. Linearity compensation by harmonic cancellation
EP2157691A1 (en) * 2008-08-20 2010-02-24 ST-Ericsson Belgium NV Signal generation with cancelled harmonics
EP3340477A1 (en) * 2016-12-23 2018-06-27 Nxp B.V. A wireless transmitter, a circuit, and method for driver harmonic reduction
CN108365862A (en) * 2018-01-22 2018-08-03 中国科学院微电子研究所 A kind of method and radio circuit for eliminating radio circuit harmonic wave

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6911925B1 (en) * 2004-04-02 2005-06-28 Tektronix, Inc. Linearity compensation by harmonic cancellation
EP2157691A1 (en) * 2008-08-20 2010-02-24 ST-Ericsson Belgium NV Signal generation with cancelled harmonics
EP3340477A1 (en) * 2016-12-23 2018-06-27 Nxp B.V. A wireless transmitter, a circuit, and method for driver harmonic reduction
CN108365862A (en) * 2018-01-22 2018-08-03 中国科学院微电子研究所 A kind of method and radio circuit for eliminating radio circuit harmonic wave

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
A digital harmonic canceling algorithm for power amplifiers in analysis way;Xuan Peng 等;《IEICE Electronics Express》;20180525;第15卷(第10期);第1-9页 *
Downconverter modelling with subharmonically pumped diode mixer and F-class power amplifier;T. V. Isnyuk 等;《2012 22nd International Crimean Conference "Microwave & Telecommunication Technology"》;20121022;全文 *
电气设备中高次谐波的影响及其抑制分析;刘小彩;《科技信息(科学教研)》;20080501(第13期);全文 *

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