CN111658319A

CN111658319A - Tinnitus treatment device

Info

Publication number: CN111658319A
Application number: CN202010517399.6A
Authority: CN
Inventors: 王子晗; 明安双
Original assignee: Yantai Tingyu Medical Technology Co ltd
Current assignee: Yantai Tingyu Medical Technology Co ltd
Priority date: 2020-06-09
Filing date: 2020-06-09
Publication date: 2020-09-15
Anticipated expiration: 2040-06-09
Also published as: CN111658319B

Abstract

A tinnitus treatment device is connected with and outputs a first audio signal through an audio interface component; the control circuit generates a control signal and a selection signal; the first storage component generates sound source signals; the audio conversion circuit converts the sound source signal into a second audio signal according to the control signal and outputs the second audio signal; the selection circuit selects to access the first audio signal or the second audio signal and outputs the first audio signal or the second audio signal based on the selection signal; the audio processing circuit performs band elimination filtering and amplification on the first audio signal or the second audio signal in a preset frequency interval to generate a target audio signal; because the first storage component is configured at the same time as the audio interface component is configured, the audio information in the first storage component or the audio information sent by the audio interface component can be selected to be played, thereby enriching the functions of the tinnitus treatment device.

Description

Tinnitus treatment device

Technical Field

The application belongs to the medical device field, especially relates to a tinnitus treatment device.

Background

At present, the traditional tinnitus treatment device comprises a microprocessor unit, and a key unit, a communication unit, a program control amplification unit, an audio power amplification unit and a frequency band elimination filter which are respectively connected with the microprocessor unit, wherein the frequency band elimination filter can adjust the edge frequency gains at two ends of the band elimination filter, an audio input interface of an earphone body is connected with the input end of the frequency band elimination filter through the program control amplification unit, and the output end of the frequency band elimination filter is connected with an audio output device of the earphone body through the audio power amplification unit. Since the conventional tinnitus treatment device can only access the audio signal through the audio input interface, it must be used in cooperation with a terminal device (such as a mobile phone), resulting in poor portability of use.

Disclosure of Invention

The utility model aims to provide a tinnitus treatment device aims at solving traditional tinnitus treatment device existence and only can insert audio signal through audio input interface to lead to the relatively poor problem of portability of using.

The embodiment of the application provides a tinnitus treatment device, includes:

an audio interface component configured to access and output a first audio signal;

a control circuit configured to generate a control signal and a selection signal;

a first storage component configured to generate an audio source signal;

the audio conversion circuit is connected with the first storage component and the control circuit and is configured to convert the sound source signal into a second audio signal according to the control signal and output the second audio signal;

the selection circuit is connected with the audio conversion circuit, the audio interface component and the control circuit and is configured to select to access the first audio signal or the second audio signal and output the first audio signal or the second audio signal based on the selection signal;

and the audio processing circuit is connected with the selection circuit and is configured to perform band elimination filtering and amplification on the first audio signal or the second audio signal in a preset frequency interval so as to generate a target audio signal.

In one embodiment, the audio processing circuit comprises:

the filter circuit is connected with the selection circuit and is configured to perform band elimination filtering on the first audio signal or the second audio signal in a preset frequency interval so as to generate a third audio signal;

a power amplification circuit coupled to the filter circuit and configured to amplify the third audio signal to generate a target audio signal.

In one embodiment, the tinnitus treatment device further comprises:

a key assembly connected to the control circuit and configured to generate a key signal;

the control circuit is further configured to generate the control signal and the selection signal based on the key signal.

In one embodiment, the tinnitus treatment device further comprises:

a pre-amplification circuit connected to the audio processing circuit and configured to amplify the target audio signal to generate a fourth audio signal;

an operational amplifier circuit connected to the pre-amplifier circuit and the control circuit and configured to rectify, filter and amplify the fourth audio signal to generate a detection signal;

the second storage component is connected with the control circuit and is configured to store the use state information;

the control circuit is further configured to generate the usage state information based on a detection signal.

In one embodiment, the preamplifier circuit comprises a first operational amplifier, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a first resistor and a second resistor;

a first gain end of the first operational amplifier is connected to a first end of the first resistor, a second end of the first resistor is connected to a first end of the first capacitor, a second end of the first capacitor is connected to a second gain end of the first operational amplifier, a non-inverting input end of the first operational amplifier is a target audio signal input end of the preamplifier circuit, a power end of the first operational amplifier is connected to a fourth power supply, a bypass capacitor end of the first operational amplifier is connected to a first end of the second capacitor, an output end of the first operational amplifier is connected to a first end of the third capacitor and a first end of the fourth capacitor, a second end of the fourth capacitor is connected to a first end of the second resistor, and a second end of the third capacitor is a fourth audio signal output end of the preamplifier circuit, the inverting input end of the first operational amplifier, the grounding end of the first operational amplifier, the second end of the second capacitor and the second end of the second resistor are connected to a power ground in common.

In one embodiment, the operational amplifier circuit includes a second operational amplifier, a third operational amplifier, a fourth operational amplifier, a fifth operational amplifier, a first diode, a second diode, a first inductor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, and a sixteenth resistor;

the positive power end of the second operational amplifier is connected with a positive power supply and a first end of a fifth capacitor, the positive power end of the second operational amplifier is connected with a negative power supply, the non-inverting input end of the second operational amplifier is connected with a first end of an eighth resistor, the inverting input end of the second operational amplifier is connected with the cathode of the first diode, the first end of the fifth resistor and the first end of the sixth resistor, the second end of the fifth resistor and the first end of the third resistor jointly form a fourth audio signal input end of the operational amplification circuit, the output end of the second operational amplifier is connected with the anode of the first diode and the cathode of the second diode, the anode of the second diode is connected with the second end of the sixth resistor and the first end of the seventh resistor, and the inverting input end of the third operational amplifier is connected with the second end of the third resistor, A second end of the seventh resistor and a first end of the fourth resistor are connected, a non-inverting input terminal of the third operational amplifier is connected to a first end of the ninth resistor, an output terminal of the third operational amplifier is connected to a second end of the fourth resistor and a first end of the tenth resistor, a second end of the tenth resistor is connected to a first end of the sixth capacitor and a first end of the eleventh resistor, a non-inverting input terminal of the fourth operational amplifier is connected to a second end of the eleventh resistor and a first end of the eighth capacitor, an inverting input terminal of the fourth operational amplifier is connected to a first end of the twelfth resistor and a first end of the thirteenth resistor, and an output terminal of the fourth operational amplifier is connected to a second end of the sixth capacitor, a second end of the twelfth resistor and a first end of the fourteenth resistor, a non-inverting input terminal of the fifth operational amplifier is connected to the second terminal of the fourteenth resistor, an inverting input terminal of the fifth operational amplifier is connected to the first terminal of the seventh capacitor, the first terminal of the fifteenth resistor, and the first terminal of the sixteenth resistor, a second terminal of the sixteenth resistor is a reference voltage input terminal of the operational amplifier circuit, and an output terminal of the fifth operational amplifier, the second terminal of the seventh capacitor, and the second terminal of the fifteenth resistor together form a detection signal output terminal of the operational amplifier circuit;

the second end of the eighth resistor, the second end of the ninth resistor, the second end of the eighth capacitor and the second end of the thirteenth resistor are connected to a signal ground in common, the signal ground is connected to the first end of the first inductor, and the second end of the first inductor is connected to a power ground.

In one embodiment, the tinnitus treatment device further comprises:

the wireless communication circuit is connected with the control circuit and is configured to generate a wireless communication signal according to the use state information and send the wireless communication signal to an upper computer from a wireless communication link;

the control circuitry is further configured to forward the usage status information.

In one embodiment, the tinnitus treatment device further comprises:

the USB interface component is connected with the control circuit and is configured to be connected with and output a USB signal;

the third storage component is connected with the control circuit and the audio processing circuit and is configured to store a preset frequency interval according to the first wired communication signal;

the control circuit is further configured to generate the first wired communication signal from the USB signal.

In one embodiment, the audio conversion circuit comprises an audio playing main control chip, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor and a twentieth resistor;

the SD card data end of the audio playing main control chip, the SD card command end of the audio playing main control chip and the SD card clock end of the audio playing main control chip jointly constitute a sound source signal input end of the audio conversion circuit, the UART data input end of the audio playing main control chip and the UART data output end of the audio playing main control chip jointly constitute a control signal input end of the audio conversion circuit, the left sound channel output end of the audio playing main control chip is connected with the first end of the seventeenth resistor, the right sound channel output end of the audio playing main control chip is connected with the first end of the nineteenth resistor, the second end of the seventeenth resistor, the first end of the eighteenth resistor, the second end of the nineteenth resistor and the first end of the twentieth resistor jointly constitute a first audio signal output end of the audio conversion circuit, the second end of the eighteenth resistor and the second end of the twentieth resistor are connected to a power ground in common.

In one embodiment, the control circuit comprises a microprocessor, a twenty-first resistor, a twenty-second resistor, and a twenty-third resistor;

microprocessor's UART data output end with the first end of twenty first resistance is connected, microprocessor's UART data input end with the first end of twenty second resistance and the first end of twenty third resistance are connected, the second end of twenty second resistance and the second end of twenty third resistance constitute jointly control circuit's control signal output, microprocessor's first data input output end does control circuit's selection signal output part, microprocessor's second data input output end does control circuit's detection signal input part, microprocessor's I2C data end with microprocessor's I2C clock end constitutes jointly control circuit's first wired communication signal output part, the second end of twenty third resistance is connected with first power.

In one embodiment, the filter circuit comprises an audio processor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a twenty-fourth resistor, a twenty-fifth resistor, a twenty-sixth resistor, a twenty-seventh resistor, a twenty-eighth resistor, a twenty-ninth resistor, a thirty-eleventh resistor, a thirty-second resistor, and a thirty-third resistor;

the I2C data input end of the audio processor, the I2C clock input end of the audio processor, the first end of the twenty-fourth resistor and the first end of the twenty-fifth resistor jointly form the preset frequency interval input end of the filter circuit, the second end of the twenty-fourth resistor and the second end of the twenty-fifth resistor are commonly connected to a second power supply VBB, the first audio output end of the audio processor is connected to the first end of the eighth capacitor, the second audio output end of the audio processor is connected to the first end of the ninth capacitor, the second end of the eighth capacitor is connected to the first end of the twenty-sixth resistor, the second end of the ninth capacitor is connected to the first end of the twenty-seventh resistor, the second end of the twenty-sixth resistor, the second end of the twenty-seventh resistor, the first end of the tenth capacitor, the first end of the twenty-sixth resistor, the second end of the twenty-seventh resistor, the first end of, A first end of the eleventh capacitor, a first end of the twenty-eighth resistor, and a first end of the twenty-ninth resistor together form a third audio signal output end of the filter circuit, a first analog input end of the audio processor is connected to a first end of the thirty-second resistor, a second analog input end of the audio processor is connected to a first end of the thirty-third resistor, a second end of the thirty-third resistor is connected to a first end of the twelfth capacitor, a second end of the thirty-second resistor is connected to a first end of the fourteenth capacitor, a second end of the twelfth capacitor, a second end of the fourteenth capacitor, a first end of the thirteenth capacitor, a first end of the fifteenth capacitor, a first end of the thirty-eighth resistor, and a first end of the thirty-third resistor together form a first audio signal input end of the filter circuit or a second audio signal input end of the filter circuit, the second end of the tenth capacitor, the second end of the eleventh capacitor, the second end of the twenty-eighth resistor, the second end of the twenty-ninth resistor, the second end of the thirteenth capacitor, the second end of the fifteenth capacitor, the second end of the thirty-first resistor, and the second end of the thirty-third resistor are connected to a power ground in common.

In one embodiment, the selection circuit comprises a relay, a first field effect transistor, a second field effect transistor, a sixteenth capacitor, a thirty-third resistor, a thirty-fourth resistor and a thirty-fifth resistor;

the first input end of the A channel of the relay and the second input end of the A channel of the relay jointly form a second audio signal input end of the selection circuit, the first input end of the B channel of the relay and the second input end of the B channel of the relay jointly form a first audio signal input end of the selection circuit, the first output end of the relay and the second output end of the relay jointly form an output end of the selection circuit, the positive control end of the relay is connected with the source electrode of the first field effect transistor, the drain electrode of the first field effect transistor, the first end of the sixteenth capacitor and the first end of the thirty-third resistor are jointly connected with a third power supply, the grid electrode of the first field effect transistor is connected with the second end of the thirty-third resistor and the drain electrode of the second field effect transistor, and the grid electrode of the second field effect transistor is connected with the first end of the thirty-fourth resistor and the first end of the thirty-fifth resistor, a second end of the thirty-fourth resistor is a selection signal input end of the selection circuit, and a second end of the sixteenth capacitor, a negative control end of the relay, a source electrode of the second field effect transistor and a second end of the thirty-fifth resistor are connected to a power ground in common.

Compared with the prior art, the embodiment of the invention has the following beneficial effects: the tinnitus treatment device is provided with the first storage component at the same time of the audio interface component, the selection circuit can select to access the first audio signal or the second audio signal and output the first audio signal or the second audio signal according to the selection signal, the first audio signal and the second audio signal can be selectively played, and a user can select to play the audio information in the first storage component or the audio information sent by the audio interface component, so that the function of the tinnitus treatment device is enriched.

Drawings

In order to more clearly illustrate the technical invention in the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without inventive efforts.

Fig. 1 is a schematic structural diagram of a tinnitus treatment device according to an embodiment of the present application;

fig. 2 is a schematic diagram of an audio processing circuit of a tinnitus treatment device according to an embodiment of the present application;

fig. 3 is another schematic structural diagram of a tinnitus treatment device according to an embodiment of the present application;

fig. 4 is another schematic structural diagram of a tinnitus treatment device according to an embodiment of the present application;

fig. 5 is another schematic structural diagram of a tinnitus treatment device according to an embodiment of the present application;

fig. 6 is another schematic structural diagram of a tinnitus treatment device according to an embodiment of the present application;

fig. 7 is a schematic diagram of a portion of an exemplary circuit in the tinnitus treatment device of fig. 1;

fig. 8 is a schematic diagram of a portion of an exemplary circuit in the tinnitus treatment device of fig. 4.

Detailed Description

In order to make the technical problems, technical solutions and advantageous effects to be solved by the present application clearer, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.

It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.

It will be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like, refer to an orientation or positional relationship illustrated in the drawings for convenience in describing the present application and to simplify description, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present application.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.

Fig. 1 shows a schematic structural diagram of a tinnitus treatment device provided in a preferred embodiment of the present application, and for convenience of illustration, only the parts related to the present embodiment are shown, and the details are as follows:

the tinnitus treatment device comprises an audio interface component 11, a control circuit 12, a first storage component 13, an audio conversion circuit 14, a selection circuit 15 and an audio processing circuit 16.

The audio interface component 11 is configured to access and output a first audio signal; the control circuit 12 is configured to generate a control signal and a selection signal; the first storage component 13 is configured to generate an audio source signal; the audio conversion circuit 14 is connected to the first storage element 13 and the control circuit 12, and configured to convert the sound source signal into a second audio signal according to the control signal and output the second audio signal; the selection circuit 15 is connected to the audio conversion circuit 14, the audio interface component 11 and the control circuit 12, and is configured to select to access the first audio signal or the second audio signal and output the selected signal based on the selection signal; the audio processing circuit 16 is connected to the selection circuit 15, and configured to perform band-stop filtering and amplification on the first audio signal or the second audio signal in a preset frequency interval to generate a target audio signal.

The preset frequency interval is a frequency interval of the sound of tinnitus of a patient (user).

As shown in fig. 2, the audio processing circuit 16 includes a filter circuit 161 and a power amplification circuit 162.

The filter circuit 161 is connected to the selection circuit 15, and is configured to perform band-stop filtering on the first audio signal or the second audio signal in a preset frequency interval to generate a third audio signal; the power amplification circuit 17 is connected to the filter circuit 161, and configured to amplify the third audio signal to generate a target audio signal.

The target audio signal is an audio signal for playing, and may be input to a playing component (such as an earphone or a sound box), and the playing component plays according to the target audio signal.

As shown in fig. 3, the tinnitus treatment device further includes a key assembly 18.

The key assembly 18 is connected to the control circuit 12 and configured to generate a key signal; the control circuit 12 is further configured to generate a control signal and a selection signal based on the key signal.

The key assembly 18 is used for generating a key signal, so that the control circuit 12 generates a control signal and a selection signal based on the key signal, the selection circuit 15 selects to access the first audio signal or the second audio signal according to the selection signal and outputs the first audio signal or the second audio signal, the first audio signal and the second audio signal are selectively played, a user can select to play the audio information in the first storage assembly 13 or the audio information sent by the audio interface assembly 11 through keys, and the function of the tinnitus treatment device is enriched.

As shown in fig. 4, the tinnitus treatment device further comprises a pre-amplifying circuit 19, an operational amplifying circuit 20 and a second storage component 21.

The pre-amplifying circuit 19 is connected to the audio processing circuit 16, and configured to amplify the target audio signal to generate a fourth audio signal; the operational amplifier circuit 20 is connected to the preamplifier circuit 19 and the control circuit 12, and configured to rectify, filter, and amplify the fourth audio signal to generate a detection signal; the second storage component 21 is connected with the control circuit 12 and is configured to store the use state information; the control circuit 12 is also configured to generate usage status information from the detection signal.

The target audio signal is amplified through the preamplifier circuit 19, the operational amplifier circuit 20 rectifies, filters and amplifies the amplified target audio signal, so that a simulated detection signal is obtained, the control circuit 12 judges whether the detection signal is greater than a preset threshold value, if the detection signal is greater than the preset threshold value, the use state is recorded as the use state, and meanwhile, the second storage component 21 stores the use state information, so that the monitoring of the tinnitus treatment process is realized.

The operation amplifying circuit 20 specifically performs rectification, filtering and amplification on the amplified target audio signal as follows: the operational amplifier circuit 20 rectifies the amplified target audio signal to generate a steamed bread wave, the operational amplifier circuit 20 filters the steamed bread wave to generate a direct current voltage, and finally the operational amplifier circuit 20 amplifies the direct current voltage to generate a detection signal.

As shown in fig. 5, the tinnitus treatment device further comprises a wireless communication circuit 22.

The wireless communication circuit 22 is connected with the control circuit 12 and configured to generate a wireless communication signal according to the use state information and transmit the wireless communication signal to the upper computer from the wireless communication link; the control circuit 12 is also configured to forward the usage status information.

Wireless communication signals are generated through the wireless communication circuit 22 according to the use state information and are transmitted to the upper computer from the wireless communication link, so that a user or a doctor can monitor tinnitus treatment conditions of the patient through the upper computer.

As shown in fig. 6, the tinnitus treatment device further includes a Universal Serial Bus (USB) interface component 23 and a third storage component 24.

The USB interface component 23 is connected to the control circuit 12, and configured to access and output a USB signal; the third storage component 24 is connected with the control circuit 12 and the audio processing circuit 16, and is configured to store the preset frequency interval according to the first wired communication signal; the control circuit 12 is also configured to generate a first wired communication signal from the USB signal.

The USB interface component 23 is used for accessing and outputting a USB signal carrying a preset frequency interval, the control circuit 12 generates a first wired communication signal according to the USB signal, and the third storage component 24 stores the preset frequency interval according to the first wired communication signal, so that the audio processing circuit 16 can perform band elimination filtering on the first audio signal or the second audio signal in the preset frequency interval to generate a third audio signal; the preset frequency interval can be written into the third storage component 24 through the USB interface component 23, so that the parameter configuration process of the tinnitus treatment device is simplified, and the usability of the tinnitus treatment device is improved.

Fig. 7 shows a part of an exemplary circuit structure of a bidirectional wireless audio transmission apparatus provided by an embodiment of the present invention, fig. 8 shows a part of an exemplary circuit structure of a bidirectional wireless audio transmission apparatus provided by an embodiment of the present invention, and for convenience of description, only the part related to an embodiment of the present invention is shown, and details are as follows:

the pre-amplification circuit 19 comprises a first operational amplifier U1, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a first resistor R1 and a second resistor R2;

the first GAIN terminal GAIN of the first operational amplifier U1 is connected to the first terminal of the first resistor R1, the second terminal of the first resistor R1 is connected to the first terminal of the first capacitor C1, the second terminal of the first capacitor C1 is connected to the second GAIN terminal GAIN of the first operational amplifier U1, the non-inverting INPUT + INPUT of the first operational amplifier U1 is the target audio signal INPUT terminal of the preamplifier circuit 19, the power source terminal VS of the first operational amplifier U1 is connected to the fourth power source VDD, the BYPASS capacitor terminal BYPASS of the first operational amplifier U1 is connected to the first terminal of the second capacitor C2, the output terminal VOUT of the first operational amplifier U1 is connected to the first terminal of the third capacitor C3 and the first terminal of the fourth capacitor C4, the second terminal of the fourth capacitor C4 is connected to the first terminal of the second resistor R2, the second terminal of the third capacitor C3 is the fourth audio signal output terminal of the preamplifier circuit 19, and the inverting INPUT terminal of the first operational amplifier U1-PUT is connected to the first terminal of the second operational amplifier U3683, The ground GND of the first operational amplifier U1, the second terminal of the second capacitor C2, and the second terminal of the second resistor R2 are connected to the power ground.

The operational amplifier circuit 2120 includes a second operational amplifier U2, a third operational amplifier U3, a fourth operational amplifier U4, a fifth operational amplifier U5, a first diode D1, a second diode D2, a first inductor L1, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, and a sixteenth resistor R16;

a positive power supply end of the second operational amplifier U2 is connected with a positive power supply + V and a first end of a fifth capacitor C5, a positive power supply end of the second operational amplifier U2 is connected with a negative power supply-V, a non-inverting input end of the second operational amplifier U2 is connected with a first end of an eighth resistor R8, an inverting input end of the second operational amplifier U2 is connected with a negative electrode of a first diode D1, a first end of a fifth resistor R5 and a first end of a sixth resistor R6, a second end of the fifth resistor R5 and a first end of a third resistor R3 jointly form a fourth audio signal input end of an operational amplifier circuit 2120, an output end of the second operational amplifier U2 is connected with a positive electrode of the first diode D1 and a negative electrode of a second diode D2, a positive electrode of the second diode D2 is connected with a second end of the sixth resistor R6 and a first end of a seventh resistor R7, an inverting input end of the third operational amplifier U3 is connected with a second end of a second resistor R3, A second end of the seventh resistor R7 and a first end of the fourth resistor R4 are connected, a non-inverting input terminal of the third operational amplifier U3 is connected to a first end of the ninth resistor R9, an output terminal of the third operational amplifier U3 is connected to a second end of the fourth resistor R4 and a first end of the tenth resistor R10, a second end of the tenth resistor R10 is connected to a first end of the sixth capacitor C6 and a first end of the eleventh resistor R11, a non-inverting input terminal of the fourth operational amplifier U4 is connected to a second end of the eleventh resistor R11 and a first end of the eighth capacitor C8, an inverting input terminal of the fourth operational amplifier U4 is connected to a first end of the twelfth resistor R12 and a first end of the thirteenth resistor R42, an output terminal of the fourth operational amplifier U4 is connected to a second end of the sixth capacitor C6, a second end of the twelfth resistor R12 and a first end of the fourteenth resistor R5, a non-inverting input terminal of the fifth operational amplifier U5 is connected to a second end of the fourteenth resistor R57324, an inverting input terminal of the fifth operational amplifier U5 is connected to the first terminal of the seventh capacitor C7, the first terminal of the fifteenth resistor R15, and the first terminal of the sixteenth resistor R16, a second terminal of the sixteenth resistor R16 is a reference voltage input terminal of the operational amplifier circuit 2120, and an output terminal of the fifth operational amplifier U5, a second terminal of the seventh capacitor C7, and a second terminal of the fifteenth resistor R15 together form a detection signal output terminal of the operational amplifier circuit 2120;

the second terminal of the eighth resistor R8, the second terminal of the ninth resistor R9, the second terminal of the eighth capacitor C8, and the second terminal of the thirteenth resistor R13 are commonly connected to the signal ground, the signal ground is connected to the first terminal of the first inductor L1, and the second terminal of the first inductor L1 is connected to the power ground.

The audio conversion circuit 14 includes an audio playback main control chip U6, a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, and a twentieth resistor R20;

the SD card data terminal SD _ DAT of the audio playback main control chip U6, the SD card command terminal SD _ CMD of the audio playback main control chip U6, and the SD card clock terminal SD _ CLK of the audio playback main control chip U6 together form an audio source signal input terminal of the audio conversion circuit 14, the UART data input terminal RX of the audio playback main control chip U6 and the universal asynchronous Receiver/Transmitter (UART) data output terminal TX of the audio playback main control chip U6 together form a control signal input terminal of the audio conversion circuit 14, the left channel output terminal DACL of the audio playback main control chip U6 is connected to a first terminal of a seventeenth resistor R17, the right channel output terminal DACR of the audio playback main control chip U6 is connected to a first terminal of a nineteenth resistor R19, a second terminal of the seventeenth resistor R17, a first terminal of an eighteenth resistor R18, a second terminal of the nineteenth resistor R19, and a first terminal of the twentieth resistor R20 together form a first audio signal output terminal of the audio conversion circuit 14, the second end of the eighteenth resistor R18 and the second end of the twentieth resistor R20 are connected to the power ground.

The control circuit 12 comprises a microprocessor U7, a twenty-first resistor R21, a twenty-second resistor R22 and a twenty-third resistor R23;

the UART data output terminal TX2 of the microprocessor U7 is connected to a first terminal of the twenty-first resistor R21, the UART data input terminal RX2 of the microprocessor U7 is connected to a first terminal of the twenty-second resistor R22 and a first terminal of the twenty-third resistor R23, a second terminal of the twenty-second resistor R22 and a second terminal of the twenty-third resistor R23 together form a control signal output terminal of the control circuit 12, the first data input output terminal PB1 of the microprocessor U7 is a selection signal output terminal of the control circuit 12, the second data input output terminal PB0 of the microprocessor U7 is a detection signal input terminal of the control circuit 12, the I2C data terminal I2C _ SDA of the microprocessor U7 and the I2C clock terminal I2C _ SCL of the microprocessor U7 together form a first wired communication signal output terminal of the control circuit 12, and a second terminal of the twenty-third resistor R23 is connected to the first power supply VAA.

The filter circuit 161 includes an audio processor U8, an eighth capacitor C8, a ninth capacitor C9, a tenth capacitor C10, an eleventh capacitor C11, a twelfth capacitor C12, a thirteenth capacitor C13, a fourteenth capacitor C14, a fifteenth capacitor C15, a twenty-fourth resistor R24, a twenty-fifth resistor R25, a twenty-sixth resistor R26, a twenty-seventh resistor R27, a twenty-eighth resistor R28, a twenty-ninth resistor R29, a thirty resistor R30, a thirty-eleventh resistor R31, a thirty-second resistor R32 and a thirty-third resistor R33;

the I2C data input SDA of the audio processor U8, the Integrated Circuit bus (I2C) clock input SCL of the audio processor U8, the first terminal of the twenty-fourth resistor R24 and the first terminal of the twenty-fifth resistor R25 together form an input terminal of the filter Circuit 161 in a predetermined frequency range, the second terminal of the twenty-fourth resistor R24 and the second terminal of the twenty-fifth resistor R25 are commonly connected to the second power VBB, the first audio output terminal OUT2 of the audio processor U8 is connected to the first terminal of the eighth capacitor C8, the second audio output terminal OUT3 of the audio processor U8 is connected to the first terminal of the ninth capacitor C9, the second terminal of the eighth capacitor C8 is connected to the first terminal of the twenty-sixth resistor R26, the second terminal of the ninth capacitor C9 is connected to the first terminal of the twenty-seventh resistor R27, the second terminal of the sixth resistor R26, the second terminal of the twenty-sixth resistor R27 and the first terminal of the twenty-fifth resistor R10, A first end of the eleventh capacitor C11, a first end of the twenty-eighth resistor R28, and a first end of the twenty-ninth resistor R29 together form a third audio signal output terminal of the filter circuit 161, a first analog input terminal ADC0 of the audio processor U8 is connected to a first end of a thirty-second resistor R32, a second analog input terminal ADC1 of the audio processor U8 is connected to a first end of a thirty-third resistor R30, a second end of a thirty-third resistor R30 is connected to a first end of a twelfth capacitor C12, a second end of a thirty-second resistor R32 is connected to a first end of a fourteenth capacitor C14, a second end of a twelfth capacitor C12, a second end of a fourteenth capacitor C14, a first end of a thirteenth capacitor C13, a first end of a fifteenth capacitor C15, a first end of a thirty-third resistor R31, and a first end of a thirty-third resistor R33 together form a first audio signal input terminal of the filter circuit 161 or a second audio signal input terminal of the filter circuit 161, the second end of the tenth capacitor C10, the second end of the eleventh capacitor C11, the second end of the twenty-eighth resistor R28, the second end of the twenty-ninth resistor R29, the second end of the thirteenth capacitor C13, the second end of the fifteenth capacitor C15, the second end of the thirty-eleventh resistor R31 and the second end of the thirty-third resistor R33 are connected to the power ground in common.

The selection circuit 15 comprises a relay U9, a first field effect transistor M1, a second field effect transistor M2, a sixteenth capacitor C16, a thirty-third resistor R33, a thirty-fourth resistor R34 and a thirty-fifth resistor R35;

a first input end SW1A of an a channel of the relay U9 and a second input end SW2A of an a channel of the relay U9 jointly constitute a second audio signal input end of the selection circuit 15, a first input end SW1B of a B channel of the relay U9 and a second input end SW2B of a B channel of the relay U9 jointly constitute a first audio signal input end of the selection circuit 15, a first output end SW1 of the relay U9 and a second output end SW2 of the relay U9 jointly constitute an output end of the selection circuit 15, a positive control end M + of the relay U9 is connected to a source of the first fet M1, a drain of the first fet M1, a first end of a sixteenth capacitor C16 and a first end of a thirty-third resistor R33 are jointly connected to a third power source VCC, a gate of the first fet M1 is connected to a second end of a thirty-third resistor R33 and a drain of the second fet M2, a gate of the second fet M2 is connected to a thirty-fourth end of a thirty-fourth resistor R34 and a thirty-fifth end of a resistor R35, the second terminal of the thirty-fourth resistor R34 is the selection signal input terminal of the selection circuit 15, and the second terminal of the sixteenth capacitor C16, the negative control terminal M-of the relay U9, the source of the second fet M2, and the second terminal of the thirty-fifth resistor R35 are commonly connected to the power ground.

The following further description of fig. 7 and 8 is made in conjunction with the working principle:

the first storage component 13 generates sound source signals; the SD card data terminal SD _ DAT of the audio playback main control chip U6, the SD card command terminal SD _ CMD of the audio playback main control chip U6, and the SD card clock terminal SD _ CLK of the audio playback main control chip U6 collectively receive a sound source signal, the microprocessor U7 generates a control signal, and outputs the control signal from the UART data output terminal TX2 of the microprocessor U7 to the UART data input terminal RX of the audio playback main control chip U6, and the audio playback main control chip U6 generates a second audio signal according to the control signal and the sound source signal, and outputs the control signal from the left channel output terminal DACL of the audio playback main control chip U6 and the right channel output terminal DACR of the audio playback main control chip U6 to the a channel first input terminal SW1A of the relay U9 and the a channel second input terminal SW2A of the relay U9. At this time, the audio interface module 11 may couple and output the first audio signal to the B-channel first input terminal SW1B of the relay U9 and the B-channel second input terminal SW2B of the relay U9; the microprocessor U7 also generates a selection signal to be output from the data input and output terminal PB1 of the microprocessor U7 to the gate of the second fet M2, thereby generating a relay control signal having the same level as the selection signal at the positive control terminal M + of the relay U9, the first output terminal SW1 of the relay U9 and the second output terminal SW2 of the relay U9 output a first audio signal or a second audio signal to the first analog input terminal ADC0 of the audio processor U8 and the second analog input terminal ADC1 of the audio processor U8 according to the level state of the relay control signal, the I2C data input terminal SDA of the audio processor U8 and the I2C clock input terminal SCL of the audio processor U8 are input to a preset frequency interval transmitted from the third storage module 24, the audio processor U8 band-stop filters the first audio signal or the second audio signal at the preset frequency interval to generate a third audio signal and outputs the third audio signal from the first audio output terminal PB 8 of the audio processor U8 and the second audio processor U5857324 to the audio processor U58573 24 The rate amplification circuit 162, the power amplification circuit 162 amplifies the third audio signal to generate a target audio signal.

Meanwhile, the non-inverting INPUT terminal + INPUT of the first operational amplifier U1 INPUTs the target audio signal, and the first operational amplifier U1 amplifies the target audio signal to generate a fourth audio signal and outputs it from the output terminal VOUT of the first operational amplifier U1.

The second operational amplifier U2, the third operational amplifier U3, the fourth operational amplifier U4 and the fifth operational amplifier U5 rectify, filter and amplify the fourth audio signal to generate a detection signal, and send the detection signal to the second data input/output end PB0 of the microprocessor U7, and the microprocessor U7 generates the use state information according to the detection signal and sends the use state information to the second storage component, so that the second storage component stores the use state information.

The embodiment of the invention accesses and outputs a first audio signal through the audio interface component; the control circuit generates a control signal and a selection signal; the first storage component generates sound source signals; the audio conversion circuit converts the sound source signal into a second audio signal according to the control signal and outputs the second audio signal; the selection circuit selects to access the first audio signal or the second audio signal and outputs the first audio signal or the second audio signal based on the selection signal; the audio processing circuit performs band elimination filtering and amplification on the first audio signal or the second audio signal in a preset frequency interval to generate a target audio signal; the first storage component is configured while the audio interface component is configured, the selection circuit can select to access the first audio signal or the second audio signal and output the first audio signal or the second audio signal according to the selection signal, the first audio signal and the second audio signal can be selectively played, and a user can select to play the audio information in the first storage component or the audio information sent by the audio interface component, so that the function of the tinnitus treatment device is enriched.

It should be understood that, the sequence numbers of the steps in the foregoing embodiments do not imply an execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.

The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.

Claims

1. A tinnitus treatment device comprising:

a first storage component configured to generate an audio source signal;

2. The tinnitus treatment apparatus of claim 1 wherein the audio processing circuit comprises:

3. The tinnitus treatment apparatus of claim 1 wherein said tinnitus treatment apparatus further comprises:

4. The tinnitus treatment apparatus of claim 1 wherein said tinnitus treatment apparatus further comprises:

5. The tinnitus treatment device of claim 4 wherein the preamplifier circuit includes a first operational amplifier, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a first resistor, and a second resistor;

6. The tinnitus treatment device of claim 4 wherein the operational amplification circuit comprises a second operational amplifier, a third operational amplifier, a fourth operational amplifier, a fifth operational amplifier, a first diode, a second diode, a first inductor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, and a sixteenth resistor;

7. The tinnitus treatment apparatus of claim 4 wherein said tinnitus treatment apparatus further comprises:

8. The tinnitus treatment apparatus of claim 1 wherein said tinnitus treatment apparatus further comprises:

9. The tinnitus treatment device of claim 1 wherein the control circuit comprises a microprocessor, a twenty-first resistor, a twenty-second resistor, and a twenty-third resistor;

10. The tinnitus treatment device of claim 1 wherein the selection circuit comprises a relay, a first field effect transistor, a second field effect transistor, a sixteenth capacitor, a thirty-third resistor, a thirty-fourth resistor, and a thirty-fifth resistor;