CN111654214B

CN111654214B - Motor drive integrated circuit, optical filter switching circuit and shooting device

Info

Publication number: CN111654214B
Application number: CN201910159390.XA
Authority: CN
Inventors: 王羽; 袁明; 毛黎高
Original assignee: Hangzhou Hikvision Digital Technology Co Ltd
Current assignee: Hangzhou Hikvision Digital Technology Co Ltd
Priority date: 2019-03-04
Filing date: 2019-03-04
Publication date: 2022-03-25
Anticipated expiration: 2039-03-04
Also published as: CN111654214A

Abstract

The application discloses motor drive integrated circuit, light filter switching circuit and shooting device. The motor driving integrated circuit comprises a power supply end, a power supply conversion module, a control input end, a level conversion module, a driving module and a driving output end. The power supply terminal is used for receiving direct current. The power conversion module is electrically connected with the power end and used for reducing the voltage of the direct current into reference voltage. The control input terminal is used for receiving a control signal. The level conversion module is electrically connected with the control input end and the power conversion module and is used for converting the control signal into a level signal based on the reference voltage. The driving module is electrically connected with the power conversion module and the level conversion module and used for receiving the reference voltage of the power conversion module and converting the level signal into a driving signal. The driving output end is electrically connected with the driving module and used for outputting a driving signal.

Description

Motor drive integrated circuit, optical filter switching circuit and shooting device

Technical Field

The application relates to the technical field of motor drive, in particular to a motor drive integrated circuit, an optical filter switching circuit and a shooting device.

Background

In the camera, a motor driving integrated circuit is usually used to switch the on/off state of the filter switcher. The motor driving integrated circuit has driving capability in a positive direction and a negative direction, and when the motor driving integrated circuit is driven in the positive direction, the optical filter switcher is switched to an on state; when the motor driving integrated circuit drives reversely, the filter switcher is switched to an off state. The motor driving integrated circuit can also be applied to common motor driving to drive the motor to rotate forwards or reversely. Some existing motor drive integrated circuits have a narrow range of supply voltages in which they can operate.

Disclosure of Invention

The application provides a motor drive integrated circuit, light filter switching circuit and shooting device, but work in the mains voltage scope of broad.

One aspect of the present application provides a motor drive integrated circuit, including: a power supply terminal for receiving a direct current; the power supply conversion module is electrically connected with the power supply end and is used for reducing the voltage of the direct current into reference voltage; a control input for receiving a control signal; the level conversion module is electrically connected with the control input end and the power conversion module and is used for converting the control signal into a level signal based on the reference voltage; the driving module is electrically connected with the power conversion module and the level conversion module, and is used for receiving the reference voltage of the power conversion module and converting the level signal into a driving signal; and the driving output end is electrically connected with the driving module and used for outputting the driving signal.

Another aspect of the present application provides a filter switching circuit, including: a motor drive integrated circuit; the controller is electrically connected with the control input end of the motor drive integrated circuit and is used for outputting the control signal to the control input end; and the optical filter switcher is electrically connected with the driving output end of the motor driving integrated circuit, and the driving output end is used for outputting the driving signal to the optical filter switcher so as to drive the optical filter switcher.

Another aspect of the present application provides a photographing apparatus including: an optical filter switching circuit; and the optical filter is arranged on the optical filter switcher of the optical filter switching circuit.

The motor drive integrated circuit comprises a power supply conversion module and a level conversion module, the power supply conversion module supplies power to the drive module after reducing the voltage of the input direct current, the motor drive integrated circuit can be suitable for the direct current condition of higher voltage, the level conversion module can convert the input control signal into a level signal based on reference voltage, the level signal refers to the reference voltage, the working stability of the motor drive integrated circuit can be ensured when the voltage of the direct current is lower, the drive can be reliably realized, and therefore the motor drive integrated circuit can stably work in a wider direct current voltage range.

Drawings

FIG. 1 is a schematic diagram of a packaged chip of a motor driver IC;

FIG. 2 is a schematic diagram of another exemplary application of a packaged chip of a motor driver IC;

FIG. 3 is a packaging scale diagram of one embodiment of the motor drive integrated circuit of the present application;

FIG. 4 is a functional block diagram of one embodiment of the motor drive integrated circuit shown in FIG. 3;

FIG. 5 is a circuit schematic of one embodiment of a power conversion module of the motor drive integrated circuit of FIG. 4;

FIG. 6 is a circuit schematic of one embodiment of a level shifting module of the motor drive integrated circuit of FIG. 4;

FIG. 7 is a logic schematic of the motor drive integrated circuit of FIG. 3;

fig. 8 is a schematic diagram illustrating an embodiment of a camera according to the present application.

Detailed Description

Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. The use of "first," "second," and similar terms in the description and in the claims does not indicate any order, quantity, or importance, but rather is used to distinguish one element from another. Also, the use of the terms "a" or "an" and the like do not denote a limitation of quantity, but rather denote the presence of at least one. "plurality" or "a number" means at least two. Unless otherwise indicated, "front", "rear", "lower" and/or "upper" and the like are for convenience of description and are not limited to one position or one spatial orientation. The word "comprising" or "comprises", and the like, means that the element or item listed as preceding "comprising" or "includes" covers the element or item listed as following "comprising" or "includes" and its equivalents, and does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

As used in this specification and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

The motor driving integrated circuit comprises a power supply end, a power supply conversion module, a control input end, a level conversion module, a driving module and a driving output end. The power supply terminal is used for receiving direct current. The power conversion module is electrically connected with the power end and used for reducing the voltage of the direct current into reference voltage. The control input terminal is used for receiving a control signal. The level conversion module is electrically connected with the control input end and the power conversion module and is used for converting the control signal into a level signal based on the reference voltage. The driving module is electrically connected with the power conversion module and the level conversion module and used for receiving the reference voltage of the power conversion module and converting the level signal into a driving signal. The driving output end is electrically connected with the driving module and used for outputting a driving signal.

The motor driving integrated circuit comprises a power supply conversion module and a level conversion module, the power supply conversion module reduces the voltage of input direct current and supplies power to the driving module, the motor driving integrated circuit can be suitable for the condition of high-voltage direct current, the level conversion module can convert input control signals into level signals based on reference voltage, and the level signals refer to the reference voltage.

Fig. 1 is a schematic diagram of a packaged chip of a motor driving integrated circuit 10. The motor driving integrated circuit 10 may be connected to the motor 11 to drive the motor 11. The motor drive integrated circuit 10 receives direct current VCC. In one example, the motor drive integrated circuit 10 is powered with a 5V dc voltage with a maximum withstand voltage of only 11V. When the voltage of the direct current VCC supplied from the power supply is higher than 11V, the motor drive integrated circuit 10 may burn out. When the dc voltage VCC is unstable and a large surge voltage occurs, the dc voltage may exceed 11V, which may damage the motor drive integrated circuit 10.

Fig. 2 is a schematic diagram of another application of the packaged chip of the motor driving integrated circuit 20. The motor drive integrated circuit 20 may be connected to the motor 21 to drive the motor 21. The motor drive integrated circuit 20 is connected to a controller 22, and the controller 22 outputs a control signal to the motor drive integrated circuit 20 to control the motor 21. In one example, the motor drive integrated circuit 20 is powered with a 5V DC voltage, with the minimum operating voltage only being supported to 4.5V. The voltage of the dc VCC supplied by the power supply may be as low as about 4V. The port output voltage of the controller 22 may reach 5V or 3.3V. In the low voltage region, the determination of the high and low levels of the control signal input by the controller 22 by the motor driving integrated circuit 20 may be biased, so that the motor driving integrated circuit 20 may not operate stably and may not be driven reliably.

Fig. 3 is a packaging specification diagram of an embodiment of the motor drive integrated circuit 100 of the present application. The motor drive integrated circuit 100 may drive a dc motor, a filter switch, or other loads similar to a dc motor. The motor drive integrated circuit 100 includes power supply terminals VM, control input terminals IN1, IN2, and drive output terminals OUT1, OUT 2. The motor drive integrated circuit 100 further includes a common ground terminal GND. In one embodiment, the motor drive integrated circuit 100 may be packaged in a small volume using SOT 23-6.

The power supply terminal VM is configured to receive direct current. The control inputs IN1, IN2 are for receiving control signals. The control inputs include a first control input IN1 and a second control input IN2, and different combinations of high and low levels of the first control input IN1 and the second control input IN2 can control a motor, a filter switcher, or other load to be IN different states. In the embodiment that the load is a motor, the motor can be controlled to rotate in the forward direction, the motor can be controlled to rotate in the reverse direction, the motor can be controlled to be powered off, and the motor can be controlled to decelerate until the rotation is stopped. In the embodiment where the load is a filter switch, the filter switch can be controlled to be turned on or off.

The driving output terminals OUT1 and OUT2 are used for outputting driving signals and driving the load according to the control signals. The drive output terminals include a first drive output terminal OUT1 and a second drive output terminal OUT 2. The different combinations of high and low levels at the first control input terminal IN1 and the second control input terminal IN2 cause the different combinations of high and low levels at the first driving output terminal OUT1 and the second driving output terminal OUT2, so as to drive the load IN different states.

Fig. 4 is a block diagram illustrating the functional blocks of one embodiment of the motor drive integrated circuit 100. The motor driving integrated circuit 100 includes a power conversion module 101,

level conversion modules

102 and 103, and a driving module 104. The power conversion module 101 is electrically connected to the power source terminal VM, and is configured to reduce the voltage of the direct current to a reference voltage. The reference voltage may satisfy the voltage requirements inside the motor drive integrated circuit 100.

The

level shift modules

102 and 103 are electrically connected to the control input terminals IN1 and IN2 and the power conversion module 101, and are used for converting the control signal into a level signal based on a reference voltage. The

level shift modules

102 and 103 may convert the control signals received by the control input terminals IN1 and IN2 into level signals corresponding to high and low levels of the control signals, wherein the level of the control signals refers to an internal voltage of a controller (not shown) that provides the control signals, and the level of the converted level signals refers to a reference voltage. When the internal voltage of the control signal reference controller is at a high level, the converted level signal reference voltage is also at a high level; when the internal voltage of the control signal reference controller is at a low level, the converted level signal reference voltage is also at a low level.

IN one embodiment, the

level shift modules

102 and 103 are respectively connected between the first control input terminal IN1 and the driving module 104 and between the second control input terminal IN2 and the driving module 104. The level shift module 102 is connected to the first control input terminal IN1 and the driving module 104, and converts the control signal received by the first control input terminal IN1 into a corresponding level signal. The level shift module 103 is connected to the second control input terminal IN2 and the driving module 104, and converts the control signal received by the second control input terminal IN2 into a corresponding level signal.

The driving module 104 is electrically connected to the power conversion module 101 and the

level conversion modules

102 and 103, and is configured to receive a reference voltage of the power conversion module 101 and convert a level signal into a driving signal. The driving output terminals OUT1 and OUT2 are electrically connected to the driving module 104 for outputting driving signals. The reference voltage obtained after the voltage reduction of the power conversion module 101 can supply power to the driving module 104, so as to meet the power requirement for the operation of the driving module 104. The driving module 104 may perform a logic operation on the level signals output by the

level converting modules

102 and 103 to generate a driving signal.

The power conversion module 101 of the motor driving integrated circuit 100 reduces the voltage of the input dc to obtain the reference voltage to supply power to the driving module 104, so that the motor driving integrated circuit 100 is suitable for the situation of dc with higher voltage, and the risk of damage to the motor driving integrated circuit 100 can be reduced or avoided under the situation of large surge voltage of the dc. And the

level conversion modules

102 and 103 can convert the input control signal into a level signal based on a reference voltage, and the level signal refers to the reference voltage, so that when the voltage of the direct current is lower, the working stability of the motor driving integrated circuit can be ensured, and the driving can be reliably realized. Therefore, the motor driving integrated circuit 100 can stably operate in a wide range of dc voltage, the input voltage of the motor driving integrated circuit 100 is expanded, and the motor driving integrated circuit can be applied to situations where the power supply for supplying dc power is unstable, low-voltage power supply, and the like. In one example, the motor driving integrated circuit 100 can stably operate in a dc voltage range of 3V to 16V.

Fig. 5 is a circuit schematic diagram of an embodiment of the power conversion circuit 101. Referring to fig. 4 and 5, the power conversion module 101 includes reference output terminals VA and VD connected to the

level conversion modules

102 and 103 and the driving module 104 for outputting reference voltages, a first transistor Q1 connected to the reference output terminals VA and VD and the power supply terminal VM, and a feedback circuit 105 connected to the reference output terminals VA and VD and the first transistor Q1, wherein the feedback circuit 105 is configured to convert the reference voltages and then provide the converted reference voltages to the first transistor Q1 to adjust the on-state capability of the first transistor Q1 to adjust the output reference voltages. The feedback circuit 105 converts the reference voltage into a voltage that can adjust the turn-on capability of the first transistor Q1.

In one embodiment, the reference output terminals include a first reference output terminal VA and a second reference output terminal VD, and the voltages output by the first reference output terminal VA and the second reference output terminal VD are the same. The first reference output VA may supply power to an analog circuit inside the motor drive integrated circuit 100, and the second reference output VD may supply power to a digital circuit inside the motor drive integrated circuit 100. The power conversion module 101 includes a reference ground, which includes an analog circuit ground VNA and a digital circuit ground VND. A first capacitor Ca may be connected between the first reference output VA and the analog circuit ground VNA. A second capacitor Cb may be connected between the second reference output terminal VD and the digital circuit ground VND. The analog circuit ground terminal VNA and the digital circuit ground terminal VND may be connected to the common ground terminal GND. In other embodiments, the power conversion circuit 101 may have one or more than three reference outputs.

The power supply terminal VM receives a direct current VCC. The first transistor Q1 is connected to the reference output terminals VA, VD and the power supply terminal VM, so that the reference voltage is lower than the voltage of the direct current VCC. In some embodiments, the first transistor Q1 includes a MOS transistor, a BJT transistor, or a FET transistor. In the illustrated embodiment, the first transistor Q1 is a P-channel MOS transistor. The first transistor Q1 has a drain connected to the reference output terminals VA and VD, a source connected to the power supply terminal VM, and a gate connected to the feedback circuit 105.

The feedback circuit 105 is a negative feedback circuit, the reference voltage is fed back to the feedback circuit 105, and the feedback circuit 105 adjusts the conduction capability of the first transistor Q1 according to the fed-back reference voltage to adjust the output reference voltage, thereby stabilizing the reference voltage. When the power supply terminal VM is just connected to the dc voltage VCC, the feedback circuit 105 may rapidly stabilize the reference voltage. The feedback circuit 105 can stabilize the reference voltage when the direct current VCC fluctuates.

In one embodiment, the feedback circuit 105 includes a voltage divider circuit 106 connected to the reference output terminals VA and VD and the first transistor Q1, the voltage divider circuit 106 is configured to divide the reference voltage to obtain a feedback voltage, and the feedback circuit 105 is configured to adjust the turn-on capability of the first transistor Q1 based on the feedback voltage divided by the voltage divider circuit 106. In one embodiment, the voltage divider circuit 106 includes a first voltage divider resistor R2 and a second voltage divider resistor R3 connected in series between the drain of the first transistor Q1 and the common ground GND. The common ground terminal GND may be grounded. One end of the first voltage-dividing resistor R2 is connected to the drain of the first transistor Q1 and the reference output terminals VA and VD, the other end of the first voltage-dividing resistor R2 is connected to the second voltage-dividing resistor R3 and the gates of the first transistor Q1, and the source of the first transistor Q1 is connected to the power supply terminal VM.

The feedback circuit 105 adjusts the turn-on capability of the first transistor Q1 based on the voltage Vp (i.e., the feedback voltage) divided by the second voltage dividing resistor R3. The reference voltage is equal to the dc voltage VCC minus the difference between the source and drain of the first transistor Q1. When the dc voltage VCC becomes higher, the voltage Vp across the second voltage-dividing resistor R3 becomes higher, the voltage output from the feedback circuit 105 to the first transistor Q1 becomes higher, the voltage difference | Vgs | between the gate and the source of the first transistor Q1 becomes lower, and the current flowing through the first transistor Q1 becomes lower, which further causes the voltage Vp across the second voltage-dividing resistor R3 to decrease. When the dc voltage VCC becomes smaller, the voltage Vp across the second voltage-dividing resistor R3 becomes smaller, the voltage output from the feedback circuit 105 to the first transistor Q1 becomes smaller, the voltage difference | Vgs | between the gate and the source of the first transistor Q1 becomes larger, and the current flowing through the first transistor Q1 becomes larger, which further causes the voltage Vp across the second voltage-dividing resistor R3 to rise. The reference voltage is thus stabilized by the feedback circuit 105.

In one embodiment, the feedback circuit 105 includes an operational amplifier OPA having an output terminal connected to the first transistor Q1, an output terminal connected to the voltage divider circuit 106, and a reference circuit 111 having another output terminal connected to the reference circuit 111. The reference circuit 111 is connected to a power supply terminal VM and a common ground terminal GND for supplying a reference voltage to the operational amplifier OPA. The operational amplifier OPA is used to compare and amplify the feedback voltage outputted from the voltage dividing circuit 106 and the reference voltage to adjust the turn-on capability of the first transistor Q1. The positive input terminal of the operational amplifier OPA is connected to the voltage divider 106, and the negative input terminal is connected to the reference circuit 111.

In one embodiment, the reference circuit 111 includes a first resistor R1 and a second transistor Q2, the first resistor R1 is connected between the power source terminal VM and the drain of the second transistor Q2, the gate of the second transistor Q2 is connected to the drain, the source of the second transistor Q2 is connected to the common ground GND, the positive input terminal of the operational amplifier OPA is connected to the voltage divider circuit 106, the negative input terminal of the operational amplifier OPA is connected to the terminal where the first resistor R1 is connected to the drain of the second transistor Q2, and the output terminal of the operational amplifier OPA is connected to the gate of the first transistor Q1.

The positive input end of the operational amplifier OPA is connected with the end connected with the second voltage-dividing resistor R3 and the second voltage-dividing resistor R2, and the voltage of the second voltage-dividing resistor R3 is input to the positive input end of the operational amplifier OPA. The second transistor Q2 may include a MOS transistor, a BJT transistor, or a FET transistor. In the illustrated embodiment, the second transistor Q2 is an N-channel MOS transistor.

At a moment when the direct current VCC is applied to the power supply terminal VM, the voltage difference Vgs between the gate and the source of the second transistor Q2 is greater than the inter-electrode threshold voltage Vth2 of the second transistor Q2, and the second transistor Q2 is turned on; meanwhile, a voltage difference | Vgs | between the gate and the source of the first transistor Q1 is smaller than the inter-electrode threshold voltage Vth1 of the first transistor Q1, and the first transistor Q1 is turned on. After the circuit is stabilized, the voltage difference Vgs between the gate and the source of the second transistor Q2 is Vth 2. The output voltage of the operational amplifier OPA is equal to Av (Vp-Vth2), Av is the amplification factor of the operational amplifier OPA, and Vp is the voltage of the second divider resistor R3. When the dc voltage VCC becomes larger, the voltage Vp across the second voltage-dividing resistor R3 becomes larger, the output voltage of the operational amplifier OPA becomes larger, the voltage difference | Vgs | between the gate and the source of the first transistor Q1 becomes smaller, and the on-resistance of the first transistor Q1 increases, the current decreases, and this variation further causes the voltage Vp across the second voltage-dividing resistor R3 to decrease. Conversely, when the dc voltage VCC becomes smaller, the voltage Vp of the second voltage-dividing resistor R3 also becomes smaller, the output voltage of the operational amplifier OPA becomes smaller, the differential pressure | Vgs | between the gate and the source of the first transistor Q1 becomes larger, the on-resistance of the first transistor Q1 decreases, the current becomes larger, and the voltage Vp of the second voltage-dividing resistor R3 increases. Finally, the voltage Vp of the second voltage-dividing resistor R3 will stabilize after a short time change, so as to output a stable reference voltage.

Fig. 6 is a circuit schematic of one embodiment of the level shifting module 102. The circuit schematic diagram of the level shift module 103 may be the same as or similar to the circuit schematic diagram of the level shift module 102, and the circuit schematic diagram of the level shift module 102 is described in detail below. Referring to fig. 4-6, the level shifter module 102 includes a level output terminal CA connected to the driver module 104, and a plurality of transistors Q3, Q4 connected between the control input terminal IN1 and the level output terminal CA.

The level shift module 103 includes a second resistor R4 and a third resistor R5, the plurality of transistors includes a third transistor Q3 and a fourth transistor Q4 connected to the third transistor Q3, a gate of the third transistor Q3 is connected to the control input terminal IN1, a source of the third transistor Q3 is connected to the reference ground VND of the power conversion module 101, a drain of the third transistor Q3 is connected to the reference output terminal VD of the power conversion module 101 through a second resistor R4, a gate of the fourth transistor Q4 is connected to the drain of the third transistor Q3, a source of the fourth transistor Q4 is connected to the reference ground VND, a drain of the fourth transistor Q4 is connected to the reference output terminal VD through a third resistor R5, and the level output terminal CA is connected to a drain of the fourth transistor Q4.

In one embodiment, the third transistor Q3 includes a MOS transistor, a BJT transistor, or a FET transistor. In the illustrated embodiment, the third transistor Q3 is an N-channel MOS transistor. In one embodiment, the fourth transistor Q4 includes a MOS transistor, a BJT transistor, or a FET transistor. In the illustrated embodiment, the fourth transistor Q4 is an N-channel MOS transistor.

In order to adapt to a wide voltage range (e.g., 3V-16V) dc, the control signal input by the external controller is converted into a level signal driven by an internal reference voltage by the level conversion module 102 of the motor driving integrated circuit 100, so as to control the driving module 104. When the control input terminal IN1 inputs a high-level control signal, the third transistor Q3 is turned on, the fourth transistor Q4 is turned off, and the level output terminal CA outputs a high-level signal; when the control input terminal IN1 inputs a low-level control signal, the third transistor Q3 is not turned on, the fourth transistor Q4 is turned on, and the level output terminal CA outputs a low-level signal.

Fig. 7 is a logic circuit diagram of the motor drive integrated circuit 100. The driving module 104 includes a logic operation module 107, a first driving transistor P1, a second driving transistor N1, a third driving transistor P2, and a fourth driving transistor N2. The logic operation module 107 is connected to the

level shift modules

102 and 103, and connected to the first driving transistor P1, the second driving transistor N1, the third driving transistor P2 and the fourth driving transistor N2. The control signals input by the control input terminals IN1 and IN2 are converted into level signals by the

level conversion modules

102 and 103, and then input to the driving module 104, and are logically operated by the logical operation module 107 to control the on/off of the first driving transistor P1, the second driving transistor N1, the third driving transistor P2 and the fourth driving transistor N2.

The first driving transistor P1 and the third driving transistor P2 may be P-channel MOS transistors, and the second driving transistor N1 and the fourth driving transistor N2 may be N-channel MOS transistors. The first driving transistor P1 is connected to the dc power VCC and the second driving transistor N1, the second driving transistor N1 is connected to the common ground GND, and the first driving output terminal OUT1 is connected to the connection terminal of the first driving transistor P1 and the second driving transistor N1. The third driving transistor P2 is connected to dc VCC and the fourth driving transistor N2, the fourth driving transistor N2 is connected to the common ground GND, and the second driving output terminal OUT2 is connected to the connection terminal of the third driving transistor P2 and the fourth driving transistor N2.

When the control signal inputted from the first control input terminal IN1 is at a high level and the control signal inputted from the second control input terminal IN2 is at a low level, the first driving transistor P1 and the fourth driving transistor N2 are turned on, and the second driving transistor N1 and the third driving transistor P2 are turned off. The first driving output terminal OUT1 outputs a high-level driving signal, and the second driving output terminal OUT2 outputs a low-level driving signal; current flows into the motor (taking the motor as an example of a load) through the first driving transistor P1, then flows into the fourth driving transistor N2 through the motor, and finally flows into the ground through the fourth driving transistor N2, and the current drives the motor to rotate in the forward direction.

When the control signal inputted from the first control input terminal IN1 is at a low level and the control signal inputted from the second control input terminal IN2 is at a high level, the third driving transistor P2 and the second driving transistor N1 are turned on, and the first driving transistor P1 and the fourth driving transistor N2 are turned off. The first drive output terminal OUT1 outputs a low-level drive signal, and the second drive output terminal OUT2 outputs a high-level drive signal. Current flows into the motor via the third driving transistor P2, then flows through the motor into the second driving transistor N1, and finally flows into ground via the second driving transistor N1, which drives the motor to rotate in reverse.

When the control signals inputted from the first control input terminal IN1 and the second control input terminal IN2 are both low level, the first driving transistor P1, the second driving transistor N1, the third driving transistor P2 and the fourth driving transistor N2 are all turned off, and no current flows through the motor from the first driving output terminal OUT1 and the second driving output terminal OUT 2.

When the control signals input by the first control input terminal IN1 and the second control input terminal IN2 are both high level, the first driving transistor P1 and the third driving transistor P2 are turned off, the second driving transistor N1 and the fourth driving transistor N2 are turned on, and the current flows to the ground through the motor via the second driving transistor N1 and the fourth driving transistor N2 respectively.

In some embodiments, the motor driving integrated circuit 100 further includes an overcurrent detection module 108, the overcurrent detection module 108 is connected to the first driving transistor P1, the second driving transistor N1, the third driving transistor P2 and the fourth driving transistor N2, and is electrically connected to the logic operation module 107, and is configured to detect whether a current flowing through the load is overcurrent, and when the current is overcurrent, the logic operation module 107 is controlled to turn off the first driving transistor P1, the second driving transistor N1, the third driving transistor P2 and the fourth driving transistor N2, so that no current flows through the load, thereby implementing overcurrent protection and implementing a function of protecting automatic restart.

In some embodiments, the motor driving integrated circuit 100 further includes a voltage limiting protection module 109, connected to a power supply terminal VM (shown in fig. 4), for receiving a direct current VCC, and connected to the logic operation module 107, and controlling the logic operation module 107 when the direct current VCC is too high, so that the first driving transistor P1, the second driving transistor N1, the third driving transistor P2, and the fourth driving transistor N2 are all turned off, thereby implementing voltage limiting protection and implementing a function of protecting automatic restart.

In some embodiments, the motor driving integrated circuit 100 further includes an over-temperature protection module 110 connected to the logic operation module 107, the over-temperature protection module 110 may receive a temperature signal sensed by a temperature sensor (not shown), and when the temperature of the motor driving integrated circuit 100 is too high, the logic operation module 107 may be controlled to turn off the first driving transistor P1, the second driving transistor N1, the third driving transistor P2, and the fourth driving transistor N2, so as to implement over-temperature protection and implement a function of protecting automatic restart.

Fig. 8 is a schematic circuit diagram of an embodiment of the camera 200. The photographing device 200 may include a camera or the like. The imaging device 200 includes a filter switching circuit 201 and a filter 202, and the filter switching circuit 201 switches the filter 202. The filter switching circuit 201 includes the motor driving integrated circuit 100, the controller 210, and the filter switch 211, and the filter 202 is mounted on the filter switch 211.

The controller 210 is electrically connected to the control input terminals IN1, IN2 of the motor drive integrated circuit 100, and the controller 210 is configured to output a control signal to the control input terminals IN1, IN 2. The filter switch 211 is electrically connected to the driving output terminals OUT1, OUT2 of the motor driving integrated circuit 100, and the driving output terminals OUT1, OUT2 are used for outputting a driving signal to the filter switch 211 to drive the filter switch 211, thereby realizing switching of the switching filter 202. For example, the filter 202 may be switched under different light intensity environments to obtain a better image.

The filter switch 211 may include a power mechanism 213 and a filter carrier 214 for carrying the filters 202. The power mechanism 213 is electrically connected to the driving output terminals OUT1 and OUT2 of the motor drive integrated circuit 100, and the motor drive integrated circuit 100 drives the power mechanism 213 according to a control signal of the controller 210. In one embodiment, the power mechanism 213 may include a power coil 215, similar to a coil of a motor. In another embodiment, the power mechanism 213 includes a motor. In other embodiments, the power mechanism 213 may include other power sources. The power mechanism 213 drives the filter carrier 214 to move to switch the filters 202. The motor driving ic 100 may drive the power mechanism 213 in a forward or reverse direction according to a control signal of the controller 210 to move the filter carrier 214, thereby switching the filters 202.

In one embodiment, the filter switch 211 may include a dual-filter switch, which can switch the filters 202 at daytime and at night to correct the color shift problem during daytime and improve the brightness at night, thereby achieving better imaging effect.

The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the scope of protection of the present application.

Claims

1. A motor drive integrated circuit, characterized by: it includes:

a power supply terminal for receiving a direct current;

the power supply conversion module is electrically connected with the power supply end and is used for reducing the voltage of the direct current into reference voltage;

the control input end is used for receiving a control signal of the controller;

the level conversion module is electrically connected with the control input end and the power conversion module and is used for converting the control signal into a level signal based on the reference voltage, and when the internal voltage of the control signal reference controller is at a high level, the converted level signal reference voltage is also at a high level; when the internal voltage of the control signal reference controller is at a low level, the converted level signal reference voltage is also at a low level;

the driving module is electrically connected with the power conversion module and the level conversion module, and is used for receiving the reference voltage of the power conversion module and converting the level signal into a driving signal;

and the driving output end is electrically connected with the driving module and used for outputting the driving signal.

2. The motor drive integrated circuit of claim 1, wherein: the power supply conversion module comprises a reference output end connected with the level conversion module and the driving module and used for outputting the reference voltage, a first transistor connected with the reference output end and the power supply end, and a feedback circuit connected with the reference output end and the first transistor, wherein the feedback circuit is used for converting the reference voltage and then providing the converted reference voltage for the first transistor, and the output reference voltage is adjusted by adjusting the conduction capability of the first transistor.

3. The motor drive integrated circuit of claim 2, wherein: the feedback circuit comprises a voltage division circuit connected with the reference output end and the first transistor, the voltage division circuit is used for dividing the reference voltage to obtain a feedback voltage, and the feedback circuit is used for adjusting the conduction capability of the first transistor based on the feedback voltage.

4. A motor drive integrated circuit according to claim 3, wherein: the motor driving integrated circuit comprises a common ground terminal, the voltage division circuit comprises a first voltage division resistor and a second voltage division resistor which are connected in series between the drain electrode of the first transistor and the common ground terminal, one end of the first voltage division resistor is connected with the drain electrode of the first transistor and the reference output terminal, the other end of the first voltage division resistor is connected with the second voltage division resistor and the grid electrode of the first transistor, and the source electrode of the first transistor is connected with the power supply terminal.

5. A motor drive integrated circuit according to claim 3, wherein: the motor driving integrated circuit comprises a common ground terminal, the feedback circuit comprises an operational amplifier and a reference circuit, the output terminal of the operational amplifier is connected with the first transistor, one output terminal of the operational amplifier is connected with the voltage division circuit, the other output terminal of the operational amplifier is connected with the reference circuit, the reference circuit is connected with the power supply terminal and the common ground terminal and is used for providing reference voltage to the operational amplifier, and the operational amplifier is used for comparing and amplifying the feedback voltage output by the voltage division circuit and the reference voltage to adjust the conduction capability of the first transistor.

6. The motor drive integrated circuit of claim 5, wherein: the reference circuit comprises a first resistor and a second transistor, the first resistor is connected between the power supply end and the drain electrode of the second transistor, the grid electrode of the second transistor is connected with the drain electrode, the source electrode of the second transistor is connected with the common ground end, the positive input end of the operational amplifier is connected with the voltage dividing circuit, the negative input end of the operational amplifier is connected with one end of the first resistor connected with the drain electrode of the second transistor, and the output end of the operational amplifier is connected with the grid electrode of the first transistor.

7. The motor drive integrated circuit of claim 1, wherein: the level conversion module comprises a level output end connected with the driving module and a plurality of transistors connected between the control input end and the level output end.

8. The motor drive integrated circuit of claim 7, wherein: the power conversion module comprises a reference output end and a reference ground end, the reference output end is used for outputting the reference voltage, the level conversion module comprises a second resistor and a third resistor, the transistors comprise a third transistor and a fourth transistor connected with the third transistor, the grid electrode of the third transistor is connected with the control input end, the source electrode of the third transistor is connected with the reference ground end, the drain electrode of the third transistor is connected with the reference output end through the second resistor, the grid electrode of the fourth transistor is connected with the drain electrode of the third transistor, the source electrode of the fourth transistor is connected with the reference ground end, the drain electrode of the fourth transistor is connected with the reference output end through the third resistor, and the level output end is connected with the drain electrode of the fourth transistor.

9. The motor drive integrated circuit of claim 1, wherein: the control input end comprises a first control input end and a second control input end, and the corresponding level conversion modules are respectively connected between the first control input end and the driving module and between the second control input end and the driving module.

10. An optical filter switching circuit, comprising: the method comprises the following steps:

the motor drive integrated circuit of any of claims 1-9;

the controller is electrically connected with the control input end of the motor drive integrated circuit and is used for outputting the control signal to the control input end; and the optical filter switcher is electrically connected with the driving output end of the motor driving integrated circuit, and the driving output end is used for outputting the driving signal to the optical filter switcher so as to drive the optical filter switcher.

11. A photographing apparatus, characterized in that: the method comprises the following steps:

the filter switching circuit of claim 10; and the optical filter is arranged on the optical filter switcher of the optical filter switching circuit.