CN111628777A - ADC chip-based conversion circuit for passive secondary circuit check meter - Google Patents
ADC chip-based conversion circuit for passive secondary circuit check meter Download PDFInfo
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- CN111628777A CN111628777A CN202010635582.6A CN202010635582A CN111628777A CN 111628777 A CN111628777 A CN 111628777A CN 202010635582 A CN202010635582 A CN 202010635582A CN 111628777 A CN111628777 A CN 111628777A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/458—Analogue/digital converters using delta-sigma modulation as an intermediate step
- H03M3/494—Sampling or signal conditioning arrangements specially adapted for delta-sigma type analogue/digital conversion systems
- H03M3/496—Details of sampling arrangements or methods
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/28—Provision in measuring instruments for reference values, e.g. standard voltage, standard waveform
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/30—Structural combination of electric measuring instruments with basic electronic circuits, e.g. with amplifier
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- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
The invention discloses an ADC chip-based conversion circuit for a passive secondary loop check meter, which comprises an anti-aliasing filter circuit, a reference voltage generation and common mode reference voltage generation circuit and an ADC conversion execution circuit, wherein the anti-aliasing filter circuit is used for receiving analog signals input by the front end, filtering unnecessary signals in a sampling system and transmitting the filtered signals to the ADC conversion execution circuit, the reference voltage generation and common mode reference voltage generation circuit provides voltage reference for the ADC conversion execution circuit, the influence of environmental temperature and noise on the conversion of the reference signals is reduced to a specified range, the ADC conversion execution circuit converts the analog signals into digital signals, and the digital signals are transmitted to an upper computer through a serial communication interface and conversion completion signals. The invention ensures the high accuracy of ADC conversion, improves the circuit designed by the sampling common-mode voltage technology, and not only has low cost, but also can ensure the accuracy grade of products.
Description
Technical Field
The invention relates to the technical field of electrical measurement, in particular to an ADC chip-based conversion circuit for a passive secondary circuit check meter.
Background
In an electrical measurement system, analog-to-digital conversion (ADC) is an important component of digital detection, and the design quality of a circuit directly influences the accuracy of the whole system. For a high-accuracy multi-channel analog-to-digital conversion system, the traditional design usually adopts a plurality of groups of single-path or double-path Successive Approximation (SAR) analog-to-digital conversion (ADC) chips and a preceding-stage amplifying circuit; the input voltage range of the ADC chip is limited to be wide, and the front-end signal needs to be amplified. Therefore, the circuit design has the defects of large occupied space and high cost.
With the development of the technology, a multi-path synchronous sampling SAR type ADC chip with high accuracy and low input voltage range appears, so that the circuit design is greatly simplified, but the cost is high.
Disclosure of Invention
The present invention is directed to a conversion circuit based on ADC chip for passive secondary loop check meter, so as to solve the problems in the background art mentioned above.
In order to achieve the purpose, the invention provides the following technical scheme: a conversion circuit based on an ADC chip for a passive secondary loop check table comprises an anti-aliasing filter circuit, a reference voltage generation and common mode reference voltage generation circuit and an ADC conversion execution circuit, and the specific implementation steps of each component circuit are as follows:
s1: the anti-aliasing filter circuit is used for receiving an analog signal input by the front end, filtering an unnecessary signal in a sampling system and transmitting the filtered signal to the ADC conversion execution circuit;
s2: the reference voltage generation and common mode reference voltage generation circuit provides voltage reference for the ADC conversion execution circuit, and reduces the influence of the reference signal on the conversion due to the environmental temperature and noise to a specified range;
s3: the ADC conversion execution circuit converts the analog signal into a digital signal and transmits the digital signal to the upper computer through the serial communication interface and the conversion completion signal.
Preferably, in step S1, since the spectrum of the sampled signal is extended by mirroring at the sampling frequency fs/2, the interference signal in this frequency band is aliased with the signal.
Preferably, R3, C2, R13 and C1 in step S1 form a set of common mode low pass filtering (where C1= C2= CCM, and R3= R13= R), the cut-off frequency of the common mode low pass filtering is calculated according to a formula, and due to the deviation of both resistive and capacitive elements, the two filters are not completely consistent, in order to further improve the common mode performance, a differential filter is formed by C201 and the two common mode filters, the cut-off frequency of the differential filter is calculated according to a formula, and the signal after the filtering is transmitted to an ADC conversion execution circuit.
Preferably, the voltage reference output by VOUT2_ F in step S2 provides a voltage reference for the front-end signal and the anti-aliasing filter circuit through a voltage dividing resistor, so as to reduce the interference of common mode and differential noise.
The invention has the technical effects and advantages that:
the voltage reference is adopted to provide input reference for the front end and the anti-aliasing signals, common mode and differential noise signals are greatly reduced, the ADC is adopted as a Delta-Sigma ADC, the cost is low, the synchronous conversion speed can meet the requirement of most electrical measurement sampling systems, the used voltage reference temperature drift and noise are extremely low, the stability of the conversion reference signals is ensured, the high accuracy of ADC conversion is ensured, a circuit designed by the sampling common mode voltage technology is improved, the cost is low, and the accuracy grade of a product can be ensured.
Drawings
Fig. 1 is a circuit diagram of an analog-to-digital conversion circuit of the present invention.
FIG. 2 is a circuit diagram of an anti-aliasing filter circuit according to the present invention.
FIG. 3 is a circuit diagram of the reference voltage generating and common mode reference voltage generating circuit according to the present invention.
FIG. 4 is a circuit diagram of an ADC conversion execution circuit according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The invention provides a conversion circuit based on an ADC chip for a passive secondary loop check table as shown in figures 1-4, which comprises an anti-aliasing filter circuit, a reference voltage generation and common mode reference voltage generation circuit and an ADC conversion execution circuit, wherein the specific implementation steps of each component circuit are as follows:
s1: the anti-aliasing filter circuit (see fig. 2) receives an analog signal input from the front end, filters an unnecessary signal in a sampling system, and prevents interference on a non-system measured signal, because the frequency spectrum of the sampled signal can be extended by taking a sampling frequency fs/2 as a central image, an interference signal in the frequency band can be aliased with the signal;
here, R3, C2, R13 and C1 constitute a common mode low pass filter (where C1= C2= CCM, and R3= R13= R), the cut-off frequency of which can be calculated according to a formula, and since there is a specified deviation between the resistance and capacitance components, the two filters are not completely consistent, in order to further improve the common mode performance, a differential filter is formed by C201 (i.e., CDIFF) and the two common mode filters, the cut-off frequency of which can be calculated according to a formula, and the signal after the filtering is transmitted to the ADC conversion execution circuit;
s2: the voltage reference chip VOUT2_ F outputs a voltage signal to provide a voltage reference for the ADC conversion execution circuit, the influence of the reference signal on the conversion due to the environmental temperature and noise is reduced to a specified range, and the voltage reference output by VOUT2_ F provides a voltage reference for a front-end signal and an anti-aliasing filter circuit through a voltage dividing resistor so as to reduce the interference of common mode and differential noise;
s3: and the ADC conversion execution circuit (see figure 4) converts the analog signal into a digital signal and transmits the digital signal to the upper computer through the serial communication interface and the conversion completion signal.
Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments or portions thereof without departing from the spirit and scope of the invention.
Claims (4)
1. A conversion circuit based on an ADC chip for a passive secondary loop check table comprises an anti-aliasing filter circuit, a reference voltage generation and common mode reference voltage generation circuit and an ADC conversion execution circuit, and is characterized in that the specific implementation steps of each component circuit are as follows:
s1: the anti-aliasing filter circuit is used for receiving an analog signal input by the front end, filtering an unnecessary signal in a sampling system and transmitting the filtered signal to the ADC conversion execution circuit;
s2: the reference voltage generation and common mode reference voltage generation circuit provides voltage reference for the ADC conversion execution circuit, and reduces the influence of the reference signal on the conversion due to the environmental temperature and noise to a specified range;
s3: the ADC conversion execution circuit converts the analog signal into a digital signal and transmits the digital signal to the upper computer through the serial communication interface and the conversion completion signal.
2. The ADC chip-based conversion circuit of claim 1, wherein in step S1, since the sampled signal spectrum is extended by mirroring at a sampling frequency fs/2, the interfering signal in this frequency band is aliased with the signal.
3. The ADC chip-based conversion circuit of claim 1, wherein the R3, C2, R13 and C1 in step S1 form a set of common-mode low-pass filters (wherein C1= C2= CCM, and R3= R13= R), the cut-off frequency of the common-mode low-pass filters can be calculated according to a formula, and the two filters are not completely consistent due to the deviation of the resistive and capacitive elements, and in order to further improve the common-mode performance, a differential filter is formed by C201 and the two common-mode filters, the cut-off frequency of the differential filter can be calculated according to a formula, and the filtered signal is transmitted to the ADC conversion execution circuit.
4. The ADC chip-based conversion circuit of claim 1, wherein the voltage reference outputted by VOUT2_ F in step S2 provides a voltage reference for the front-end signal and the anti-aliasing filter circuit through voltage dividing resistors, so as to reduce the interference of common mode and differential noise.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010635582.6A CN111628777A (en) | 2020-07-03 | 2020-07-03 | ADC chip-based conversion circuit for passive secondary circuit check meter |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010635582.6A CN111628777A (en) | 2020-07-03 | 2020-07-03 | ADC chip-based conversion circuit for passive secondary circuit check meter |
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| Publication Number | Publication Date |
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| CN111628777A true CN111628777A (en) | 2020-09-04 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202010635582.6A Pending CN111628777A (en) | 2020-07-03 | 2020-07-03 | ADC chip-based conversion circuit for passive secondary circuit check meter |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2621919A (en) * | 2022-08-25 | 2024-02-28 | Cirrus Logic Int Semiconductor Ltd | Calibration of anti-aliasing filter mismatch |
-
2020
- 2020-07-03 CN CN202010635582.6A patent/CN111628777A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2621919A (en) * | 2022-08-25 | 2024-02-28 | Cirrus Logic Int Semiconductor Ltd | Calibration of anti-aliasing filter mismatch |
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