CN111615207A

CN111615207A - Resource mapping method, device and storage medium

Info

Publication number: CN111615207A
Application number: CN202010394909.5A
Authority: CN
Inventors: 刘君
Original assignee: Guangdong Oppo Mobile Telecommunications Corp Ltd
Current assignee: Guangdong Oppo Mobile Telecommunications Corp Ltd
Priority date: 2020-05-11
Filing date: 2020-05-11
Publication date: 2020-09-01
Anticipated expiration: 2040-05-11
Also published as: CN111615207B

Abstract

The application discloses a resource mapping method, a resource mapping device and a storage medium, which are applied to electronic equipment comprising a receiver, wherein the receiver comprises an algorithm processor and a hardware processor, the algorithm processor acquires mode information, and the mode information is used for indicating time-frequency resources; and the algorithm processor generates a resource mapping table required by the hardware processor according to the mode information, wherein the resource mapping table is used for indicating resource element RE position information occupied by a physical downlink control channel (PDSCH). By adopting the embodiment of the application, all the mode information is used as the interface to be configured to the algorithm processor, and the resource mapping table required by the hardware processor is generated, so that the repeated configuration of the mode information can be avoided, the configuration efficiency of the mode information can be improved, and the system resources can be saved.

Description

Resource mapping method, device and storage medium

Technical Field

The present application relates to the field of communications technologies, and in particular, to a resource mapping method, apparatus, and storage medium.

Background

In a New Radio (NR), on a time-frequency resource within a slot, in addition to the PDSCH, other resources for transmission include: a Physical Downlink Control Channel (PDCCH), a Physical Broadcast Channel (PBCH), a Reference Signal (RS), a demodulation reference signal (DMRS), a channel state indication reference signal (CSI-RS)), and the like, and a Rate matching resource (Rate matching resource) configured by a higher layer. In Long Term Evolution (LTE), in addition to a Physical Downlink Shared Channel (PDSCH), other transmitted resources on a time-frequency resource in a subframe include: PDCCH, PBCH, Physical Control Format Indicator Channel (PCFICH), physical hybrid automatic repeat indicator channel (PHICH), and RS (CRS, DMRS, CSI-RS).

In specific application, in NR or LTE, taking PDSCH as an example, when a receiver receives PDSCH, it is necessary to accurately acquire the location of a time-frequency Resource Element (RE) occupied by PDSCH. That is, when receiving PDSCH, it is necessary to deduct REs occupied by other channels or signals, and therefore, it is necessary to notify a hardware processor (HW) or a Vector Digital Signal Processor (VDSP) of location information of REs occupied by other physical channels or physical signals, or notify HW or VDSP of location information of REs occupied by PDSCH. In any of these methods, it is necessary to convert the mode information (pattern information) of the physical channel or signal into the bit map RE Bitmap of the resource element RE of the PDSCH, and therefore, how to convert the mode information into the RE Bitmap of the PDSCH is a problem to be solved.

Disclosure of Invention

The embodiment of the application provides a resource mapping method, a resource mapping device and a storage medium, which can convert mode information into RE bitmaps of PDSCH.

In a first aspect, the present application provides a resource mapping method applied to an electronic device including a receiver, where the receiver includes an algorithm processor and a hardware processor, where,

the algorithm processor acquires mode information, wherein the mode information is used for indicating time-frequency resources;

and the algorithm processor generates a resource mapping table required by the hardware processor according to the mode information, wherein the resource mapping table is used for indicating resource element RE position information occupied by a physical downlink control channel (PDSCH).

In a second aspect, an embodiment of the present application provides a resource mapping apparatus, which is applied to an electronic device including a receiver, where the receiver includes an algorithm processor and a hardware processor, and the apparatus includes: an acquisition unit and a generation unit, wherein,

the obtaining unit is configured to obtain, by the algorithm processor, mode information, where the mode information is used to indicate a time-frequency resource;

the generating unit is configured to generate, by the algorithm processor, a resource mapping table required by the hardware processor according to the mode information, where the resource mapping table is used to indicate resource element RE position information occupied by a physical downlink control channel PDSCH.

In a third aspect, an embodiment of the present application provides an electronic device, which includes a processor, a memory, the processor includes at least an algorithm processor and a hardware processor, a receiver is formed by the algorithm processor and the hardware processor, the memory is used for storing one or more programs and is configured to be executed by the processor, and the program includes instructions for executing steps in the method according to any one of the claims in the first aspect.

In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, where the computer-readable storage medium stores a computer program for electronic data exchange, where the computer program enables a computer to perform some or all of the steps described in the first aspect of the embodiment of the present application.

In a fifth aspect, embodiments of the present application provide a computer program product, where the computer program product includes a non-transitory computer-readable storage medium storing a computer program, where the computer program is operable to cause a computer to perform some or all of the steps as described in the first aspect of the embodiments of the present application. The computer program product may be a software installation package.

It can be seen that the resource mapping method, apparatus, and storage medium described in the embodiments of the present application are applied to an electronic device including a receiver, where the receiver includes an algorithm processor and a hardware processor, the algorithm processor obtains mode information, the mode information is used to indicate time-frequency resources, the algorithm processor generates a resource mapping table required by the hardware processor according to the mode information, and the resource mapping table is used to indicate resource element RE position information occupied by a PDSCH (physical downlink control channel).

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

Fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure;

fig. 2 is a schematic diagram of a software structure of an electronic device according to an embodiment of the present application;

fig. 3A is a schematic structural diagram of a receiver of an electronic device according to an embodiment of the present disclosure;

fig. 3B is a schematic structural diagram of a receiver of another electronic device according to an embodiment of the present disclosure;

fig. 3C is a schematic structural diagram of a receiver of another electronic device according to an embodiment of the present application;

fig. 4A is a flowchart illustrating a resource mapping method according to an embodiment of the present application;

FIG. 4B is a schematic diagram illustrating a schema information provided by an embodiment of the present application;

FIG. 4C is a schematic diagram illustrating another example of schema information provided by embodiments of the present application;

FIG. 4D is a schematic diagram illustrating another example of schema information provided by embodiments of the present application;

FIG. 4E is a schematic diagram illustrating a resource mapping table provided in an embodiment of the present application;

fig. 5 is a schematic structural diagram of another electronic device provided in an embodiment of the present application;

fig. 6A is a block diagram illustrating functional units of a resource mapping apparatus according to an embodiment of the present disclosure;

fig. 6B is a block diagram illustrating functional units of another resource mapping apparatus according to an embodiment of the present disclosure;

fig. 6C is a block diagram illustrating functional units of another resource mapping apparatus according to an embodiment of the present disclosure.

Detailed Description

The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings.

In order to better understand the scheme of the embodiments of the present application, the following first introduces the related terms and concepts that may be involved in the embodiments of the present application.

The electronic device may include various devices with receivers, in-vehicle devices, wearable devices, smart watches, smart glasses, computing devices, or other processing devices connected to a wireless modem, as well as various forms of User Equipment (UE), Mobile Stations (MS), virtual reality/augmented reality devices, terminal devices (terminal devices), and so forth, and may also be a base Station or a server. Of course, the electronic device may also be a receiver only. In this embodiment, the receiver may include an algorithm processor and a hardware processor, where the algorithm processor may be at least one of: a vector processor or other processors capable of implementing matrix operations, which is not limited herein, in a specific implementation, the vector processor may be a neural-Network Processing Unit (NPU), a Graphics Processing Unit (GPU), an Application Processor (AP), or other artificial intelligence chips, and the hardware processor may be a processor capable of implementing simple operations and providing hardware support, which may be a conventional processor, or may also be an NPU, a GPU, an AP, or other artificial intelligence chips, and the like. The algorithm processor and the hardware processor may be integrated in one chip, or the algorithm processor and the hardware processor may be different chips or modules.

In the embodiment of the present application, the vector processor may be a parallel processing computer system oriented to vector type parallel computing and mainly having a pipeline structure. It may employ parallel processing architectures such as look-ahead control and overlap-operation techniques, arithmetic pipelining, interleaved parallel memory, and the like.

The vector processor may be adapted to linear programming, fourier transform, filter calculation, and solution of mathematical problems such as matrix, linear algebra, partial differential equation, integral, etc., and is not limited herein.

The logic structure of a vector processor may consist of a common pipelined scalar unit plus a vector unit. Vector processors may include two types: vector-register (vector-register) processors and memory-memory (memory-memory) processors. In a vector-register class of processors, all vector operations, except load and store, are performed within vector registers (vector registers). In a memory-memory class vector processor, all vector operations are from memory to memory.

The electronic device may further include an intelligent home device, and the intelligent home device may be at least one of: intelligent audio amplifier, intelligent camera, intelligent electric rice cooker, intelligent wheelchair, intelligent massage armchair, intelligent furniture, intelligent dish washer, intelligent TV set, intelligent refrigerator, intelligent electric fan, intelligent room heater, intelligent clothes hanger that dries in the air, intelligent lamp, intelligent router, intelligent switch, intelligent flush mounting plate, intelligent humidifier, intelligent air conditioner, intelligent door, intelligent window, intelligent top of a kitchen range, intelligent sterilizer, intelligent closestool, the robot etc. of sweeping the floor do not restrict here.

In a first section, the software and hardware operating environment of the technical solution disclosed in the present application is described as follows.

As shown, fig. 1 shows a schematic structural diagram of an electronic device 100. The electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a Universal Serial Bus (USB) interface 130, a charge management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a compass 190, a motor 191, a pointer 192, a camera 193, a display screen 194, a Subscriber Identification Module (SIM) card interface 195, and the like.

It is to be understood that the illustrated structure of the embodiment of the present application does not specifically limit the electronic device 100. In other embodiments of the present application, electronic device 100 may include more or fewer components than shown, or some components may be combined, some components may be split, or a different arrangement of components. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

Processor 110 may include one or more processing units, such as: the processor 110 may include an application processor AP, a modem processor, a graphics processor GPU, an Image Signal Processor (ISP), a controller, a video codec, a Digital Signal Processor (DSP), a baseband processor, and/or a neural network processor NPU, among others. Wherein the different processing units may be separate components or may be integrated in one or more processors. In some embodiments, the electronic device 101 may also include one or more processors 110. The controller can generate an operation control signal according to the instruction operation code and the time sequence signal to complete the control of instruction fetching and instruction execution. In other embodiments, a memory may also be provided in processor 110 for storing instructions and data. Illustratively, the memory in the processor 110 may be a cache memory. The memory may hold instructions or data that have just been used or recycled by the processor 110. If the processor 110 needs to reuse the instruction or data, it can be called directly from memory. This avoids repeated accesses and reduces the latency of the processor 110, thereby increasing the efficiency with which the electronic device 101 processes data or executes instructions.

In some embodiments, processor 110 may include one or more interfaces. The interface may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit audio (I2S) interface, a Pulse Code Modulation (PCM) interface, a universal asynchronous receiver/transmitter (UART) interface, a Mobile Industry Processor Interface (MIPI), a general-purpose input/output (GPIO) interface, a SIM card interface, a USB interface, and/or the like. The USB interface 130 is an interface conforming to the USB standard specification, and may specifically be a Mini USB interface, a Micro USB interface, a USB Type C interface, or the like. The USB interface 130 may be used to connect a charger to charge the electronic device 101, and may also be used to transmit data between the electronic device 101 and peripheral devices. The USB interface 130 may also be used to connect to a headset to play audio through the headset.

It should be understood that the interface connection relationship between the modules illustrated in the embodiments of the present application is only an illustration, and does not limit the structure of the electronic device 100. In other embodiments of the present application, the electronic device 100 may also adopt different interface connection manners or a combination of multiple interface connection manners in the above embodiments.

The charging management module 140 is configured to receive charging input from a charger. The charger may be a wireless charger or a wired charger. In some wired charging embodiments, the charging management module 140 may receive charging input from a wired charger via the USB interface 130. In some wireless charging embodiments, the charging management module 140 may receive a wireless charging input through a wireless charging coil of the electronic device 100. The charging management module 140 may also supply power to the electronic device through the power management module 141 while charging the battery 142.

The power management module 141 is used to connect the battery 142, the charging management module 140 and the processor 110. The power management module 141 receives input from the battery 142 and/or the charge management module 140, and supplies power to the processor 110, the internal memory 121, the external memory, the display 194, the camera 193, the wireless communication module 160, and the like. The power management module 141 may also be used to monitor parameters such as battery capacity, battery cycle count, battery state of health (leakage, impedance), etc. In some other embodiments, the power management module 141 may also be disposed in the processor 110. In other embodiments, the power management module 141 and the charging management module 140 may be disposed in the same device.

The wireless communication function of the electronic device 100 may be implemented by the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, a modem processor, a baseband processor, and the like.

The antennas 1 and 2 are used for transmitting and receiving electromagnetic wave signals. Each antenna in the electronic device 100 may be used to cover a single or multiple communication bands. Different antennas can also be multiplexed to improve the utilization of the antennas. For example: the antenna 1 may be multiplexed as a diversity antenna of a wireless local area network. In other embodiments, the antenna may be used in conjunction with a tuning switch.

The mobile communication module 150 may provide a solution including wireless communication of 2G/3G/4G/5G/6G, etc. applied to the electronic device 100. The mobile communication module 150 may include at least one filter, a switch, a power amplifier, a Low Noise Amplifier (LNA), and the like. The mobile communication module 150 may receive the electromagnetic wave from the antenna 1, filter, amplify, etc. the received electromagnetic wave, and transmit the electromagnetic wave to the modem processor for demodulation. The mobile communication module 150 may also amplify the signal modulated by the modem processor, and convert the signal into electromagnetic wave through the antenna 1 to radiate the electromagnetic wave. In some embodiments, at least some of the functional modules of the mobile communication module 150 may be disposed in the processor 110. In some embodiments, at least some of the functional modules of the mobile communication module 150 may be disposed in the same device as at least some of the modules of the processor 110.

The wireless communication module 160 may provide a solution for wireless communication applied to the electronic device 100, including Wireless Local Area Networks (WLANs) (such as wireless fidelity (Wi-Fi) networks), bluetooth (bluetooth), Global Navigation Satellite System (GNSS), Frequency Modulation (FM), Near Field Communication (NFC), Infrared (IR), and the like. The wireless communication module 160 may be one or more devices integrating at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via the antenna 2, performs frequency modulation and filtering processing on electromagnetic wave signals, and transmits the processed signals to the processor 110. The wireless communication module 160 may also receive a signal to be transmitted from the processor 110, perform frequency modulation and amplification on the signal, and convert the signal into electromagnetic waves through the antenna 2 to radiate the electromagnetic waves.

The electronic device 100 implements display functions via the GPU, the display screen 194, and the application processor. The GPU is a microprocessor for image processing, and is connected to the display screen 194 and an application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 110 may include one or more GPUs that execute program instructions to generate or alter display information.

The display screen 194 is used to display images, videos, and the like. The display screen 194 includes a display panel. The display panel may be a Liquid Crystal Display (LCD), an organic light-emitting diode (OLED), an active matrix organic light-emitting diode (active-matrix organic light-emitting diode (AMOLED)), a flexible light-emitting diode (FLED), a mini light-emitting diode (mini-light-emitting diode (mini), a Micro-o led, a quantum dot light-emitting diode (QLED), or the like. In some embodiments, the electronic device 100 may include 1 or more display screens 194.

The electronic device 100 may implement a photographing function through the ISP, the camera 193, the video codec, the GPU, the display screen 194, the application processor, and the like.

The ISP is used to process the data fed back by the camera 193. For example, when a photo is taken, the shutter is opened, light is transmitted to the camera photosensitive element through the lens, the optical signal is converted into an electrical signal, and the camera photosensitive element transmits the electrical signal to the ISP for processing and converting into an image visible to naked eyes. The ISP can also carry out algorithm optimization on the noise, brightness and skin color of the image. The ISP can also optimize parameters such as exposure, color temperature and the like of a shooting scene. In some embodiments, the ISP may be provided in camera 193.

The camera 193 is used to capture still images or video. The object generates an optical image through the lens and projects the optical image to the photosensitive element. The photosensitive element may be a Charge Coupled Device (CCD) or a complementary metal-oxide-semiconductor (CMOS) phototransistor. The light sensing element converts the optical signal into an electrical signal, which is then passed to the ISP where it is converted into a digital image signal. And the ISP outputs the digital image signal to the DSP for processing. The DSP converts the digital image signal into image signal in standard RGB, YUV and other formats. In some embodiments, the electronic device 100 may include 1 or more cameras 193.

The digital signal processor is used for processing digital signals, and can process digital image signals and other digital signals. For example, when the electronic device 100 selects a frequency bin, the digital signal processor is used to perform fourier transform or the like on the frequency bin energy.

Video codecs are used to compress or decompress digital video. The electronic device 100 may support one or more video codecs. In this way, the electronic device 100 may play or record video in a variety of encoding formats, such as: moving Picture Experts Group (MPEG) 1, MPEG2, MPEG3, MPEG4, and the like.

The NPU is a neural-network (NN) computing processor that processes input information quickly by using a biological neural network structure, for example, by using a transfer mode between neurons of a human brain, and can also learn by itself continuously. Applications such as intelligent recognition of the electronic device 100 can be realized through the NPU, for example: image recognition, face recognition, speech recognition, text understanding, and the like.

The external memory interface 120 may be used to connect an external memory card, such as a Micro SD card, to extend the memory capability of the electronic device 100. The external memory card communicates with the processor 110 through the external memory interface 120 to implement a data storage function. For example, files such as music, video, etc. are saved in an external memory card.

Internal memory 121 may be used to store one or more computer programs, including instructions. The processor 110 may execute the above-mentioned instructions stored in the internal memory 121, so as to enable the electronic device 101 to execute the method for displaying page elements provided in some embodiments of the present application, and various applications and data processing. The internal memory 121 may include a program storage area and a data storage area. Wherein, the storage program area can store an operating system; the storage program area may also store one or more applications (e.g., gallery, contacts, etc.), and the like. The storage data area may store data (such as photos, contacts, etc.) created during use of the electronic device 101, and the like. Further, the internal memory 121 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic disk storage components, flash memory components, Universal Flash Storage (UFS), and the like. In some embodiments, the processor 110 may cause the electronic device 101 to execute the method for displaying page elements provided in the embodiments of the present application, and other applications and data processing by executing instructions stored in the internal memory 121 and/or instructions stored in a memory provided in the processor 110. The electronic device 100 may implement audio functions through the audio module 170, the speaker 170A, the receiver 170B, the microphone 170C, the earphone interface 170D, and the application processor, etc. Such as music playing, recording, etc.

The sensor module 180 may include a pressure sensor 180A, a gyro sensor 180B, an air pressure sensor 180C, a magnetic sensor 180D, an acceleration sensor 180E, a distance sensor 180F, a proximity light sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, and the like.

The pressure sensor 180A is used for sensing a pressure signal, and converting the pressure signal into an electrical signal. In some embodiments, the pressure sensor 180A may be disposed on the display screen 194. The pressure sensor 180A can be of a wide variety, such as a resistive pressure sensor, an inductive pressure sensor, a capacitive pressure sensor, and the like. The capacitive pressure sensor may be a sensor comprising at least two parallel plates having an electrically conductive material. When a force acts on the pressure sensor 180A, the capacitance between the electrodes changes. The electronic device 100 determines the strength of the pressure from the change in capacitance. When a touch operation is applied to the display screen 194, the electronic apparatus 100 detects the intensity of the touch operation according to the pressure sensor 180A. The electronic apparatus 100 may also calculate the touched position from the detection signal of the pressure sensor 180A. In some embodiments, the touch operations that are applied to the same touch position but different touch operation intensities may correspond to different operation instructions. For example: and when the touch operation with the touch operation intensity smaller than the first pressure threshold value acts on the short message application icon, executing an instruction for viewing the short message. And when the touch operation with the touch operation intensity larger than or equal to the first pressure threshold value acts on the short message application icon, executing an instruction of newly building the short message.

The gyro sensor 180B may be used to determine the motion attitude of the electronic device 100. In some embodiments, the angular velocity of electronic device 100 about three axes (i.e., X, Y and the Z axis) may be determined by gyroscope sensor 180B. The gyro sensor 180B may be used for photographing anti-shake. For example, when the shutter is pressed, the gyro sensor 180B detects a shake angle of the electronic device 100, calculates a distance to be compensated for by the lens module according to the shake angle, and allows the lens to counteract the shake of the electronic device 100 through a reverse movement, thereby achieving anti-shake. The gyroscope sensor 180B may also be used for navigation, somatosensory gaming scenes.

The acceleration sensor 180E may detect the magnitude of acceleration of the electronic device 100 in various directions (typically three axes). The magnitude and direction of gravity can be detected when the electronic device 100 is stationary. The method can also be used for recognizing the posture of the electronic equipment, and is applied to horizontal and vertical screen switching, pedometers and other applications.

The ambient light sensor 180L is used to sense the ambient light level. Electronic device 100 may adaptively adjust the brightness of display screen 194 based on the perceived ambient light level. The ambient light sensor 180L may also be used to automatically adjust the white balance when taking a picture. The ambient light sensor 180L may also cooperate with the proximity light sensor 180G to detect whether the electronic device 100 is in a pocket to prevent accidental touches.

The fingerprint sensor 180H is used to collect a fingerprint. The electronic device 100 can utilize the collected fingerprint characteristics to unlock the fingerprint, access the application lock, photograph the fingerprint, answer an incoming call with the fingerprint, and so on.

The temperature sensor 180J is used to detect temperature. In some embodiments, electronic device 100 implements a temperature processing strategy using the temperature detected by temperature sensor 180J. For example, when the temperature reported by the temperature sensor 180J exceeds a threshold, the electronic device 100 performs a reduction in performance of a processor located near the temperature sensor 180J, so as to reduce power consumption and implement thermal protection. In other embodiments, the electronic device 100 heats the battery 142 when the temperature is below another threshold to avoid the low temperature causing the electronic device 100 to shut down abnormally. In other embodiments, when the temperature is lower than a further threshold, the electronic device 100 performs boosting on the output voltage of the battery 142 to avoid abnormal shutdown due to low temperature.

The touch sensor 180K is also referred to as a "touch panel". The touch sensor 180K may be disposed on the display screen 194, and the touch sensor 180K and the display screen 194 form a touch screen, which is also called a "touch screen". The touch sensor 180K is used to detect a touch operation applied thereto or nearby. The touch sensor can communicate the detected touch operation to the application processor to determine the touch event type. Visual output associated with the touch operation may be provided through the display screen 194. In other embodiments, the touch sensor 180K may be disposed on a surface of the electronic device 100, different from the position of the display screen 194.

Fig. 2 shows a block diagram of a software structure of the electronic device 100. The layered architecture divides the software into several layers, each layer having a clear role and division of labor. The layers communicate with each other through a software interface. In some embodiments, the Android system is divided into four layers, an application layer, an application framework layer, an Android runtime (Android runtime) and system library, and a kernel layer from top to bottom. The application layer may include a series of application packages.

As shown in fig. 2, the application layer may include applications such as camera, gallery, calendar, phone call, map, navigation, WLAN, bluetooth, music, video, short message, etc.

The application framework layer provides an Application Programming Interface (API) and a programming framework for the application programs of the application layer. The application framework layer includes a number of predefined functions.

As shown in FIG. 2, the application framework layers may include a window manager, content provider, view system, phone manager, resource manager, notification manager, and the like.

The window manager is used for managing window programs. The window manager can obtain the size of the display screen, judge whether a status bar exists, lock the screen, intercept the screen and the like.

The content provider is used to store and retrieve data and make it accessible to applications. The data may include video, images, audio, calls made and received, browsing history and bookmarks, phone books, etc.

The view system includes visual controls such as controls to display text, controls to display pictures, and the like. The view system may be used to build applications. The display interface may be composed of one or more views. For example, the display interface including the short message notification icon may include a view for displaying text and a view for displaying pictures.

The phone manager is used to provide communication functions of the electronic device 100. Such as management of call status (including on, off, etc.).

The resource manager provides various resources for the application, such as localized strings, icons, pictures, layout files, video files, and the like.

The notification manager enables the application to display notification information in the status bar, can be used to convey notification-type messages, can disappear automatically after a short dwell, and does not require user interaction. Such as a notification manager used to inform download completion, message alerts, etc. The notification manager may also be a notification that appears in the form of a chart or scroll bar text at the top status bar of the system, such as a notification of a background running application, or a notification that appears on the screen in the form of a dialog window. For example, prompting text information in the status bar, sounding a prompt tone, vibrating the electronic device, flashing an indicator light, etc.

The Android Runtime comprises a core library and a virtual machine. The Android runtime is responsible for scheduling and managing an Android system.

The core library comprises two parts: one part is a function which needs to be called by java language, and the other part is a core library of android.

The application layer and the application framework layer run in a virtual machine. And executing java files of the application program layer and the application program framework layer into a binary file by the virtual machine. The virtual machine is used for performing the functions of object life cycle management, stack management, thread management, safety and exception management, garbage collection and the like.

The system library may include a plurality of functional modules. For example: surface managers (surface managers), media libraries (media libraries), three-dimensional graphics processing libraries (e.g., OpenGL ES), 2D graphics engines (e.g., SGL), and the like.

The surface manager is used to manage the display subsystem and provide fusion of 2D and 3D layers for multiple applications.

The media library supports a variety of commonly used audio, video format playback and recording, and still image files, among others. The media library may support a variety of audio-video encoding formats, such as: MPEG4, H.264, MP3, AAC, AMR, JPG, PNG, etc.

The three-dimensional graphic processing library is used for realizing three-dimensional graphic drawing, image rendering, synthesis, layer processing and the like.

The 2D graphics engine is a drawing engine for 2D drawing.

The kernel layer is a layer between hardware and software. The inner core layer at least comprises a display driver, a camera driver, an audio driver and a sensor driver.

In the second section, the resource mapping method and apparatus disclosed in the embodiments of the present application are introduced as follows.

In the related art, as shown in fig. 3A, the receiver may include a Radio Frequency (RF) module, an Analog Digital Converter (ADC), a Digital Front End (DFE), a Fast Fourier Transform (FFT) module, a channel information feedback (CFB) module, a channel Estimation (EST) module, a demodulation (demodulation) module, and a Decoding (DEC) module.

The radio frequency module is used for receiving radio frequency signals; the analog-to-digital conversion module is used for converting the analog signal into a digital signal; the digital front-end module is used for preprocessing the digital signal, and the preprocessing can include at least one of the following: filtering, denoising, quantizing, smoothing, and the like, which are not limited herein; the fast fourier transform module is used to transform the digital signal from the time domain to the frequency domain, for example, the fast fourier transform module can transform the input digital signal into: CSI-RSSignal, DMRS/CRS Signal and Rec Signal; the channel information feedback module is used for adjusting communication link parameters according to the channel state information; the channel estimation module can obtain impulse response of a channel and provide required CSI for subsequent coherent demodulation; the demodulation module is used for realizing the demodulation operation of the signals and providing hardware support; the decoding module is used for decoding the signal; the hardware processor is used for realizing simple operation and providing hardware support; the receiver may further comprise a vector processor VDSP which can be used to implement matrix operations, vector operations.

In a specific implementation, when the demodulation module DEM, the channel estimation module EST, and the channel information feedback module CFB are all processed by the hardware processor HW, then the mode information (Pattern information) is configured to the hardware processor; similarly, when the DEM, EST, and CFB are all processed at VDSP, then the mode information is configured to the vector processor VDSP. When DEM, EST and CFB are processed in HW or VDSP, respectively, then Pattern information is configured to HW or VDSP, respectively.

In this embodiment, if the DEM, the EST, and the CFB are all disposed on the VDSP or the HW, advantages of the VDSP and the HW cannot be fully utilized, and there is no flexibility, and to a certain extent, the conversion efficiency of the bit map RE Bitmap of the resource element RE for converting the mode information (pattern information) into the PDSCH is reduced.

Further, in the related art, as shown in fig. 3B, EST and CFB are processed in VDSP for flexibility, while the operations in DEM module are relatively fixed and are thus processed in HW. Mode information of various physical channels and physical signals are allocated to the VDSP and HW, respectively. The mode information configured for the VDSP may include mode information of a DMRS, a CRS, and a CSI-RS; the mode information configured to the DEM may include: DMRS, CRS, CSI-RS, PDCCH, PCFICH, PHICH, PBCH, Pattern of SS, and mode information of Rate Matching Resource. The mode information of the DMRS, the CRS and the CSI-RS is repeated, and the types of the mode information of the CSI-RS are more, so that the mode information is repeatedly configured, and the conversion efficiency of the resource mapping table required by the mode information generation demodulation module is reduced.

Based on fig. 3A or fig. 3B, in the embodiment of the present application, the structure of fig. 3A or fig. 3B is improved, as shown in fig. 3C, in the embodiment of the present application, a receiver may configure all mode information as an interface to a VDSP, in the VDSP, EST and CFB may respectively process functions that need to be performed by its own module by using the mode information, and in the VDSP, PDSCH RE information (resource mapping table) that is needed to generate DEM, that is, PDSCH RE Bitmap may also be generated. PDSCH RE Bitmap information may be passed to DEM in HW as a signal between VDSP and HW. The signaling between VDSP and HW may be in the form of Memory access, and certainly, the HW is not configured with the mode information any more, so that the repeated configuration of the mode information is avoided.

Compared with the embodiment shown in fig. 3B, in the embodiment shown in fig. 3C, when the electronic device configures Pattern information as interfaces to VDSP and HW, respectively, the amount of configured interfaces required is almost twice as much as the amount of Pattern information in the embodiment shown in fig. 3C. The embodiment shown in fig. 3C, while having flexibility, only needs to configure twice the Pattern information, i.e. the interface configuration is saved by nearly 50%.

Of course, the receivers shown in fig. 3A to 3C may be applied to the electronic devices shown in fig. 1 or fig. 2.

Further, based on the structure of fig. 3C, the present application provides please refer to fig. 4A, fig. 4A is a flowchart illustrating a resource mapping method provided in an embodiment of the present application, and as shown, the resource mapping method is applied to an electronic device including a receiver shown in fig. 3C, where the receiver includes an algorithm processor and a hardware processor, and the resource mapping method includes:

401. the algorithm processor obtains mode information, and the mode information is used for indicating time frequency resources.

In the embodiment of the present application, an algorithm processor of the electronic device may obtain all mode information (Pattern information), where the mode information is used to indicate a time-frequency resource, and conversely, the hardware processor may not obtain any mode information.

In one possible example, the mode information includes at least:

the method comprises the following steps of demodulating mode information of a reference signal DRMS, mode information of a cell reference signal CRS, mode information of a CRI-RS, mode information of a physical downlink control channel PDCCH, mode information of a physical control format indicator channel PCFICH, mode information of a physical hybrid automatic repeat indicator channel PHICH, mode information of a physical channel PBCH, mode information of a synchronous signal SS and mode information of a Rate Matching Resource Rate Matching Resource.

The mode information may include Pattern information of DMRS, CRS, CSI-RS, PDCCH, PCFICH, PHICH, PBCH, SS, and Pattern information of Rate Matching Resource, and of course, the mode information may also include other mode information, and the corresponding mode information may have a certain difference according to a specific communication environment, for example, 4G, 5G, and 6G.

402. And the algorithm processor generates a resource mapping table required by the hardware processor according to the mode information, wherein the resource mapping table is used for indicating resource element RE position information occupied by a physical downlink control channel (PDSCH).

In this embodiment of the application, the algorithm processor may generate a resource mapping table required by at least one module in the hardware processor according to the mode information, where the at least one module may be a demodulation module or another module requiring the resource mapping table, and taking the algorithm processor as a vector processor as an example, the electronic device may configure all Pattern information as an interface to the VDSP, and generate the PDSCH RE Bitmap required by the DEM in the VDSP. PDSCH RE Bitmap information is passed to DEM in HW as a signal between VDSP and HW. The HW is no longer configured with Pattern information.

In one possible example, the hardware processor includes a demodulation module, and the receiver further includes: the decoding module, in the step 402, after the algorithm processor generates the resource mapping table required by the hardware processor according to the mode information, may further include the following steps:

a1, the hardware processor demodulates through the demodulation module according to the resource block mapping table to obtain a demodulation result, and inputs the demodulation result to the decoding module;

and A2, the decoding module performs decoding operation on the demodulation result to obtain a decoding result and outputs the decoding result.

The hardware processor may perform demodulation operation through the demodulation module according to the resource mapping table to obtain a demodulation result (Hfilter), and then may input the demodulation result to the decoding module to obtain a decoding result (LLR), and further may output a decoding result, that is, a PDSCH signal.

In one possible example, the electronic device further comprises: a controller; before the algorithm processor obtains the mode information in step 401, the method may further include the following steps:

b1, the algorithm processor acquires a first working parameter of the algorithm processor from the controller;

b2, the algorithm processor works according to the first working parameter;

then, in step 401, the algorithm processor obtains the mode information, which can be implemented as follows:

the algorithm processor obtains the mode information from the controller.

Wherein the first operating parameter may be at least one of: whether the algorithm processor is started, the working time of the algorithm processor, the information of the resource allocation required when the algorithm processor performs digital signal processing, the working time sequence of the algorithm processor, and the like are not limited herein.

In a specific implementation, the algorithm processor may obtain a first operating parameter of the algorithm processor from the controller DSP, and further, the algorithm processor may operate according to the first operating parameter, for example, implement a digital signal processing function during digital signal processing according to the resource allocation information in the first operating parameter, for example, perform a large number of vector operations or matrix operations, and so on. The algorithm processor may also obtain mode information from the controller.

In a possible example, before the hardware processor of step a1 performs a demodulation operation according to the resource block mapping table by the demodulation module to obtain a demodulation result, the method may further include the following steps:

c1, the hardware processor acquires a second working parameter of the hardware processor from the controller;

and C2, the hardware processor works according to the second working parameter.

Wherein the second operating parameter may be at least one of: whether HW is enabled, the operating time of HW, the operating timing of HW, and the like are not limited herein.

In a specific implementation, the hardware processor may obtain the second operating parameter of the hardware processor from the controller, and the hardware processor may operate according to the second operating parameter, for example, the hardware processor may operate according to the operating time of the HW.

In one possible example, the algorithm processor comprises: a channel information feedback module CFB and a channel estimation module EST.

In a specific implementation, the computing unit that needs the location information further includes an EST (channel estimation module) and a CFB (channel information feedback module). The channel information feedback module is used for adjusting communication link parameters according to the channel state information; the channel estimation module can obtain the impulse response of the channel and provide the required CSI for the subsequent coherent demodulation.

In one possible example, the signal transmission mode between the algorithm processor and the hardware processor is a memory access mode.

The signal transmission between the algorithm processor and the hardware processor is a memory access method, for example, Direct Memory Access (DMA).

In the specific implementation, taking the algorithm processor as VDSP as an example, the controller Control DSP may be configured to configure necessary parameters of VDSP and HW, where the necessary parameters include whether VDSP is started or not and a starting time; information of resource allocation required by VDSP in digital signal processing and Pattern information of various reference signals; whether HW is enabled and the time of the enabling etc.

That is, the VDSP can obtain Pattern information of various reference signals from the control DSP. As shown in fig. 4B, fig. 4B provides a schematic diagram of the mode information obtained from the control DSP.

In a specific implementation, in the resource allocation, each bit of the resource allocation in the frequency direction indicates whether the RB has a resource allocation. For example, the Pattern information (Pattern) is assumed to be {1,1,1,0,0,0, 0}, which indicates that 3 RBs to which low frequency positions are allocated (7 RBs not allocated are not shown in the figure), each RB including 12 subcarriers, as shown in the figure, 36 subcarriers are allocated in total.

In addition, each bit of the resource allocation in the time direction indicates whether or not there is a resource allocation for this symbol. E.g., {0,0,1,1,1,1,1,1,1,1,1, 1}, indicates that 12 OFDM symbols in total, from symbol 2 to symbol 13, are allocated, and there is no resource allocation for symbol 0 and symbol 1.

Then, according to the resource allocation information, the RE Bitmap of the entire time-frequency resource may be initially obtained, as shown in fig. 4C, as a matter of course, the value corresponding to the bit of the CSI-RS in the diagram is also 1.

Next, in this embodiment of the application, taking PDSCH DMRS as an example, a process of deducting PDSCHDMRS occupied resources according to DMRS Pattern is given.

PDSCH DMRS, pattern information may include: DMRS type, ofdmsymbol pos, DMRS cdmcgroupwithdata.

The DMRS Type indicates Type information of the DMRS, and may be configured as Type1 or Type2, where different types are different, patterns of the DMRS in the frequency direction are different, and the dmrsttype 1 is shown in the figure; OFDM symbol positions occupied by DMRS, namely pos2 and pos 7; DMRS cdmggroupwwithoutdata, which indicates DMRS CDM group to which data is not allocated, is 1 in the figure.

Further, according to the above information, it can be obtained that the bitmap of the DMRS in frequency is {1,0,1,0, …,1,0}, and the OFDM symbol 2 and symbol 7 are occupied in the time direction. Since the positions of DMRS whose bitmap is 1 indicate that PDSCH is not available, these positions are set to 0, as shown in fig. 4D, and of course, the values corresponding to the bits of CSI-RS in the figure are also 1.

Similarly, in the embodiment of the present application, the bitmap of the resource may be obtained according to Pattern information of the RE Level Rate Matching and other Pattern information, and then, the resource occupied by the PDSCH may be set according to the bitmap. Finally, the PDSCH RE Bitmap is obtained, as shown in fig. 4E, where the corresponding value of the bit of the CSI-RS in the diagram is 0.

It can be seen that the resource mapping method described in this embodiment of the present application is applied to an electronic device including a receiver, where the receiver includes an algorithm processor and a hardware processor, where the algorithm processor obtains mode information, the mode information is used to indicate time-frequency resources, the algorithm processor generates a resource mapping table required by the hardware processor according to the mode information, and the resource mapping table is used to indicate resource element RE position information occupied by a PDSCH (physical downlink control channel), and since all the mode information is configured to the algorithm processor as an interface and the resource mapping table required by the algorithm processor is generated, repeated configuration of the mode information can be avoided, configuration efficiency of the mode information is improved, and system resources are saved.

Referring to fig. 5 in keeping with the above embodiments, fig. 5 is a schematic structural diagram of an electronic device provided in an embodiment of the present application, as shown in the figure, the electronic device includes a processor, a memory, a communication interface, and one or more programs, the processor includes at least an algorithm processor and a hardware processor, and a receiver is formed by the algorithm processor and the hardware processor, where the one or more programs are stored in the memory and configured to be executed by the processor, and in an embodiment of the present application, the program includes instructions for performing the following steps:

It can be seen that, in the electronic device described in this embodiment of the present application, the electronic device includes a processor and a memory, the processor includes at least an algorithm processor and a hardware processor, the algorithm processor and the hardware processor form a receiver, the algorithm processor obtains mode information, the mode information is used for indicating time-frequency resources, the algorithm processor generates a resource mapping table required by the hardware processor according to the mode information, the resource mapping table is used for indicating resource element RE position information occupied by a PDSCH, and since all the mode information is configured to the algorithm processor as an interface and the resource mapping table required by the hardware processor is generated, repeated configuration of the mode information can be avoided, configuration efficiency of the mode information is improved, and system resources are saved.

In one possible example, the hardware processor includes a demodulation module, and the receiver further includes: a decoding module, the program further comprising instructions for performing the steps of:

the hardware processor carries out demodulation operation through the demodulation module according to the resource block mapping table to obtain a demodulation result, and inputs the demodulation result to the decoding module;

and the decoding module performs decoding operation on the demodulation result to obtain a decoding result and outputs the decoding result.

In one possible example, the electronic device further includes a controller, and the program further includes instructions for:

the algorithm processor acquires a first working parameter of the algorithm processor from the controller;

the algorithm processor works according to the first working parameter;

in the aspect of the algorithm processor acquiring mode information, the program includes instructions for performing the steps of:

the algorithm processor obtains the mode information from the controller.

In one possible example, the program further includes instructions for performing the steps of:

the hardware processor acquires a second working parameter of the hardware processor from the controller;

and the hardware processor works according to the second working parameter.

In one possible example, the mode information includes at least:

The above description has introduced the solution of the embodiment of the present application mainly from the perspective of the method-side implementation process. It is understood that the electronic device comprises corresponding hardware structures and/or software modules for performing the respective functions in order to realize the above-mentioned functions. Those of skill in the art will readily appreciate that the present application is capable of hardware or a combination of hardware and computer software implementing the various illustrative elements and algorithm steps described in connection with the embodiments provided herein. Whether a function is performed as hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

In the embodiment of the present application, the electronic device may be divided into the functional units according to the method example, for example, each functional unit may be divided corresponding to each function, or two or more functions may be integrated into one processing unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit. It should be noted that the division of the unit in the embodiment of the present application is schematic, and is only a logic function division, and there may be another division manner in actual implementation.

Fig. 6A is a block diagram of functional units of a resource mapping apparatus 600 according to an embodiment of the present application. The resource mapping apparatus 600 is applied to an electronic device including a receiver including an algorithm processor and a hardware processor, the apparatus 600 includes: an acquisition unit 601 and a generation unit 602, wherein,

the obtaining unit 601 is configured to obtain, by the algorithm processor, mode information, where the mode information is used to indicate a time-frequency resource;

the generating unit 602 is configured to generate, by the algorithm processor, a resource mapping table required by the hardware processor according to the mode information, where the resource mapping table is used to indicate resource element RE position information occupied by a physical downlink control channel PDSCH.

It can be seen that the resource mapping apparatus described in this embodiment of the present application is applied to an electronic device including a receiver, where the receiver includes an algorithm processor and a hardware processor, where the algorithm processor obtains mode information, the mode information is used to indicate time-frequency resources, the algorithm processor generates a resource mapping table required by the hardware processor according to the mode information, and the resource mapping table is used to indicate resource element RE position information occupied by a PDSCH (physical downlink control channel), and since all the mode information is configured to the algorithm processor as an interface and the resource mapping table required by the hardware processor is generated, repeated configuration of the mode information can be avoided, configuration efficiency of the mode information is improved, and system resources are saved.

In one possible example, the receiver further comprises: a decoding module, the hardware processor includes a demodulation module, as shown in fig. 6B, fig. 6B is a further modified structure of the resource mapping apparatus shown in fig. 6A, and compared with fig. 6A, the decoding module may further include a demodulation unit 603 and a decoding unit 604, specifically as follows:

the demodulation unit 603 is configured to perform demodulation operation according to the resource block mapping table through the demodulation module to obtain a demodulation result, and input the demodulation result to the decoding module;

the decoding unit 604 is configured to perform a decoding operation on the demodulation result through the decoding module to obtain a decoding result, and output the decoding result.

In a possible example, the electronic device further includes a controller, as shown in fig. 6C, where fig. 6C is a further modified structure of the resource mapping apparatus shown in fig. 6B, and compared with fig. 6B, the electronic device may further include a control unit 605, specifically as follows:

the acquisition unit is further used for acquiring a first working parameter of the algorithm processor from the controller through the algorithm processor;

the control unit 605 is configured to operate the algorithm processor according to the first operating parameter;

in terms of the algorithm processor acquiring the mode information, the acquiring unit 601 is specifically configured to:

the algorithm processor obtains the mode information from the controller.

In one possible example, the following is specified:

the acquiring unit is further configured to acquire, by the hardware processor, a second operating parameter of the hardware processor from the controller;

the control unit 605 is configured to operate according to the second operating parameter through the hardware processor.

In one possible example, the mode information includes at least:

It should be noted that the electronic device described in the embodiments of the present application is presented in the form of a functional unit. The term "unit" as used herein is to be understood in its broadest possible sense, and objects used to implement the functions described by the respective "unit" may be, for example, an integrated circuit ASIC, a single circuit, a processor (shared, dedicated, or chipset) and memory that execute one or more software or firmware programs, a combinational logic circuit, and/or other suitable components that provide the described functionality.

The obtaining unit 601, the generating unit 602, the demodulating unit 603, the decoding unit 604, and the control unit 605 may be control circuits or processors, and based on the above unit modules, the functions or steps of any of the above methods can be implemented.

The present embodiment also provides a computer program product, which when run on a computer causes the computer to execute the relevant steps described above to implement any of the methods in the above embodiments.

In addition, embodiments of the present application also provide an apparatus, which may be specifically a chip, a component or a module, and may include a processor and a memory connected to each other; the memory is used for storing computer execution instructions, and when the device runs, the processor can execute the computer execution instructions stored in the memory, so that the chip can execute any one of the methods in the above method embodiments.

The electronic device, the computer storage medium, the computer program product, or the chip provided in this embodiment are all configured to execute the corresponding method provided above, so that the beneficial effects achieved by the electronic device, the computer storage medium, the computer program product, or the chip may refer to the beneficial effects in the corresponding method provided above, and are not described herein again.

Through the description of the above embodiments, those skilled in the art will understand that, for convenience and simplicity of description, only the division of the above functional modules is used as an example, and in practical applications, the above function distribution may be completed by different functional modules as needed, that is, the internal structure of the device may be divided into different functional modules to complete all or part of the above described functions.

In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described embodiments of the apparatus are merely illustrative, and for example, a module or a unit may be divided into only one logic function, and may be implemented in other ways, for example, a plurality of units or components may be combined or integrated into another apparatus, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

Units described as separate parts may or may not be physically separate, and parts displayed as units may be one physical unit or a plurality of physical units, may be located in one place, or may be distributed to a plurality of different places. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.

The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a readable storage medium. Based on such understanding, the technical solutions of the embodiments of the present application may be essentially or partially contributed to by the prior art, or all or part of the technical solutions may be embodied in the form of a software product, where the software product is stored in a storage medium and includes several instructions to enable a device (which may be a single chip, a chip, or the like) or a processor (processor) to execute all or part of the steps of the methods of the embodiments of the present application. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A resource mapping method applied to an electronic device comprising a receiver including an arithmetic processor and a hardware processor, wherein,

2. The method of claim 1, wherein the hardware processor comprises a demodulation module, and wherein the receiver further comprises: a coding module, the method further comprising:

3. The resource mapping method according to claim 1 or 2, wherein the electronic device further comprises: a controller;

the algorithm processor works according to the first working parameter;

the algorithm processor obtains mode information, including:

the algorithm processor obtains the mode information from the controller.

4. The method of resource mapping according to claim 3, the method further comprising:

and the hardware processor works according to the second working parameter.

5. The resource mapping method according to any one of claims 1-4, wherein the algorithm processor comprises: a channel information feedback module CFB and a channel estimation module EST.

6. The method according to any one of claims 1 to 5, wherein the signaling between the algorithm processor and the hardware processor is a memory access.

7. The resource mapping method according to any of claims 1-6, wherein the mode information comprises at least:

8. A resource mapping apparatus, for use in an electronic device including a receiver, the receiver including an algorithm processor and a hardware processor, the apparatus comprising: an acquisition unit and a generation unit, wherein,

9. An electronic device, characterized in that the electronic device comprises a processor, which comprises at least an arithmetic processor and a hardware processor, which constitute a receiver, a memory for storing one or more programs and configured to be executed by the processor, the programs comprising instructions for performing the steps in the method according to any of claims 1-7.

10. A computer-readable storage medium, characterized in that a computer program for electronic data exchange is stored, wherein the computer program causes a computer to perform the method according to any one of claims 1-7.