CN111614413A - Receiving circuit and method for ATC (automatic train control) and DME (DME) test system - Google Patents
Receiving circuit and method for ATC (automatic train control) and DME (DME) test system Download PDFInfo
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- CN111614413A CN111614413A CN202010505003.6A CN202010505003A CN111614413A CN 111614413 A CN111614413 A CN 111614413A CN 202010505003 A CN202010505003 A CN 202010505003A CN 111614413 A CN111614413 A CN 111614413A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/20—Monitoring; Testing of receivers
- H04B17/21—Monitoring; Testing of receivers for calibration; for correcting measurements
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
- H04B1/12—Neutralising, balancing, or compensation arrangements
- H04B1/123—Neutralising, balancing, or compensation arrangements using adaptive balancing or compensation means
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S13/00—Systems using the reflection or reradiation of radio waves, e.g. radar systems; Analogous systems using reflection or reradiation of waves whose nature or wavelength is irrelevant or unspecified
- G01S13/02—Systems using reflection of radio waves, e.g. primary radar systems; Analogous systems
- G01S13/06—Systems determining position data of a target
- G01S13/08—Systems for measuring distance only
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/28—Details of pulse systems
- G01S7/285—Receivers
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/28—Details of pulse systems
- G01S7/285—Receivers
- G01S7/295—Means for transforming co-ordinates or for evaluating data, e.g. using computers
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/40—Means for monitoring or calibrating
- G01S7/4004—Means for monitoring or calibrating of parts of a radar system
- G01S7/4021—Means for monitoring or calibrating of parts of a radar system of receivers
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/40—Means for monitoring or calibrating
- G01S7/4052—Means for monitoring or calibrating by simulation of echoes
- G01S7/406—Means for monitoring or calibrating by simulation of echoes using internally generated reference signals, e.g. via delay line, via RF or IF signal injection or via integrated reference reflector or transponder
- G01S7/4069—Means for monitoring or calibrating by simulation of echoes using internally generated reference signals, e.g. via delay line, via RF or IF signal injection or via integrated reference reflector or transponder involving a RF signal injection
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- G—PHYSICS
- G08—SIGNALLING
- G08G—TRAFFIC CONTROL SYSTEMS
- G08G5/00—Traffic control systems for aircraft, e.g. air-traffic control [ATC]
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S13/00—Systems using the reflection or reradiation of radio waves, e.g. radar systems; Analogous systems using reflection or reradiation of waves whose nature or wavelength is irrelevant or unspecified
- G01S13/74—Systems using reradiation of radio waves, e.g. secondary radar systems; Analogous systems
- G01S13/76—Systems using reradiation of radio waves, e.g. secondary radar systems; Analogous systems wherein pulse-type signals are transmitted
- G01S13/78—Systems using reradiation of radio waves, e.g. secondary radar systems; Analogous systems wherein pulse-type signals are transmitted discriminating between different kinds of targets, e.g. IFF-radar, i.e. identification of friend or foe
- G01S13/781—Secondary Surveillance Radar [SSR] in general
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S13/00—Systems using the reflection or reradiation of radio waves, e.g. radar systems; Analogous systems using reflection or reradiation of waves whose nature or wavelength is irrelevant or unspecified
- G01S13/74—Systems using reradiation of radio waves, e.g. secondary radar systems; Analogous systems
- G01S13/76—Systems using reradiation of radio waves, e.g. secondary radar systems; Analogous systems wherein pulse-type signals are transmitted
- G01S13/78—Systems using reradiation of radio waves, e.g. secondary radar systems; Analogous systems wherein pulse-type signals are transmitted discriminating between different kinds of targets, e.g. IFF-radar, i.e. identification of friend or foe
- G01S13/785—Distance Measuring Equipment [DME] systems
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- G—PHYSICS
- G08—SIGNALLING
- G08G—TRAFFIC CONTROL SYSTEMS
- G08G5/00—Traffic control systems for aircraft, e.g. air-traffic control [ATC]
- G08G5/02—Automatic approach or landing aids, i.e. systems in which flight data of incoming planes are processed to provide landing data
- G08G5/025—Navigation or guidance aids
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- Engineering & Computer Science (AREA)
- Radar, Positioning & Navigation (AREA)
- Remote Sensing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Signal Processing (AREA)
- Electromagnetism (AREA)
- Aviation & Aerospace Engineering (AREA)
- Circuits Of Receivers In General (AREA)
- Analogue/Digital Conversion (AREA)
- Train Traffic Observation, Control, And Security (AREA)
Abstract
The invention discloses a receiving circuit and a method for an ATC (automatic train control) and DME (DME) testing system, wherein the circuit comprises a calibration signal input interface, a digital signal processing module and a plurality of signal receiving channels; each signal receiving channel is connected with a signal receiving port for receiving external signals; the calibration signal input port is connected with each signal receiving channel after passing through the gating switch and the channel selection switch; the digital signal processing module is used for comparing the received signal with the input calibration signal when the calibration signal is input into each signal receiving channel to generate an offset compensation table of the signal receiving channel; and calibrating the received signals by using the offset compensation table in the process of receiving the signals by each signal receiving channel. The invention can obtain the offset compensation table of each receiving channel based on the calibration signal, and calibrate the received signal when the actual signal is received, thereby effectively improving the accuracy of signal reception.
Description
Technical Field
The present invention relates to signal calibration reception for ATC and DME test systems, and more particularly, to a reception circuit and method for an ATC and DME test system.
Background
An Air Traffic Control System (ATC System for short) is an Air Traffic Control and management System widely used in the aviation department. The ATC system is mainly used for managing and controlling various flight affairs, effectively adjusting a flight affair plan, and controlling and preventing flight traffic accidents. The on-board unit responds to the interrogation signal by transmitting an interrogation signal via the ground system, providing the air traffic controller with information (typically A, C mode) regarding the location and identity of the aircraft within the airspace. With the increasingly busy air traffic, the functional requirements on the system are more and more, and the defects of the A/C mode single pulse technology cannot meet the requirements of new aviation communication.
A Distance measuring system (DME for short) can provide Distance information of each approaching airplane relative to a guide point, and the approaching, landing and sliding of each approaching airplane according to a required track in the full-automatic approaching and landing process are guaranteed. At present, a precision distance measurement System (DME/P) is an important component of a Microwave Landing System (MLS), and precision distance measurement airborne equipment cooperates with Microwave Landing airborne equipment to complete approach Landing of an aircraft, that is, when the aircraft uses the MLS to perform approach Landing, the DME/P is required to provide precision distance information at each stage of approach. In the DME system, ground equipment receives an inquiry signal sent by airborne equipment, and replies a response signal to the airborne equipment according to the inquiry signal to complete a ranging function.
The ATC system and the DME system are special, real-time and safe aviation major systems, and have high requirements on the performance of the systems, so that the quality guarantee of the systems has high requirements. With the continuous and high-speed development of the air transportation industry, the number of aerial airplanes is increased, the demand of equipment of an ATC system and a DME system is continuously increased, the airborne electronic equipment becomes more and more precise, the testing requirement on the airborne electronic equipment is higher and higher, and the accuracy of receiving circuits of the ATC system and the DME system is very important.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a receiving circuit and a method for an ATC (automatic train control) and DME (DME) testing system, which can acquire an offset compensation table of each receiving channel based on a calibration signal and calibrate the received signal during actual signal receiving, thereby effectively improving the accuracy of signal receiving.
The invention aims to realize the technical scheme that the receiving circuit for the ATC and DME test system comprises a calibration signal input interface, a digital signal processing module and a multi-channel signal receiving channel; each signal receiving channel is connected with a signal receiving port for receiving external signals; the calibration signal input port is connected with each signal receiving channel after passing through the gating switch and the channel selection switch;
each signal receiving channel comprises a selector switch, an amplitude control module and a filtering control module, wherein a first input end of the selector switch is connected with a signal input port of the channel, a second input end of the selector switch is connected with an output end of the channel selection switch, and an output end of the selector switch is connected with the digital signal processing module sequentially through the amplitude control module and the filtering control module;
the digital signal processing module is used for comparing the received signal with the input calibration signal when the calibration signal is input into each signal receiving channel to generate an offset compensation table of the signal receiving channel; and calibrating the received signals by using the offset compensation table in the process of receiving the signals by each signal receiving channel.
The gating switch comprises a first single-pole double-throw switch and a load resistor, and the moving end of the first single-pole double-throw switch is connected to the calibration signal input port as an input end; the first immobile end of the first single-pole double-throw switch is used as an output end and connected to the input end of the channel selection switch, and the second immobile end of the single-pole double-throw switch is grounded after passing through the load resistor.
The channel selection switch is a single-pole multi-throw switch, and the moving end of the single-pole multi-throw switch is used as an input end and is connected to the output end of the gating switch; the immobile end of the single-pole multi-throw switch is used as an output end, the immobile end of the single-pole multi-throw switch is the same in number and corresponds to the signal receiving channels one by one, and each immobile end of the single-pole multi-throw switch is connected with the corresponding signal receiving channel.
The diverter switch comprises a second single pole double throw switch; a first fixed end of the second single-pole double-throw switch is used as a first input end and connected to a signal input port of the channel; and a second fixed end of the second single-pole double-throw switch is used as a second input end and connected to the channel selection switch, and a movable end of the single-pole double-throw switch is used as an output end and connected with the amplitude control module.
The amplitude control module comprises a third single-pole double-throw switch, a fourth single-pole double-throw switch, a preamplifier and a first amplitude controller; the moving end of the third single-pole double-throw switch is connected to the output end of the selector switch, and the moving end of the fourth single-pole double-throw switch is connected to the input end of the first amplitude controller; the preamplifier is connected between the first fixed end of the third single-pole double-throw switch and the first fixed end of the fourth single-pole double-throw switch; the second immobile end of the third single-pole double-throw switch is directly connected with the second immobile end of the fourth single-pole double-throw switch; and the output end of the first amplitude controller is connected with the filtering control module.
The filtering control module comprises a second amplitude controller, an amplifier and a filter, wherein the input end of the second amplitude controller is connected with the output end of the first amplitude controller, and the output end of the second amplitude controller is connected with the digital signal processing module sequentially through the amplifier and the filter.
The digital signal processing module comprises an FPGA module and an ADC module, the ADC module comprises a plurality of paths of AD conversion units, the AD conversion units are the same as the paths of the signal receiving channels and are in one-to-one correspondence, and the output end of each path of the signal receiving channel is connected with the FPGA module through the corresponding AD conversion unit;
the FPGA module is used for comparing the received signal with the input calibration signal when the calibration signal is input into each signal receiving channel to generate an offset compensation table of the signal receiving channel; and calibrating the received signals by using the offset compensation table in the process of receiving the signals by each signal receiving channel.
A signal receiving method for an ATC and DME test system, comprising a calibration step S1 and a signal receiving step S2;
the calibration step S1 includes:
s101, controlling the gating switch to communicate the calibration signal input port with a channel selection switch;
s102, controlling a channel selection switch to be communicated with any one signal receiving channel, and simultaneously communicating a change-over switch of the signal receiving channel with the channel selection switch;
s103, a calibration signal input from a calibration signal input port is input into a signal receiving channel through a gating switch, a channel selection switch and a selector switch, amplitude control and filtering control are completed in the signal receiving channel, and then the obtained calibration signal is transmitted to a digital signal processing module;
s104, after the digital signal processing module carries out AD conversion on the received signal, comparing the obtained signal with a signal input by a calibration port to obtain an offset compensation table of a current signal receiving channel;
s105, switching the channel selection switch to each signal receiving channel in sequence, repeating the steps S102-S104 during each switching, and obtaining an offset compensation table of each signal receiving channel;
the signal receiving step S2 includes;
s201, controlling the gating switch to connect the signal input port with a load resistor, so that a calibration signal is not input into a signal receiving channel;
s202, controlling a change-over switch of each signal receiving channel to be switched to a signal receiving port, and receiving an externally input signal;
s203, after amplitude control and filtering control are carried out on the received signals by each signal receiving channel, the signals are transmitted to a digital signal processing module;
and S204, the digital signal processing module performs AD conversion on the signal from each signal receiving channel, and calibrates the signal based on an offset compensation table of each signal receiving channel.
The invention has the beneficial effects that: the invention can obtain the offset compensation table of each receiving channel based on the calibration signal, and calibrate the received signal when the actual signal is received, thereby effectively improving the accuracy of signal reception.
Drawings
FIG. 1 is a schematic block diagram of the system of the present invention;
FIG. 2 is a schematic diagram illustrating a specific principle of an embodiment of the present invention;
FIG. 3 is a flow chart of the method of the present invention.
Detailed Description
The technical solutions of the present invention are further described in detail below with reference to the accompanying drawings, but the scope of the present invention is not limited to the following.
As shown in fig. 1, a receiving circuit for an ATC and DME testing system includes a calibration signal input interface, a digital signal processing module and a multi-channel signal receiving channel; each signal receiving channel is connected with a signal receiving port for receiving external signals; the calibration signal input port is connected with each signal receiving channel after passing through the gating switch and the channel selection switch;
each signal receiving channel comprises a selector switch, an amplitude control module and a filtering control module, wherein a first input end of the selector switch is connected with a signal input port of the channel, a second input end of the selector switch is connected with an output end of the channel selection switch, and an output end of the selector switch is connected with the digital signal processing module sequentially through the amplitude control module and the filtering control module;
the digital signal processing module is used for comparing the received signal with the input calibration signal when the calibration signal is input into each signal receiving channel to generate an offset compensation table of the signal receiving channel; and calibrating the received signals by using the offset compensation table in the process of receiving the signals by each signal receiving channel.
As shown in fig. 2, a specific schematic diagram of a signal receiving channel, a gating switch and a channel selection switch is provided, in a specific embodiment, the gating switch includes a first single-pole double-throw switch and a load resistor, and a moving end of the first single-pole double-throw switch is connected as an input end to a calibration signal input port; the first immobile end of the first single-pole double-throw switch is used as an output end and connected to the input end of the channel selection switch, and the second immobile end of the single-pole double-throw switch is grounded after passing through the load resistor. When the single-pole double-throw switch is switched to connect the load resistor, no calibration signal is input;
the channel selection switch is a single-pole multi-throw switch, and the moving end of the single-pole multi-throw switch is used as an input end and is connected to the output end of the gating switch; the immobile end of the single-pole multi-throw switch is used as an output end, the immobile end of the single-pole multi-throw switch is the same in number and corresponds to the signal receiving channels one by one, and each immobile end of the single-pole multi-throw switch is connected with the corresponding signal receiving channel.
The diverter switch comprises a second single pole double throw switch; a first fixed end of the second single-pole double-throw switch is used as a first input end and connected to a signal input port of the channel; and a second fixed end of the second single-pole double-throw switch is used as a second input end and connected to the channel selection switch, and a movable end of the single-pole double-throw switch is used as an output end and connected with the amplitude control module.
The amplitude control module comprises a third single-pole double-throw switch, a fourth single-pole double-throw switch, a preamplifier and a first amplitude controller; the moving end of the third single-pole double-throw switch is connected to the output end of the selector switch, and the moving end of the fourth single-pole double-throw switch is connected to the input end of the first amplitude controller; the preamplifier is connected between the first fixed end of the third single-pole double-throw switch and the first fixed end of the fourth single-pole double-throw switch; the second immobile end of the third single-pole double-throw switch is directly connected with the second immobile end of the fourth single-pole double-throw switch; and the output end of the first amplitude controller is connected with the filtering control module.
The filtering control module comprises a second amplitude controller, an amplifier and a filter, wherein the input end of the second amplitude controller is connected with the output end of the first amplitude controller, and the output end of the second amplitude controller is connected with the digital signal processing module sequentially through the amplifier and the filter.
The digital signal processing module comprises an FPGA module and an ADC module, the ADC module comprises a plurality of paths of AD conversion units, the AD conversion units are the same as the paths of the signal receiving channels and are in one-to-one correspondence, and the output end of each path of the signal receiving channel is connected with the FPGA module through the corresponding AD conversion unit;
the FPGA module is used for comparing the received signal with the input calibration signal when the calibration signal is input into each signal receiving channel to generate an offset compensation table of the signal receiving channel; and calibrating the received signals by using the offset compensation table in the process of receiving the signals by each signal receiving channel.
As shown in fig. 3, a signal receiving method for an ATC and DME test system includes a calibration step S1 and a signal receiving step S2, and the calibration step S1 includes:
s101, controlling the gating switch to communicate the calibration signal input port with a channel selection switch;
s102, controlling a channel selection switch to be communicated with any one signal receiving channel, and simultaneously communicating a change-over switch of the signal receiving channel with the channel selection switch;
s103, a calibration signal input from a calibration signal input port is input into a signal receiving channel through a gating switch, a channel selection switch and a selector switch, amplitude control and filtering control are completed in the signal receiving channel, and then the obtained calibration signal is transmitted to a digital signal processing module;
s104, after the digital signal processing module carries out AD conversion on the received signal, comparing the obtained signal with a signal input by a calibration port to obtain an offset compensation table of a current signal receiving channel;
in the embodiment of the application, the manner for the digital signal processing module to obtain the calibration port input signal includes providing an a/D converter of the calibration input signal in the digital signal processing module, converting the signal input by the calibration port by using the a/D converter, transmitting the converted signal to the FPGA, and completing signal comparison and offset compensation table generation by the FPGA.
S105, switching the channel selection switch to each signal receiving channel in sequence, repeating the steps S102-S104 during each switching, and obtaining an offset compensation table of each signal receiving channel;
in the embodiment of the application, when the offset compensation table is generated for each signal receiving channel according to the steps S102 to S104, a test is performed when the third single-pole double-throw switch and the fourth single-pole double-throw switch are switched to the second stationary terminal to realize direct connection, so as to obtain the offset compensation table without passing through the preamplifier; switching the third single-pole double-throw switch and the fourth single-pole double-throw switch to the first fixed end, and performing a test again when the third single-pole double-throw switch and the fourth single-pole double-throw switch are connected through the preamplifier to obtain an offset compensation table passing through the preamplifier; when signal calibration is carried out subsequently, a corresponding offset compensation table is selected to calibrate the signal output by the signal receiving channel according to whether the signal passes through the preamplifier;
the signal receiving step S2 includes;
s201, controlling the gating switch to connect the signal input port with a load resistor, so that a calibration signal is not input into a signal receiving channel;
s202, controlling a change-over switch of each signal receiving channel to be switched to a signal receiving port, and receiving an externally input signal;
s203, after amplitude control and filtering control are carried out on the received signals by each signal receiving channel, the signals are transmitted to a digital signal processing module;
and S204, the digital signal processing module performs AD conversion on the signal from each signal receiving channel, and calibrates the signal based on an offset compensation table of each signal receiving channel.
It is to be understood that the above-described embodiments are illustrative only and not restrictive of the broad invention, and that various other modifications and changes in light thereof will be suggested to persons skilled in the art based upon the above teachings. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of the invention may be made without departing from the spirit or scope of the invention.
Claims (8)
1. A receive circuit for an ATC and DME test system, characterized by: the device comprises a calibration signal input interface, a digital signal processing module and a plurality of signal receiving channels; each signal receiving channel is connected with a signal receiving port for receiving external signals; the calibration signal input port is connected with each signal receiving channel after passing through the gating switch and the channel selection switch;
each signal receiving channel comprises a selector switch, an amplitude control module and a filtering control module, wherein a first input end of the selector switch is connected with a signal input port of the channel, a second input end of the selector switch is connected with an output end of the channel selection switch, and an output end of the selector switch is connected with the digital signal processing module sequentially through the amplitude control module and the filtering control module;
the digital signal processing module is used for comparing the received signal with the input calibration signal when the calibration signal is input into each signal receiving channel to generate an offset compensation table of the signal receiving channel; and calibrating the received signals by using the offset compensation table in the process of receiving the signals by each signal receiving channel.
2. The receive circuit for an ATC and DME test system of claim 1, wherein: the gating switch comprises a first single-pole double-throw switch and a load resistor, and the moving end of the first single-pole double-throw switch is connected to the calibration signal input port as an input end; the first immobile end of the first single-pole double-throw switch is used as an output end and connected to the input end of the channel selection switch, and the second immobile end of the single-pole double-throw switch is grounded after passing through the load resistor.
3. The receive circuit for an ATC and DME test system of claim 2, wherein: the channel selection switch is a single-pole multi-throw switch, and the moving end of the single-pole multi-throw switch is used as an input end and is connected to the output end of the gating switch; the immobile end of the single-pole multi-throw switch is used as an output end, the immobile end of the single-pole multi-throw switch is the same in number and corresponds to the signal receiving channels one by one, and each immobile end of the single-pole multi-throw switch is connected with the corresponding signal receiving channel.
4. The receive circuit for an ATC and DME test system of claim 1, wherein: the diverter switch comprises a second single pole double throw switch; a first fixed end of the second single-pole double-throw switch is used as a first input end and connected to a signal input port of the channel; and a second fixed end of the second single-pole double-throw switch is used as a second input end and connected to the channel selection switch, and a movable end of the single-pole double-throw switch is used as an output end and connected with the amplitude control module.
5. The receive circuit for an ATC and DME test system of claim 1, wherein: the amplitude control module comprises a third single-pole double-throw switch, a fourth single-pole double-throw switch, a preamplifier and a first amplitude controller; the moving end of the third single-pole double-throw switch is connected to the output end of the selector switch, and the moving end of the fourth single-pole double-throw switch is connected to the input end of the first amplitude controller; the preamplifier is connected between the first fixed end of the third single-pole double-throw switch and the first fixed end of the fourth single-pole double-throw switch; the second immobile end of the third single-pole double-throw switch is directly connected with the second immobile end of the fourth single-pole double-throw switch; and the output end of the first amplitude controller is connected with the filtering control module.
6. The receive circuit for an ATC and DME test system of claim 1, wherein: the filtering control module comprises a second amplitude controller, an amplifier and a filter, wherein the input end of the second amplitude controller is connected with the output end of the first amplitude controller, and the output end of the second amplitude controller is connected with the digital signal processing module sequentially through the amplifier and the filter.
7. The receive circuit for an ATC and DME test system of claim 1, wherein: the digital signal processing module comprises an FPGA module and an ADC module, the ADC module comprises a plurality of paths of AD conversion units, the AD conversion units are the same as the paths of the signal receiving channels and are in one-to-one correspondence, and the output end of each path of the signal receiving channel is connected with the FPGA module through the corresponding AD conversion unit;
the FPGA module is used for comparing the received signal with the input calibration signal when the calibration signal is input into each signal receiving channel to generate an offset compensation table of the signal receiving channel; and calibrating the received signals by using the offset compensation table in the process of receiving the signals by each signal receiving channel.
8. A signal receiving method for an ATC and DME test system, using the receiving circuit of any one of claims 1 to 7, characterized in that: comprises a calibration step S1 and a signal receiving step S2;
the calibration step S1 includes:
s101, controlling the gating switch to communicate the calibration signal input port with a channel selection switch;
s102, controlling a channel selection switch to be communicated with any one signal receiving channel, and simultaneously communicating a change-over switch of the signal receiving channel with the channel selection switch;
s103, a calibration signal input from a calibration signal input port is input into a signal receiving channel through a gating switch, a channel selection switch and a selector switch, amplitude control and filtering control are completed in the signal receiving channel, and then the obtained calibration signal is transmitted to a digital signal processing module;
s104, after the digital signal processing module carries out AD conversion on the received signal, comparing the obtained signal with a signal input by a calibration port to obtain an offset compensation table of a current signal receiving channel;
s105, switching the channel selection switch to each signal receiving channel in sequence, repeating the steps S102-S104 during each switching, and obtaining an offset compensation table of each signal receiving channel;
the signal receiving step S2 includes;
s201, controlling the gating switch to connect the signal input port with a load resistor, so that a calibration signal is not input into a signal receiving channel;
s202, controlling a change-over switch of each signal receiving channel to be switched to a signal receiving port, and receiving an externally input signal;
s203, after amplitude control and filtering control are carried out on the received signals by each signal receiving channel, the signals are transmitted to a digital signal processing module;
and S204, the digital signal processing module performs AD conversion on the signal from each signal receiving channel, and calibrates the signal based on an offset compensation table of each signal receiving channel.
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| CN202010505003.6A CN111614413B (en) | 2020-06-05 | 2020-06-05 | Receiving circuit and method for ATC (automatic train control) and DME (DME) test system |
| LU101873A LU101873B1 (en) | 2020-06-05 | 2020-06-22 | A receiving circuit and method for atc and dme test systems |
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| CA2774088A1 (en) * | 2011-04-14 | 2012-10-14 | Thales | Method for locating aircraft which is independent of any satellite navigation system |
| CN105162536A (en) * | 2015-08-21 | 2015-12-16 | 西安空间无线电技术研究所 | System and method for correcting on-orbit amplitude phase of phased-array antenna |
| US9577708B1 (en) * | 2014-10-21 | 2017-02-21 | Marvell International Ltd. | Systems and methods for a twisted pair transceiver with correlation detection |
| CN107994958A (en) * | 2017-11-27 | 2018-05-04 | 成都九洲迪飞科技有限责任公司 | A kind of the channel phase consistency debugging system and method for broadband detecting receiver |
| CN111025240A (en) * | 2019-12-31 | 2020-04-17 | 南京国立电子科技有限公司 | Multi-channel radar radio frequency signal digital receiving system |
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- 2020-06-22 LU LU101873A patent/LU101873B1/en active IP Right Grant
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| CA2774088A1 (en) * | 2011-04-14 | 2012-10-14 | Thales | Method for locating aircraft which is independent of any satellite navigation system |
| US9577708B1 (en) * | 2014-10-21 | 2017-02-21 | Marvell International Ltd. | Systems and methods for a twisted pair transceiver with correlation detection |
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| CN107994958A (en) * | 2017-11-27 | 2018-05-04 | 成都九洲迪飞科技有限责任公司 | A kind of the channel phase consistency debugging system and method for broadband detecting receiver |
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| CN111614413B (en) | 2022-08-23 |
| LU101873B1 (en) | 2021-08-03 |
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