CN111600817A - Serial hierarchical scheduling algorithm for factor graph iterative equalization - Google Patents

Serial hierarchical scheduling algorithm for factor graph iterative equalization Download PDF

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CN111600817A
CN111600817A CN201910126904.1A CN201910126904A CN111600817A CN 111600817 A CN111600817 A CN 111600817A CN 201910126904 A CN201910126904 A CN 201910126904A CN 111600817 A CN111600817 A CN 111600817A
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CN111600817B (en
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张建军
董悦
曹晓冬
范玉进
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Tianjin Optical Electrical Communication Technology Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006Arrangements for removing intersymbol interference
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148Structural properties of the code parity-check or generator matrix
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03891Spatial equalizers
    • H04L25/03898Spatial equalizers codebook-based design
    • H04L25/0391Spatial equalizers codebook-based design construction details of matrices
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006Arrangements for removing intersymbol interference
    • H04L2025/0335Arrangements for removing intersymbol interference characterised by the type of transmission
    • H04L2025/03356Baseband transmission
    • H04L2025/03363Multilevel
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006Arrangements for removing intersymbol interference
    • H04L2025/03592Adaptation methods
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Abstract

The invention provides a serial hierarchical scheduling algorithm for factor graph iterative equalization, which comprises the following processes: 1) processing the channel convolution matrix H to realize system serial scheduling; 2) initializing variable nodes siTo node E of the equalization functionkExternal information of
Figure DDA0001973917740000011
And transmitting the symbol skA posteriori probability information p(‑1)(sk|Y,H)=1;3)For i=0:L1+L2(ii) a 4) According to the formula
Figure DDA0001973917740000012
Updating external information in the i-th factor graph
Figure DDA0001973917740000013
5) According to the formula
Figure DDA0001973917740000014
Updating extrinsic information transferred to variable nodes by balance function nodes in the factor graph of the i-th layer
Figure DDA0001973917740000015
6) According to the formula
Figure DDA0001973917740000016
Updating posterior probability p of symbolic variable node(i)(sk| Y, H); 7) end For. Aiming at the problem of higher complexity of the iterative equalization algorithm, the invention schedules the belief propagation algorithm in the iterative equalization so as to improve the convergence speed of the iterative equalization algorithm and reduce the complexity of the iterative equalization algorithm, thereby improving the practicability of the factor graph iterative equalization algorithm.

Description

Serial hierarchical scheduling algorithm for factor graph iterative equalization
Technical Field
The invention relates to the field of wireless communication, in particular to a serial hierarchical scheduling algorithm with a factor graph iterative equalization function.
Background
In a communication system, the channel is often non-ideal and always generates channel distortion, wherein the most common distortion is inter-symbol interference (ISI). To eliminate or reduce the effects of ISI on a communication system, the signal may be pre-distorted at the transmitting end or equalized at the receiving end.
Intersymbol interference (ISI) in a communication system is caused by channel imperfections. There are three cases of channel imperfections: the first situation is that signals reach a receiving end through a plurality of paths and different delays due to reflection, scattering and the like in the transmission process to generate intersymbol interference; the second situation is that due to the non-ideal filtering characteristics of the limited bandwidth channel, such as the non-ideal group delay and non-ideal amplitude-frequency characteristics of the transponder in satellite communication, the waveform of the transmission channel is distorted, resulting in delay spread, which can be equivalent to multipath transmission when sampling decision, resulting in inter-symbol interference. The third situation is that a transmission filter and a reception filter are used in a communication system to limit signal bandwidth, and when a receiving end cannot accurately sample, intersymbol interference occurs.
Equalization algorithms can be divided into conventional equalization algorithms and iterative equalization algorithms. The iterative equalization algorithm can be divided into a Turbo equalization algorithm and a factor graph-based iterative equalization algorithm. The factor graph iterative equalization algorithm generally adopts flooding scheduling, namely all external information is updated
Figure BDA0001973917720000011
Later, the external information is updated
Figure BDA0001973917720000012
The scheduling has the same problem of low convergence speed as the traditional sum-product decoding algorithm of the LDPC code. In iterative equalization, due to the existence of a large number of short loops with the length of 4, the flooding scheduling can increase the correlation of external information, thereby causing error diffusion and affecting the performance of a receiver. Aiming at the problem of high complexity of an iterative equalization algorithm, the development of a factor graph iterative equalization serial hierarchical scheduling algorithm is an urgent problem to be solved.
Disclosure of Invention
The invention aims to solve the technical problems and provides a serial hierarchical scheduling algorithm for factor graph iterative equalization, which schedules a belief propagation algorithm in iterative equalization so as to improve the convergence speed of the iterative equalization algorithm and reduce the complexity of the iterative equalization algorithm, thereby improving the practicability of the factor graph iterative equalization algorithm.
In order to solve the technical problems, the invention adopts the technical scheme that:
a serial hierarchical scheduling algorithm for factor graph iterative equalization comprises the following processes:
1. processing the channel convolution matrix H to realize system serial scheduling;
2. initializing variable nodes siTo node E of the equalization functionkExternal information of
Figure BDA0001973917720000021
And transmitting the symbol skA posteriori probability information p(-1)(sk|Y,H)=1;
3、For i=0:L1+L2
4. According to the formula
Figure BDA0001973917720000022
Updating external information in the i-th factor graph
Figure BDA0001973917720000023
5. According to the formula
Figure BDA0001973917720000024
Updating extrinsic information transferred to variable nodes by balance function nodes in the factor graph of the i-th layer
Figure BDA0001973917720000025
6. According to the formula
Figure BDA0001973917720000026
Updating posterior probability p of symbolic variable node(i)(sk|Y,H);
7、End For。
The intersymbol interference system can be represented as a model of a transversal filter whose coefficients are represented by a vector h, the order of the transversal filter being the dimension (| h |) of the h-vector. Let | h | ═ L be assumed here1+L2+1, and
Figure BDA0001973917720000027
in a digital communication system, a transmitted symbol vector is defined as
Figure BDA0001973917720000028
NSIs the number of symbols; and define
Figure BDA0001973917720000031
Wherein the symbols
Figure BDA0001973917720000032
And
Figure BDA0001973917720000033
all zero symbols are assumed here. And the received symbol vector is defined as
Figure BDA0001973917720000034
The noise vector is defined as
Figure BDA0001973917720000035
The received vector Y can be expressed as:
Figure BDA0001973917720000036
in the above formula, H is N of the multipath channelS×(NS+L1+L2) A convolution matrix of size, defined as:
Figure BDA0001973917720000037
further, in step one, in order to implement serial scheduling, the channel convolution matrix H needs to be firstly subjected to row transformation, and then H is divided into L1+L2+1 submatrices such that no column weight in each submatrix is greater than 1.
When ISI channel impulse response is h ═ h-1,h0,h1]Then, 0,3 … k (L)1+L2+1) are extracted in equal rows to form a submatrix H0(ii) a Similarly, the i, i +3 … k (L)1+L2Extracting the rows +1 + i to form a submatrix Hi. In this manner, the channel convolution matrix H can be divided into L1+L2+1 submatrices Hi(0≤i<L1+L2+1),HiNumber of lines of (N)R=NS/(L1+L2+1), and HiThe column weight of (b) is not more than 1.
Since only the matrix is row transformed in the process of dividing the sub-matrix, the mapping relationship between the received symbols and the transmitted symbols is not changed. Submatrix HiThe corresponding received symbol vector (y (i)) is:
Figure BDA0001973917720000038
the noise vector (w (i)) is:
Figure BDA0001973917720000039
then y (i) can be expressed as:
y(i)=HiS+w(i)
the a posteriori probability of the transmitted symbol vector S can be calculated according to the above equation:
Figure BDA00019739177200000310
due to HiSo that s is not more than 1kWith only one symbol y of y (i)a(k,i)Correlation, the position a (k, i) of the symbol can be calculated by:
Figure BDA0001973917720000041
wherein
Figure BDA0001973917720000042
Indicating rounding down the variable x. The posterior probability can be written as:
Figure BDA0001973917720000043
wherein p (y)a(k,i)|sk,Hi) Can be further expressed as:
Figure BDA0001973917720000044
the posterior probability may be expressed by a factor. Wherein the equalization function node is p (y)a(k,i)|skH) the prior probability function node is p(s)j)。
Further, the posterior probability p (y)a(k,i)|sk,Hi) Is a graph in the original balanced factor graph, defined as a layer of the original factor graph. When all subgraphs are combined into one block, a complete factor graph is formed, which is called a hierarchical factorFIG. 2 (LFG, Layered Factor Graph). Each layer in the hierarchical factor graph contains all the symbol vector variables S, and in order to make the hierarchical factor graph structure clear, the symbol vectors S are copied into one copy in each layer.
Further, the serial scheduling algorithm is as follows:
based on the submatrix and the hierarchical factor graph model, the external information is updated hierarchically and serially, and the algorithm is called Serial Layered Scheduling (SLS).
According to the formula
Figure BDA0001973917720000045
And
Figure BDA0001973917720000046
a posteriori probability information of the symbol variable nodes can be obtained in each layer of the factor graph. Meanwhile, in order to improve the confidence coefficient transmission rate, when the next-layer factor graph carries out confidence coefficient transmission, the updated reliable information of the previous-layer factor graph is used in time to form serial scheduling. The factor graph of the previous layer provides prior information for the next layer, and the prior information can exchange information through the posterior probability of the symbol variable node. Therefore, when in serial scheduling, the posterior probability of the variable node needs to be updated, and the updated posterior probability of the previous layer is utilized.
According to the sum-product algorithm (SPA algorithm), in the ith factor graph, the a posteriori probabilities of the variable nodes can be updated by:
Figure BDA0001973917720000051
in the i-th factor graph, extrinsic information
Figure BDA0001973917720000052
Can be updated by:
Figure BDA0001973917720000053
therefore, timely transmission of the update confidence coefficient to the lower layer is realized.
Further, in BPSK modulation systems, log-likelihood ratio (LLR) forms of information are typically used to simplify the operation. The LLR of the extrinsic information in the equalization factor graph is defined as follows:
Figure BDA0001973917720000054
Figure BDA0001973917720000055
in the above formula
Figure BDA0001973917720000056
Can be obtained by its LLR form:
Figure BDA0001973917720000057
Figure BDA0001973917720000058
in practical systems, to simplify the operation, the pair formula is often used
Figure BDA0001973917720000059
The following simplification is made:
Figure BDA00019739177200000510
LLR form (L) of a posteriori probabilities of sign-variable nodes and bit-variable nodesA,j) Can also be defined as:
Figure BDA0001973917720000061
the equation for the posterior probability can be derived from the SPA algorithm:
Figure BDA0001973917720000062
the invention has the advantages and positive effects that: the invention realizes the serial layered scheduling algorithm by the factor graph balancing LP-FGE based on the likelihood probability, schedules the confidence coefficient transmission algorithm in the iterative balancing, improves the convergence speed of the iterative balancing algorithm, reduces the complexity of the iterative balancing algorithm, improves the error code performance and the convergence rate of a communication system, and simultaneously reduces the correlation between external information.
Drawings
FIG. 1 is a model of a baseband system for an undesired channel that produces intersymbol interference;
FIG. 2 is a factor graph model of an iterative receive system;
FIG. 3 is a graph of autocorrelation characteristics of the output extrinsic information of an iterative equalizer;
FIG. 4 is a graph of the average number of iterations required for different iterative equalization algorithms to converge in the Proakis-A channel;
FIG. 5 is a graph of the average number of iterations required for different iterative equalization algorithms to converge in the Proakis-C channel;
FIG. 6 is a graph of error performance in a Proakis-A channel for different iterative equalization algorithms;
FIG. 7 is a graph of error performance in a Proakis-C channel for different iterative equalization algorithms;
FIG. 8 is an example of the partitioning of a channel convolution matrix in a serial scheduling algorithm;
FIG. 9 is a posterior probability function p (y)a(k)|sk,Hi) Factor Graph (SFG) model of (a);
FIG. 10 is a hierarchical factor graph (LFG) model of iterative equalization;
fig. 11 is a flow chart of an iterative reception algorithm for a BPSK modulation system.
Detailed Description
The following detailed description of specific embodiments of the invention refers to the accompanying drawings.
Original symbol skThe set of constellation points is defined as Ω, and the number of constellation points is | Ω | ═ 2θThe number of the main components is one,theta is the modulation order and is generally an integer of 1 to 6. skAfter passing through ISI and AWGN channels, the channel reaches the receiving end and becomes yk. Equalizer at receiving end according to ykAnd carrying out iterative equalization processing, and sending the posterior probability soft information result to a demapping module.
The intersymbol interference system can be represented as a transversal filter model, as shown in fig. 1.
The coefficients of the transversal filter are represented by a vector h, the order of the transversal filter being the dimension (| h |) of the h vector. Let | h | ═ L be assumed here1+L2+1, and
Figure BDA0001973917720000071
in a digital communication system, a transmitted symbol vector is defined as
Figure BDA0001973917720000072
NSIs the number of symbols; and define
Figure BDA0001973917720000073
Wherein the symbols
Figure BDA0001973917720000074
And
Figure BDA0001973917720000075
all zero symbols are assumed here. And the received symbol vector is defined as
Figure BDA0001973917720000076
The noise vector is defined as
Figure BDA0001973917720000077
The received vector Y can be expressed as:
Figure BDA0001973917720000078
in the above formula, H is N of the multipath channelS×(NS+L1+L2) A convolution matrix of size defined as:
Figure BDA0001973917720000079
In higher order modulation systems, bit sequences
Figure BDA00019739177200000710
Component vector xkThey are transformed into symbols s by a mapping function (pi)kEach symbol skIs provided with 2θA constellation point
Figure BDA00019739177200000711
Defining a mapping function:
Figure BDA00019739177200000712
and a reflection ray function xk=π-1(sk) Wherein the reflection function for each bit is:
Figure BDA00019739177200000713
from the probability of the symbol, the probability of each bit can be calculated:
Figure BDA00019739177200000714
according to bit probability, symbol probability p(s)k) Can also be expressed as:
Figure BDA0001973917720000081
where (x) is equal to 1 only if x is 0, and the remainder are equal to 0.
According to the above formula, the prior probability function node can be further factored, and the factor function is (x)k-1(sk) ) and
Figure BDA0001973917720000082
and may define a mapping function fM(sk,xk):
fM(sk,xk)=(π-1(sk)-xk) (6)
Using in combination MkRepresenting the mapping function nodes in the factor graph.
Finally, the factor graph model of iterative reception can be obtained by integrating the factor graph equalization, the factor graph mapping and the LDPC code, as shown in FIG. 2. In fig. 2, it is assumed that the number of ISI channel paths is 3(| h | ═ 3), the constellation mapping method is QPSK, and the coding is an LDPC code. The function nodes in the factor graph of the iterative receive system include equalization function nodes (E)k) Symbol mapping function node (M)kAlso called symbol prior probability function node) and LDPC code check function (c)k) (ii) a The variable nodes include a symbol variable node and a bit variable node.
Mapping extrinsic information from function nodes to symbol nodes according to the SPA algorithm
Figure BDA0001973917720000083
Comprises the following steps:
Figure BDA0001973917720000084
mapping extrinsic information from function nodes to variable nodes
Figure BDA0001973917720000085
Comprises the following steps:
Figure BDA0001973917720000086
extrinsic information passed from symbolic node to mapping function node
Figure BDA0001973917720000087
Comprises the following steps:
Figure BDA0001973917720000088
extrinsic information passed by a bit node to a mapping function node
Figure BDA0001973917720000089
Provided by the LDPC decoder. In an LDPC decoder, the posterior probability of a bit variable node is updated every iteration
Figure BDA00019739177200000810
According to the SPA algorithm
Figure BDA00019739177200000811
And
Figure BDA00019739177200000812
satisfies the following formula:
Figure BDA00019739177200000813
then the foreign information
Figure BDA00019739177200000814
The update may be made by:
Figure BDA0001973917720000091
the main steps of the serial hierarchical scheduling for realizing the factor graph iterative equalization are as follows:
1. processing the channel convolution matrix H to realize system serial scheduling;
2. initializing variable nodes siTo node E of the equalization functionkExternal information of
Figure BDA0001973917720000092
And transmitting the symbol skA posteriori probability information p(-1)(sk|Y,H)=1;
3、For i=0:L1+L2
4. According to the formula
Figure BDA0001973917720000093
Updating external information in the i-th factor graph
Figure BDA0001973917720000094
5. According to the formula
Figure BDA0001973917720000095
Updating extrinsic information transferred to variable nodes by balance function nodes in the factor graph of the i-th layer
Figure BDA0001973917720000096
6. According to the formula
Figure BDA0001973917720000097
Updating posterior probability p of symbolic variable node(i)(sk|Y,H);
7、End For。
In order to verify the effectiveness of the hierarchical factor graph and the serial scheduling algorithm, the autocorrelation characteristic of the output extrinsic information of the iterative equalization is firstly researched. FIG. 3 shows the external information output by the conventional flooding scheduling algorithm PFS and the serial hierarchical scheduling algorithm SLS after two iterations
Figure BDA0001973917720000098
The autocorrelation characteristic of (a). It can be seen from fig. 3 that the extrinsic information of the serial scheduling algorithm has a smaller autocorrelation value at a nonzero position, that is, the influence of a ring with a length of 4 in the serial scheduling algorithm is small, and the influence of error diffusion is also small.
In order to verify the reliability of the serial scheduling algorithm, fig. 4 to 7 respectively compare the average iteration times and the error code performance of the iterative equalization algorithm under the Proakis-a and the Proakis-C channels. The ISI impulse response h of the Proakis-a channel is [ 0.04-0.050.07-0.21-0.50.720.360.000.210.030.07 ], and is also called a good channel because of its relatively flat spectral characteristics; the impulse response h of the Proakis-C channel is [0.227,0.460,0.688,0.460,0.227], which is also referred to as a bad channel because it has a null in the spectrum.
As can be seen from fig. 4 to 7, compared with the flooding scheduling, the error code performance and the convergence speed of the serial scheduling algorithm are greatly improved. Fig. 4 and 5 show that the convergence speed of the serial scheduling algorithm is twice that of the flooding scheduling algorithm, and the convergence speed approaches the ideal LMMSE equalization algorithm. Fig. 6 and 7 show that the performance of the serial scheduling algorithm in a good channel is close to that of the LMMSE equalization algorithm; in bad channels, the performance is much better than the LMMSE algorithm. In a good channel, the performance of serial scheduling is as much as 2dB better than that of a flooding scheduling algorithm, and in a bad channel, the performance of serial scheduling is as much as 9dB better than that of the flooding scheduling algorithm. The result shows that the serial scheduling can improve the convergence speed of the iterative equalization algorithm, improve the influence of short loops in the factor graph on the performance, and improve the performance of the factor graph equalizer, so that the factor graph equalizer has better practicability.
When BER is 1E-5 under the Proakis-C channel condition, the demodulation threshold value of the AP-FGE algorithm is 12.5dB, the demodulation threshold value of the LP-FGE algorithm is 22.5dB, and the demodulation threshold value of the LP-FGE algorithm adopting SLS is 14.5 dB. Namely, due to the SLS scheduling algorithm, the demodulation performance of the LP-FGE is improved by 8dB and is closer to the performance of the AP-FGE algorithm, and the difference of the demodulation threshold is only 2 dB.
The following is a detailed description of specific embodiments of the invention.
One, hierarchical factor graph
In order to realize serial scheduling, a channel convolution matrix H is firstly subjected to row transformation, and then H is divided into L1+L2+1 submatrices such that no column weight in each submatrix is greater than 1.
As shown in fig. 8, when the ISI channel impulse response is h ═ h-1,h0,h1]Then, 0,3 … k (L)1+L2+1) are extracted in equal rows to form a submatrix H0(ii) a Similarly, the i, i +3 … k (L)1+L2Extracting the rows +1 + i to form a submatrix Hi. In this manner, the channel convolution matrix H can be divided into L1+L2+1 submatrices Hi(0≤i<L1+L2+1),HiNumber of lines of (N)R=NS/(L1+L2+1), and HiThe column weight of (b) is not more than 1.
Since only the matrix is row transformed in the process of dividing the sub-matrix, the mapping relationship between the received symbols and the transmitted symbols is not changed. Submatrix HiThe corresponding received symbol vector (y (i)) is:
Figure BDA0001973917720000111
the noise vector (w (i)) is:
Figure BDA0001973917720000112
then y (i) can be expressed as:
y(i)=HiS+w(i)
the a posteriori probability of the transmitted symbol vector S can be calculated according to the above equation:
Figure BDA0001973917720000113
due to HiSo that s is not more than 1kWith only one symbol y of y (i)a(k,i)Correlation, the position a (k, i) of the symbol can be calculated by:
Figure BDA0001973917720000114
wherein
Figure BDA0001973917720000115
Indicating rounding down the variable x. The posterior probability can be written as:
Figure BDA0001973917720000116
wherein p (y)a(k,i)|sk,Hi) Can be further expressed as:
Figure BDA0001973917720000117
the posterior probability may be expressed by a factor. Wherein the equalization function node is p (y)a(k,i)|skH) the prior probability function node is p(s)j). With h ═ h-1,h0,h1]ISI channels, for example, p (S | y (i), Hi) The factor graph of (a) can be represented as fig. 9.
Posterior probability p (y)a(k,i)|sk,Hi) Is a graph in the original balanced factor graph, defined as a layer of the original factor graph. When all the subgraphs are combined into one block, a complete Factor Graph can be formed, and the Factor Graph is called a hierarchical Factor Graph (LFG). Each layer in the hierarchical factor graph contains all the symbol vector variables S, and in order to make the hierarchical factor graph structure clear, the symbol vectors S are copied into one in each layer, thereby forming a hierarchical structure as shown in fig. 10. The nodes at each level in the hierarchical factor graph may in turn be expanded into a sub-graph model as shown in FIG. 9.
Two, serial scheduling algorithm
Based on the submatrix and the hierarchical factor graph model, external information is updated hierarchically and serially, and the algorithm is called Serial Layered Scheduling (SLS).
According to the formula
Figure BDA0001973917720000121
And
Figure BDA0001973917720000122
a posteriori probability information of the symbol variable nodes can be obtained in each layer of the factor graph. Meanwhile, in order to improve the confidence coefficient transmission rate, when the next-layer factor graph carries out confidence coefficient transmission, the updated reliable information of the previous-layer factor graph is used in time to form serial scheduling. The factor graph of the previous layer provides prior information for the next layer, and the prior information can exchange information through the posterior probability of the symbol variable node. Therefore, when in serial scheduling, the posterior probability of the variable node needs to be updated, and the updated posterior probability of the previous layer is utilized.
According to the sum-product algorithm (SPA algorithm), in the ith factor graph, the a posteriori probabilities of the variable nodes can be updated by:
Figure BDA0001973917720000123
in the i-th factor graph, extrinsic information
Figure BDA0001973917720000124
Can be updated by:
Figure BDA0001973917720000125
therefore, timely transmission of the update confidence coefficient to the lower layer is realized.
Third, take BPSK modulation system as an example, explain the application of serial scheduling algorithm in iterative receiving system
In BPSK modulation systems, log-likelihood ratio (LLR) forms of information are typically used to simplify the operation. The LLR of the extrinsic information in the equalization factor graph is defined as follows:
Figure BDA0001973917720000126
Figure BDA0001973917720000131
in the above formula
Figure BDA0001973917720000132
Can be obtained by its LLR form:
Figure BDA0001973917720000133
Figure BDA0001973917720000134
in practical systems, to simplify the operation, the pair formula
Figure BDA0001973917720000135
The following simplification is made:
Figure BDA0001973917720000136
LLR form (L) of a posteriori probabilities of sign-variable nodes and bit-variable nodesA,j) Can also be defined as:
Figure BDA0001973917720000137
the equation for the posterior probability can be derived from the SPA algorithm:
Figure BDA0001973917720000138
the embodiments of the present invention have been described in detail, but the description is only for the preferred embodiments of the present invention and should not be construed as limiting the scope of the present invention. All equivalent changes and modifications made within the scope of the present invention should be covered by the present patent.

Claims (6)

1. A serial hierarchical scheduling algorithm for factor graph iterative equalization is characterized by comprising the following processes:
1) processing the channel convolution matrix H to realize system serial scheduling;
2) initializing variable nodes siTo node E of the equalization functionkExternal information of
Figure FDA0001973917710000011
And transmitting the symbol skA posteriori probability information p(-1)(sk|Y,H)=1;
3)For i=0:L1+L2
4) According to the formula
Figure FDA0001973917710000012
Updating external information in the i-th factor graph
Figure FDA0001973917710000013
5) According to the formula
Figure FDA0001973917710000014
Updating extrinsic information transferred to variable nodes by balance function nodes in the factor graph of the i-th layer
Figure FDA0001973917710000015
6) According to the formula
Figure FDA0001973917710000016
Updating posterior probability p of symbolic variable node(i)(sk|Y,H);
7)End For。
2. The serial hierarchical scheduling algorithm for factor graph iterative equalization according to claim 1, characterized in that: the intersymbol interference system is represented as a transverse filter model, the coefficient of the transverse filter is represented by a vector h, the order of the transverse filter is the dimension (| h |) of the h vector, and | h | ═ L is assumed1+L2+1, and
Figure FDA0001973917710000017
in a digital communication system, a transmitted symbol vector is defined as
Figure FDA0001973917710000018
NSIs the number of symbols; and define
Figure FDA0001973917710000019
Wherein the symbols
Figure FDA00019739177100000110
And
Figure FDA00019739177100000111
all zero symbols are assumed here, and the received symbol vector is defined as
Figure FDA00019739177100000112
The noise vector is defined as
Figure FDA00019739177100000113
The received vector Y can be expressed as:
Figure FDA00019739177100000114
in the above formula, H is N of the multipath channelS×(NS+L1+L2) A convolution matrix of size, defined as:
Figure FDA0001973917710000021
3. the serial hierarchical scheduling algorithm with iterative equalization of factor graphs according to claim 1 or 2, characterized in that: in order to realize serial scheduling, a channel convolution matrix H is firstly subjected to row transformation, and then H is divided into L1+L2+1 submatrices, such that the column weight of each column in each submatrix is no greater than 1;
when ISI channel impulse response is h ═ h-1,h0,h1]Then, 0,3 … k (L)1+L2+1) are extracted in equal rows to form a submatrix H0(ii) a The ith, i +3 … k (L)1+L2Extracting the rows +1 + i to form a submatrix Hi(ii) a In this manner, the channel convolution matrix H can be divided into L1+L2+1 submatrices Hi(0≤i<L1+L2+1),HiNumber of lines of (N)R=NS/(L1+L2+1), and HiThe column weight of (1) is not more than 1;
because only the matrix is subjected to row transformation in the process of dividing the submatrix, the mapping relation between the received symbols and the transmitted symbols is not changed, and the submatrix HiThe corresponding received symbol vector (y (i)) is:
Figure FDA0001973917710000022
the noise vector (w (i)) is:
Figure FDA0001973917710000023
then y (i) can be expressed as:
y(i)=HiS+w(i)
the a posteriori probability of the transmitted symbol vector S can be calculated according to the above equation:
Figure FDA0001973917710000024
due to HiIn a column weight of not more than 1, skWith only one symbol y of y (i)a(k,i)Correlation, the position a (k, i) of the symbol can be calculated by:
Figure FDA0001973917710000025
the posterior probability can be written as:
Figure FDA0001973917710000026
wherein p (y)a(k,i)|sk,Hi) Can be further expressed as:
Figure FDA0001973917710000031
the posterior probability can be expressed by a factor, where the equalization function node is p (y)a(k,i)|skH) the prior probability function node is p(s)j)。
4. The serial hierarchical scheduling algorithm with factor graph iterative equalization according to claim 3, characterized in that: posterior probability p (y)a(k,i)|sk,Hi) The factor graph of (1) is a graph in an original balanced factor graph, and is defined as a layer of the original factor graph, when all the graphs are combined into one block, a complete factor graph can be formed, the factor graph is called a hierarchical factor graph, each layer in the hierarchical factor graph contains all symbol vector variables S, and in order to make the structure of the hierarchical factor graph clear, a symbol vector S is copied in each layer.
5. The serial hierarchical scheduling algorithm with factor graph iterative equalization according to claim 1 or 2, characterized in that the serial scheduling algorithm is as follows:
according to the formula
Figure FDA0001973917710000032
And
Figure FDA0001973917710000033
the posterior probability information of the symbol variable node can be obtained in each layer of factor graph, in order to improve the propagation rate of confidence coefficient, the posterior probability of the variable node needs to be updated during serial scheduling, and the updated posterior probability of the previous layer is utilized;
according to the sum-product algorithm, in the ith layer factor graph, the posterior probability of the variable node can be updated by the following formula:
Figure FDA0001973917710000034
in the i-th factor graph, extrinsic information
Figure FDA0001973917710000035
Can be updated by:
Figure FDA0001973917710000036
therefore, timely transmission of the update confidence coefficient to the lower layer is realized.
6. The serial hierarchical scheduling algorithm for factor graph iterative equalization according to claim 1, characterized in that: in a BPSK modulation system, the log-likelihood ratio LLR form of the information is used to simplify the operation, and the LLR of the external information in the equalization factor graph is defined as follows:
Figure FDA0001973917710000041
Figure FDA0001973917710000042
in the above formula
Figure FDA0001973917710000043
Can be obtained by its LLR form:
Figure FDA0001973917710000044
Figure FDA0001973917710000045
in practical systems, to simplify the operation, the pair formula
Figure FDA0001973917710000046
The following simplification is made:
Figure FDA0001973917710000047
LLR form (L) of a posteriori probabilities of sign-variable nodes and bit-variable nodesA,j) Can also be defined as:
Figure FDA0001973917710000048
the equation for the posterior probability can be derived from the SPA algorithm:
Figure FDA0001973917710000049
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