CN111596192B - Measuring circuit and measuring method thereof - Google Patents
Measuring circuit and measuring method thereof Download PDFInfo
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- CN111596192B CN111596192B CN201910130235.5A CN201910130235A CN111596192B CN 111596192 B CN111596192 B CN 111596192B CN 201910130235 A CN201910130235 A CN 201910130235A CN 111596192 B CN111596192 B CN 111596192B
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- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
Abstract
The embodiment of the invention discloses a measuring circuit and a measuring method thereof, wherein the measuring circuit comprises: a loop oscillation circuit and a period measurement circuit coupled to the loop oscillation circuit; the loop oscillation circuit comprises an oscillation control circuit and a plurality of stages of oscillation unit circuits, wherein the input end of the first stage of oscillation unit circuit is coupled to the output end of the oscillation control circuit, the input end of the oscillation control circuit is coupled to the output end of the last stage of oscillation unit circuit, and the oscillation control circuit and the plurality of stages of oscillation unit circuits form a loop; the period measuring circuit is suitable for measuring the oscillation period of the loop oscillation circuit and obtaining the delay of the element to be measured according to the oscillation period of the loop oscillation circuit; the loop oscillation circuit is suitable for meeting the oscillation starting condition under the action of an oscillation control signal received by the control end of the oscillation control circuit and a data selection control signal received by the control end of the data selection circuit. The technical scheme in the implementation of the invention can improve the delay accuracy of the element to be measured obtained by measurement.
Description
Technical Field
The invention relates to the field of circuits, in particular to a measuring circuit and a measuring method thereof.
Background
In chip design, delay time is one of the most important electrical parameters for electronic devices. Due to the existence of electronic process variations, the delay times of electronic devices on a chip are different, and therefore, the delay times of the electronic devices need to be measured. Meanwhile, on a chip, there may be a difference in delay time between a plurality of electronic devices of the same type inside a fixed area, and it is also important to detect a deviation in delay time between electronic devices of the same type inside the fixed area.
In the prior art, in order to reduce the measurement difficulty of the delay of the device to be measured, a loop Oscillator (RO) is generally used to measure the delay of the device to be measured.
In the existing measuring circuit, the accuracy of measuring the delay of the device to be measured needs to be improved.
Disclosure of Invention
The technical problem solved by the embodiment of the invention is to improve the accuracy of the measurement circuit for measuring the delay of the device to be measured.
To solve the above technical problem, an embodiment of the present invention provides a measurement circuit, including: a loop oscillation circuit and a period measurement circuit coupled to the loop oscillation circuit; wherein: the loop oscillation circuit comprises an oscillation control circuit and a plurality of stages of oscillation unit circuits, wherein the input end of the first stage of oscillation unit circuit is coupled to the output end of the oscillation control circuit, the input end of the oscillation control circuit is coupled to the output end of the last stage of oscillation unit circuit, and the oscillation control circuit and the plurality of stages of oscillation unit circuits form a loop; the oscillation unit circuit comprises a first data selection circuit, an element to be tested and a second data selection circuit, wherein the circuit structure of the first data selection circuit and the circuit structure of the second data selection circuit are symmetrical based on the element to be tested, the first output end of the first data selection circuit is coupled to the first input end of the second data selection circuit, the second output end of the first data selection circuit is coupled to the input end of the element to be tested, the output end of the element to be tested is coupled to the second input end of the second data selection circuit, the first output end and the second output end of the second data selection circuit are coupled to the input end of the next-stage oscillation unit circuit, and the first data selection circuit and the second data selection circuit are suitable for controlling an oscillation signal to pass through or jump over the element to be tested under the action of a data selection control signal; the period measuring circuit is suitable for measuring the oscillation period of the loop oscillation circuit and obtaining the delay of the element to be measured according to the oscillation period of the loop oscillation circuit; the loop oscillation circuit is suitable for meeting the oscillation starting condition under the action of the oscillation control signal received by the control end of the oscillation control circuit and the data selection control signal received by the control end of the data selection circuit.
Optionally, the first data selection circuit includes a first data distributor, a second data distributor, a first data selector, and a second data selector, and the second data selection circuit includes a third data distributor, a fourth data distributor, a third data selector, and a fourth data selector; a first output terminal of the first data distributor is coupled to a second input terminal of the first data selector, and a second output terminal of the first data distributor is coupled to a first input terminal of the second data selector; a first output of the second data distributor is coupled to a second input of the second data selector; an output terminal of the first data selector serves as the first output terminal of the first data selection circuit; the output end of the second data selector is used as the second output end of the first data selection circuit; a second output terminal of the third data distributor is coupled to a first input terminal of the third data selector; a first output terminal of the fourth data distributor is coupled to the second input terminal of the third data selector, and a second output terminal of the fourth data distributor is coupled to the first input terminal of the fourth data selector; an input terminal of the third data selector serves as the first input terminal of the second data selection circuit; an input terminal of the fourth data selector serves as the second input terminal of the second data selection circuit.
Optionally, the oscillation unit circuit further includes a first inversion type circuit device, an input end of the first inversion type circuit device is coupled to the first output end of the second data selection circuit, and an output end of the first inversion type circuit device is coupled to an input end of the oscillation unit circuit at the subsequent stage.
Optionally, the method further includes: an output terminal of the decoder is connected to the control terminal of the data selection circuit, and is adapted to generate the control signal for controlling the data selection circuit based on the received selection signal.
Optionally, the device under test includes a second inversion-type circuit device.
Optionally, the multi-stage oscillating unit circuit includes an even number of the oscillating unit circuits, and the first data selection circuit and the second data selection circuit are adapted to control the oscillating signal to skip or pass through the even number of the inverting type circuit devices under the action of the data selection control signal.
Optionally, the method further includes: and the auxiliary oscillation starting circuit is connected in the loop oscillation circuit in series and is suitable for assisting a loop formed by connecting elements to be tested in series in an oscillation unit circuit in the loop oscillation circuit to meet the oscillation starting condition of the loop oscillation circuit.
Optionally, the auxiliary oscillator circuit includes a first auxiliary oscillator circuit and a second auxiliary oscillator sub-circuit; the first auxiliary oscillator sub-circuit includes: a third data selection circuit, a third inversion type circuit device; the second auxiliary oscillator sub-circuit includes: a fourth data selection circuit, a fourth inversion type circuit device; an input end of the third data selection circuit is coupled to an output end of the oscillation control circuit, a first output end of the third data selection circuit is coupled to an input end of the third inversion type circuit device, and an output end of the third inversion type circuit device and a second output end of the third data selection circuit are coupled to an input end of the oscillation unit circuit at the next stage; an output terminal of the fourth data selection circuit is coupled to an input terminal of the fourth inverting circuit device, and an output terminal of the fourth inverting circuit device is coupled to an input terminal of the oscillation control circuit; when the control signal of the control end of the third data selection circuit is a low level signal and the control signal of the control end of the fourth data selection circuit is a high level signal, the oscillation signal of the third data selection circuit is accessed to the next stage of the oscillation unit circuit through the third inversion type circuit device, and the oscillation signal of the fourth data selection circuit is accessed to the input end of the oscillation control circuit through the fourth inversion type circuit device.
The embodiment of the invention also provides a measuring method based on the measuring circuit, which comprises the following steps: controlling an oscillation signal of a loop oscillation circuit to pass or jump over an element to be tested, and enabling the loop oscillation circuit to meet a starting oscillation condition under the action of an oscillation control signal received by an oscillation control circuit; and measuring the oscillation period of the loop oscillation circuit, and obtaining the delay variation of the element to be measured according to the oscillation period of the loop oscillation circuit.
Optionally, the loop oscillation circuit includes an even number of oscillation unit circuits, the controlling of the oscillation signal of the loop oscillation circuit to pass through or jump over the element to be tested, and the enabling of the loop oscillation circuit to satisfy the oscillation starting condition under the action of the oscillation control signal received by the oscillation control circuit includes: and controlling the oscillation signal to skip the even number of elements to be tested of the oscillation unit circuit.
Optionally, the controlling the oscillation signal to skip an even number of elements to be tested of the oscillation unit circuit includes: controlling the oscillation signal to pass through the element to be tested of the ith-level oscillation unit circuit, the (i + 1) th-level oscillation unit circuit and the (i + 2) th-level oscillation unit circuit, wherein the oscillation period of the loop oscillation circuit is T0; controlling the oscillation signal to pass through the element to be tested of the ith-stage oscillation unit circuit, skipping over the i + 1-stage oscillation unit circuit and the element to be tested of the i + 2-stage oscillation unit circuit, wherein the oscillation period of the loop oscillation circuit is T1; controlling the oscillation signal to pass through the element to be tested of the (i + 1) th-level oscillation unit circuit, and skipping over the element to be tested of the (i + 2) th-level oscillation unit circuit and the ith-level oscillation unit circuit, wherein the oscillation period of the loop oscillation circuit is T2; controlling the oscillation signal to pass through the element to be tested of the (i + 2) th-level oscillation unit circuit, skipping over the i-level oscillation unit circuit and the element to be tested of the (i + 1) th-level oscillation unit circuit, wherein the oscillation period of the loop oscillation circuit is T3; wherein i is an integer greater than 0.
Optionally, the measuring the oscillation period of the loop oscillation circuit, and obtaining the delay variation of the to-be-measured element according to the oscillation period of the loop oscillation circuit includes: measuring the T0, T1, T2 and T3; calculating the delay variation of the element to be tested in the ith-stage oscillation unit circuit according to a formula (T0-T2-T3 + T1)/2; calculating the delay variation of the element to be tested in the (i + 1) th stage of the oscillating unit circuit according to a formula (T0-T1-T3 + T2)/2; and calculating the delay variation of the element to be tested in the i +2 th stage of the oscillating unit circuit according to a formula (T0-T1-T2 + T3)/2.
Compared with the prior art, the technical scheme of the embodiment of the invention has the following beneficial effects:
in the embodiment of the present invention, an oscillation control circuit and a multi-stage oscillation unit circuit are provided, where the oscillation unit circuit includes a first data selection circuit, a device to be tested, and a second data selection circuit, a circuit structure of the first data selection circuit and a circuit structure of the second data selection circuit are symmetric based on the device to be tested, so that a first output end of the first data selection circuit is coupled to a first input end of the second data selection circuit, a second output end of the first data selection circuit is coupled to an input end of the device to be tested, an output end of the device to be tested is coupled to a second input end of the second data selection circuit, a first output end and a second output end of the second data selection circuit are coupled to an input end of a next-stage oscillation unit circuit, and an oscillation period of the ring oscillation circuit is measured by the period measurement circuit, so as to obtain a delay of the device to be tested. Therefore, the circuit structures of the first data selection circuit and the second data selection circuit are symmetrical, so that the influence of the circuit structure of the first data selection circuit on circuit signals can be counteracted through the second data selection circuit, the accuracy of the oscillation period obtained by measuring the loop oscillation circuit formed by the first data selection unit, the element to be measured and the second data selection unit can be improved, and the delay accuracy of the element to be measured can be improved.
Furthermore, the output end of the data distributor is coupled with the input end of the data selector, and the output end of the data selector is coupled with the input end of the data distributor, so that the influence of the output end port of the data distributor or the data selector on the oscillation signal can be counteracted through the input end port of the data selector or the data distributor coupled with the output end port of the data distributor or the data selector, the influence of the circuit port on the oscillation signal can be reduced, the stability of the oscillation signal can be improved, the accuracy of the oscillation period obtained by detection can be improved, and the accuracy of the delay of the element to be measured obtained by measurement can be improved.
Furthermore, the oscillation period of even number of elements to be measured is skipped through multiple measurements, and the skipped delay of the elements to be measured is calculated based on the oscillation period of the multiple measurements, so that the delay of the elements to be measured can be accurately obtained, and the accuracy of the measured delay of the elements to be measured is improved.
Drawings
FIG. 1 is a schematic diagram of a measurement circuit according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of an oscillating unit circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of an oscillating unit circuit according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a measurement circuit according to an embodiment of the present invention;
FIG. 5 is a flow chart of a measurement method in an embodiment of the invention;
FIG. 6 is a flow chart of a method of measuring oscillation period in an embodiment of the present invention;
FIGS. 7-10 are schematic diagrams of the path of the oscillating signal through the circuit of the oscillating unit according to an embodiment of the present invention;
fig. 11 is a flowchart of a method for calculating a delay variation according to an embodiment of the present invention.
Detailed Description
As described in the background, the accuracy of the existing measurement of the delay of the dut is to be improved.
In the embodiment of the present invention, an oscillation control circuit and a multi-stage oscillation unit circuit are provided, where the oscillation unit circuit includes a first data selection circuit, a device to be tested, and a second data selection circuit, a circuit structure of the first data selection circuit and a circuit structure of the second data selection circuit are symmetric based on the device to be tested, so that a first output end of the first data selection circuit is coupled to a first input end of the second data selection circuit, a second output end of the first data selection circuit is coupled to an input end of the device to be tested, an output end of the device to be tested is coupled to a second input end of the second data selection circuit, a first output end and a second output end of the second data selection circuit are coupled to an input end of a next-stage oscillation unit circuit, and an oscillation period of the ring oscillation circuit is measured by the period measurement circuit, so as to obtain a delay of the device to be tested. Therefore, the circuit structures of the first data selection circuit and the second data selection circuit are symmetrical, so that the influence of the circuit structure of the first data selection circuit on the circuit signal can be counteracted through the second data selection circuit, the accuracy of the oscillation period obtained by measuring the loop oscillation circuit formed by the first data selection unit, the element to be measured and the second data selection unit can be improved, and the accuracy of the delay of the element to be measured obtained by measuring can be improved.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
Referring to the schematic structural diagram of the measurement circuit shown in fig. 1, in an embodiment of the present invention, the measurement circuit may include: a loop oscillator circuit 11 and a period measurement circuit 12 coupled to the loop oscillator circuit 11.
The loop oscillation circuit 11 may include an oscillation control circuit 111 and a plurality of stages of oscillation unit circuits 112, an input terminal of the first stage of oscillation unit circuit 112 is coupled to an output terminal of the oscillation control circuit 111, an input terminal of the oscillation control circuit 111 is coupled to an output terminal of the last stage of oscillation unit circuit 112, and the oscillation control circuit 111 and the plurality of stages of oscillation unit circuits 112 form a loop.
In an implementation manner, referring to fig. 1 and fig. 2 in combination, the oscillation unit circuit 112 may include a first data selection circuit 21, a device under test 22, and a second data selection circuit 23, where a circuit structure of the first data selection circuit 21 and a circuit structure of the second data selection circuit 23 are symmetric based on the device under test 22, a first output terminal of the first data selection circuit 21 is coupled to a first input terminal of the second data selection circuit 23, a second output terminal of the first data selection circuit 21 is coupled to an input terminal of the device under test 22, an output terminal of the device under test 22 is coupled to a second input terminal of the second data selection circuit 23, a first output terminal and a second output terminal of the second data selection circuit 23 are coupled to an input terminal of the oscillation unit circuit 112 at a subsequent stage, and the first data selection circuit 21 and the second data selection circuit 23 are adapted to control an oscillation signal to pass through or jump over the device under test 22 under the action of a data selection control signal.
It is understood by those skilled in the art that "first" and "second" are only used to distinguish different circuits and different circuit ports of different circuits, and are not meant to limit the circuit structure.
In a specific implementation, the circuit structure of the first data selection circuit 21 and the circuit structure of the second data selection circuit 23 may be symmetrical based on the device under test 22, that is, the structure on one side of the device under test 22 is in the connection direction from the device under test 22 to the far side, and the structure on the other side of the device under test 22 is in the same connection direction from the device under test 22 to the near side, and the connection manner, where "near" and "far" may be defined by the number of components spaced from the device under test 22. Therefore, circuit ports of the first data selection circuit 21 and the second data selection circuit 23 can be symmetrical, the influence of the circuit port of the first data selection circuit 21 on the oscillation signal can be counteracted through the circuit port of the second data selection circuit 23, the stability of the loop oscillation circuit 11 can be improved, and the accuracy of the oscillation period obtained through detection can be improved.
In a specific implementation, the period measuring circuit 12 is adapted to measure an oscillation period of the loop oscillating circuit 11, and obtain the delay of the device under test 22 according to the oscillation period of the loop oscillating circuit 11.
The loop oscillation circuit 11 is adapted to satisfy a start oscillation condition under the action of the oscillation control signal received by the control terminal of the oscillation control circuit 111 and the data selection control signal received by the control terminal of the data selection circuit.
The delay of the device under test 22 obtained based on the oscillation period of the loop oscillation circuit 11 may be referred to a measurement method described later, and will not be explained in detail here.
With continued reference to fig. 2, in another specific implementation of the present invention, the oscillating unit circuit 112 may further include a first inverting circuit device 24, an input terminal of the first inverting circuit device 24 is coupled to the first output terminal of the second data selecting circuit 23, and an output terminal of the first inverting circuit device 24 is coupled to an input terminal of the oscillating unit circuit 112 at a subsequent stage. The first inversion type circuit device 24 is adapted to invert the oscillation signal passing through the second data selection circuit 23 and input the oscillation unit circuit 112 at the subsequent stage.
In a specific implementation, the first inversion circuit device 24 may be an inverter, a nand gate, or the like, or may be a combinational circuit formed by logic gate devices and having an inverted logic relationship, which is not particularly limited, and only the inverter is taken as an example for explanation here.
With reference to fig. 2 and fig. 3, in a specific implementation of the present invention, the first data selection circuit 21 may include a first data distributor DEMUX1, a second data distributor DEMUX2, a first data selector MUX1, and a second data selector MUX2, and the second data selection circuit 23 may include a third data distributor DEMUX3, a fourth data distributor DEMUX4, a third data selector MUX3, and a fourth data selector MUX4.
In a specific implementation, the first data distributor DEMUX1, the second data distributor DEMUX2, the third data distributor DEMUX3, and the fourth data distributor DEMUX4 may be data distributors of the same type, and are adapted to select, under the action of a data selection control signal received by the control terminal S, an output terminal corresponding to the data selection control signal to output an oscillation signal input by an input terminal of the data distributor. For example, referring to fig. 3, taking the first data distributor DEMUX1 as an example, when the data selection control signal of the control terminal S is at a high level, the first data distributor DEMUX1 selects the oscillation signal input by the output input terminal of the second output terminal a, and when the data selection control signal of the control terminal S is at a low level, the first data distributor DEMUX1 selects the oscillation signal input by the output input terminal of the first output terminal B.
Similarly, the first data selector MUX1, the second data selector MUX2, the third data selector MUX3, and the fourth data selector MUX4 may be data selectors of the same type, and are adapted to use, under the action of a control end S data selection control signal, a signal input by an input end corresponding to the data selection control signal as an output signal of the data selector.
With continued reference to fig. 3, in an implementation, the first output B of the first data distributor DEMUX1 is coupled to the second input a of the first data selector MUX1, and the second output a of the first data distributor DEMUX1 is coupled to the first input B of the second data selector MUX 2; a first output B of the second data distributor DEMUX2 is coupled to a second input a of the second data selector MUX 2; an output terminal of the first data selector MUX1 serves as the first output terminal of the first data selection circuit 21; the output terminal of the second data selector MUX2 serves as the second output terminal of the first data selection circuit 21; a second output a of the third data distributor DEMUX3 is coupled to a first input B of the third data selector MUX 3; a first output terminal B of the fourth data distributor DEMUX4 is coupled to a second input terminal a of the third data selector MUX3, and a second output terminal a of the fourth data distributor DEMUX4 is coupled to a first input terminal B of the fourth data selector MUX 4; an input terminal of the third data selector MUX3 serves as the first input terminal of the second data selection circuit 23; an input of the fourth data selector MUX4 serves as the second input of the second data selection circuit 23.
The output end of the data distributor is coupled with the input end of the data selector, and the output end of the data selector is coupled with the input end of the data distributor, so that the influence of the output end port of the data distributor or the data selector on the oscillation signal can be counteracted through the input end port of the data selector or the data distributor coupled with the output end port of the data distributor or the data selector, the influence of the circuit port on the oscillation signal can be reduced, the stability of the oscillation signal can be improved, the accuracy of the oscillation period obtained by detection can be improved, and the accuracy of the delay of the element to be detected obtained by measurement can be improved.
With continued reference to fig. 3, in an implementation, the device under test 22 may include a second inverting circuit device. An output of the second data selector MUX2 is coupled to an input of the second inverting circuit device, and an output of the second inverting circuit device is coupled to an input of the fourth data distributor DEMUX 4.
In a specific implementation, the second inversion circuit device may be the same as the first inversion circuit device 24, and may be an inverter, a nand gate, or the like, or may be a combinational circuit with inverted logic relationship formed by logic gate devices, and the like, which is not limited thereto.
With continued reference to fig. 1 and fig. 2, in an implementation, the oscillation control circuit 111 may include a nand gate, an output of the nand gate is coupled to an input of the first stage of the oscillation unit circuit 112 (shown in fig. 1), one input of the nand gate is coupled to an output of the last stage of the oscillation unit circuit 112, and another input of the nand gate serves as a control terminal of the oscillation control circuit 111 and is adapted to control the loop oscillation circuit 111 to perform periodic oscillation based on a received high-level oscillation control signal.
In a specific implementation, the plurality of stages of the oscillating unit circuits 112 may include an even number of the oscillating unit circuits 112, and the first data selecting circuit 21 and the second data selecting circuit 23 are adapted to control the oscillating signal to skip or pass through the even number of the second inversion type circuit devices under the action of the data selecting control signal.
By arranging even number of oscillation unit circuits, under the action of the data selection control signal, the oscillation signal is controlled to skip or pass through even number of second reverse type circuit devices, so that the number of the reverse type circuit devices through which the oscillation signal passes in the loop oscillation circuit is odd number, the oscillation requirement of the loop oscillation circuit is met, and the loop oscillation circuit can perform periodic oscillation.
With continued reference to fig. 1, in a specific implementation of the present invention, the loop oscillating circuit 11 may further include: and the auxiliary oscillation starting circuit 113, the auxiliary oscillation starting circuit 113 is connected in series in the loop oscillation circuit 11, and is adapted to assist the loop formed by connecting the elements 22 to be tested in series in the oscillation unit circuit 112 in the loop oscillation circuit 11 to meet the oscillation starting condition of the loop oscillation circuit 11.
In a specific implementation, the auxiliary oscillator circuit 113 may include a first auxiliary oscillator circuit 1131 and a second auxiliary oscillator circuit 1132; the first auxiliary oscillator 1131 may include a third data selection circuit and a third inversion-type circuit device, and the second auxiliary oscillator 1142 may include a fourth data selection circuit and a fourth inversion-type circuit device; an input end of the third data selection circuit is coupled to an output end of the oscillation control circuit, a first output end of the third data selection circuit is coupled to an input end of the third inversion type circuit device, and an output end of the third inversion type circuit device and a second output end of the third data selection circuit are coupled to an input end of the oscillation unit circuit 112 at the next stage; an output terminal of the fourth data selection circuit is coupled to an input terminal of the fourth inverting circuit device, and an output terminal of the fourth inverting circuit device is coupled to an input terminal of the oscillation control circuit 111.
In a specific implementation, the data selection control signal received by the control terminal of the third data selection circuit is a low level signal, the data selection control signal received by the control terminal of the fourth data selection circuit is a high level signal, the oscillation signal passing through the third data selection circuit is connected to the subsequent stage of the oscillation unit circuit 112 through the third inversion type circuit device, and the oscillation signal passing through the fourth data selection circuit is connected to the input terminal of the oscillation control circuit 111 through the fourth inversion type circuit device, so that the loop can be assisted to meet the oscillation starting condition of the loop oscillation circuit 11.
In a specific implementation, the circuit structure of the third data selection circuit is consistent with the circuit structure of the second data selection circuit 23 (shown in fig. 3), and the circuit structure of the fourth data selection circuit is consistent with the circuit structure of the first data selection circuit (shown in fig. 3).
The circuit structure of the third data selection circuit is made to coincide with the circuit structure of the second data selection circuit, and the circuit structure of the fourth data selection circuit is made to coincide with the circuit structure of the first data selection circuit, so that the circuit structure of the first data selection circuit of the first stage oscillation unit circuit and the circuit structure of the third data selection circuit can be made to be symmetrical based on the third inversion type circuit device, and the circuit structure of the second data selection circuit of the last stage oscillation unit circuit and the circuit structure of the fourth data selection circuit can be made to be symmetrical based on the fourth inversion type circuit device, thereby further improving the symmetry of the formed loop oscillation circuit, and further improving the stability of the oscillation signal passing through the loop oscillation circuit.
In another specific implementation of the present invention, the measurement circuit may further include: a decoder, an output terminal of the decoder being coupled to the control terminal of the data selection circuit, adapted to generate the data selection control signal for controlling the data selection circuit based on the received selection signal.
In a specific implementation, an output terminal of the decoder may be coupled to control terminals of the plurality of data selectors and the data distributor of the data selection circuit, and a data selection control signal output by an output terminal of the decoder may control the plurality of data selectors and the data distributor. For example, taking the first data selection circuit 21 in fig. 3 as an example, an output end of a decoder is coupled to the plurality of data selectors of the first data selector 21 and the plurality of control ends S of the data distributor, and a data selection control signal output by the output end of the decoder may simultaneously control the first data distributor DEMUX1, the second data distributor DEMUX2, the first data selector MUX1, and the second data selector MUX2 that constitute the first data selection circuit 21, so as to select an input end or an output end corresponding to the data selection control signal.
In one embodiment, the oscillating unit circuit 112 (shown in fig. 2) may control the oscillating signal to pass through or skip the device under test 22 (shown in fig. 2) of the oscillating unit circuit 112 based on the data selection control signal output by the decoder. For example, continuing with fig. 3 as an example, an oscillation signal is input through the input end of the first data distributor DEMUX1, in order to control the oscillation signal to pass through the device under test 22, the data selection control signal output by the decoder is set to be a high level signal, the output end a of the first data distributor DEMUX1 is selected to output the oscillation signal, the input end a of the second data selector MUX2 is selected to be the input end of the second data selector MUX2, so that the oscillation signal is input from the input end of the first data distributor DEMUX1 and output from the output end of the second data selector MUX2, thereby controlling the oscillation signal to pass through the device under test 22; if the data selection control signal output by the decoder is set to be a low level signal, the oscillation signal can be controlled to skip the device under test 22.
It should be noted that "high level" in this document refers to a level range that can be recognized as a digital signal "1", and "low level" refers to a level range that can be recognized as a digital signal "0", which are relative concepts, and the specific level range is not particularly limited.
With continued reference to fig. 1, in a specific implementation, the period measurement circuit 12 may include a frequency divider adapted to divide the oscillation signal of the output of the loop oscillation circuit 11 to output a divided signal, and the period measurement circuit 12 calculates the measurement of the oscillation period of the loop oscillation circuit 11 from the divided signal and a division ratio of the frequency divider.
The frequency divider divides the frequency of the oscillation signal and outputs the frequency-divided signal, so that the measurement of the oscillation period of the loop oscillation circuit is facilitated, and the measurement convenience can be improved.
In a specific implementation, the period measurement circuit 12 may further include a buffer, an input of the buffer is coupled to the output of the loop oscillation circuit 11, and an output of the buffer is coupled to the input of the frequency divider, and is adapted to perform impedance matching and/or waveform shaping on the oscillation signal output by the output of the loop oscillation circuit 11. The buffer may include a single-stage inverter or a plurality of cascaded inverters, and may also have other circuit structures as long as impedance matching and/or waveform shaping and conditioning can be achieved, which is not limited herein.
By arranging the buffer, impedance matching and/or waveform shaping can be carried out on the oscillation signal output by the loop oscillation circuit, and the waveform state of the signal received by the frequency divider can be close to an ideal shape, so that the accuracy of the oscillation period obtained by measurement can be improved, and the accuracy of the delay of the element to be measured obtained by measurement can be improved.
Fig. 4 is a schematic diagram of a circuit structure of a measurement circuit in an embodiment of the present invention, and the following describes the technical solution of the present invention in detail with reference to fig. 4.
Referring to fig. 4, in a specific implementation, the measurement circuit may include a loop oscillation circuit 11 and a period measurement circuit 12, an input terminal of the period measurement circuit 12 being coupled to an output terminal of the loop oscillation circuit 11. When the loop oscillation circuit 11 satisfies the oscillation starting condition and performs periodic oscillation, the oscillation period of the loop oscillation circuit 11 may be measured by the period measurement circuit 12.
In a specific implementation, the period measurement circuit 12 may include a frequency divider 121 adapted to divide the oscillation signal of the output of the loop oscillation circuit 11 by frequency to output a divided signal, and the period measurement circuit 12 calculates the measurement of the oscillation period of the loop oscillation circuit 11 from the divided signal and the division ratio of the frequency divider.
Further, the period measurement circuit 12 may further include a buffer 122, an input of the buffer 122 is coupled to the output of the loop oscillation circuit 11, and an output of the buffer 122 is coupled to the input of the frequency divider 121, and is adapted to perform impedance matching and/or waveform shaping on the oscillation signal output from the output of the loop oscillation circuit 11.
In a specific implementation, the loop oscillating circuit 11 may include an oscillation control circuit 111 and K-stage oscillation unit circuits, an input terminal of the first-stage oscillation unit circuit is coupled to an output terminal of the oscillation control circuit 111, an input terminal of the oscillation control circuit 111 is coupled to an output terminal of the kth-stage oscillation unit circuit, and the oscillation control circuit 111 and the K-stage oscillation unit circuits form a loop.
In a specific implementation, the oscillation unit circuit may include a first data selection circuit, a device to be tested, a second data selection circuit, and a first inversion-type circuit device, where circuit structures of the first data selection circuit and the second data selection circuit and a connection relationship between the device to be tested and the first inversion-type circuit device are as described above and are not described herein again.
In a specific implementation, the oscillation control circuit 111 may include a nand gate, an output of the nand gate is coupled to an input of the first-stage oscillation unit circuit, one input of the nand gate is coupled to an output of the kth-stage oscillation unit circuit, and another input of the nand gate serves as a control terminal of the loop oscillation circuit 11. And when the control end inputs a high-level signal EN, controlling the loop oscillation circuit 11 to perform periodic oscillation.
In a specific implementation, the loop oscillation circuit 11 may further include an auxiliary oscillation starting circuit, and the auxiliary oscillation starting circuit may include a first auxiliary oscillation starting sub-circuit and a second auxiliary oscillation starting sub-circuit, where the first auxiliary oscillation starting sub-circuit and the second auxiliary oscillation starting sub-circuit are connected in series in the loop oscillation circuit 11, and are adapted to assist the loop formed by connecting in series the to-be-measured elements in the oscillation unit circuit in the loop oscillation circuit 11 to satisfy the oscillation starting condition of the loop oscillation circuit 11.
IN a specific implementation, the measurement circuit may further include a decoder 13, an output terminal of the decoder 13 is connected to a control terminal of a data selection circuit of the loop oscillation circuit 11, and is adapted to generate the data selection control signals S1 to Sn for controlling the data selection circuit based on a received selection signal IN.
By arranging the oscillation control circuit and the multistage oscillation unit circuit, the oscillation unit circuit comprises the first data selection circuit, the element to be measured and the second data selection circuit, the circuit structure of the first data selection circuit is symmetrical to that of the second data selection circuit, and the influence of the circuit structure of the first data selection circuit on the circuit signal can be counteracted through the circuit structure of the second data selection circuit, so that the accuracy of measuring the oscillation period obtained by the loop oscillation circuit formed by the first data selection unit, the element to be measured and the second data selection unit can be improved, and the accuracy of the delay of the element to be measured can be improved.
An embodiment of the present invention further provides a measurement method based on the foregoing measurement circuit, and referring to fig. 5, in a specific implementation, the measurement method may include:
s51, controlling an oscillation signal of a loop oscillation circuit to pass or jump over an element to be tested, and enabling the loop oscillation circuit to meet a starting oscillation condition under the action of the oscillation control signal received by the oscillation control circuit;
and S52, measuring the oscillation period of the oscillation circuit, and obtaining the delay variation of the element to be measured according to the oscillation period of the loop oscillation circuit.
In a specific implementation, the loop oscillation circuit may include an even number of the oscillation unit circuits, the oscillation control signal may be a high level signal, the step S51 of controlling the oscillation signal of the loop oscillation circuit to pass through or jump over the element to be tested, and the enabling of the loop oscillation circuit to satisfy the oscillation starting condition under the action of the oscillation control signal received by the oscillation control circuit may include: and controlling the oscillation signal to skip the elements to be tested of even number of the oscillation unit circuits.
In a specific implementation, the even number of devices under test skipped by the oscillation signal may be the devices under test of the adjacent even number of oscillation unit circuits, or the devices under test of the non-adjacent even number of oscillation unit circuits.
In a specific implementation, the oscillation control circuit may include a nand gate, the device under test may include an inverter circuit device, and a loop formed by the nand gate and an even number of the inverter circuit devices satisfies a start-up condition of the loop oscillation circuit, so that the loop oscillation circuit can oscillate stably.
Referring to fig. 6, in a specific implementation, the controlling the oscillation signal to skip an even number of the elements under test of the oscillation unit circuit may include:
step S61, controlling the oscillation signal to pass through the to-be-tested element of the i-th stage oscillation unit circuit, the i + 1-th stage oscillation unit circuit, and the i + 2-th stage oscillation unit circuit, where the oscillation period of the loop oscillation circuit is T0;
step S62, controlling the oscillation signal to pass through the to-be-tested element of the ith-stage oscillation unit circuit, and skipping over the to-be-tested element of the i + 1-stage oscillation unit circuit and the i + 2-stage oscillation unit circuit, where the oscillation period of the loop oscillation circuit is T1;
step S63, controlling the oscillation signal to pass through the to-be-tested element of the i +1 th stage oscillation unit circuit, skipping over the i +2 th stage oscillation unit circuit and the to-be-tested element of the i +2 th stage oscillation unit circuit, where the oscillation period of the loop oscillation circuit is T2;
step S64 of controlling the oscillation signal to pass through the to-be-tested element of the i +2 th stage oscillation unit circuit, skipping the i +1 th stage oscillation unit circuit and the to-be-tested element of the i +1 th stage oscillation unit circuit, where the oscillation period of the loop oscillation circuit is T3.
In the example of the measurement circuit shown in fig. 4, i may be any integer greater than 0 and less than or equal to k-4, such as 1, 2, 3, 4, 5.
In a specific implementation, the sequence of steps S61 to S64 is not limited, and any measurement sequence may be adopted.
Fig. 7 to 10 are schematic diagrams of paths of the oscillation signal through the oscillation unit circuit according to the embodiment of the present invention, and the paths of the oscillation signal through the oscillation unit circuit are different under the action of different data selection control signals. In a specific implementation, under the action of the data selection control signal, the circuit path through which the oscillation signal passes in step S61 refers to the circuit shown in a in fig. 7, the circuit path through which the oscillation signal passes in step S62 refers to the circuit shown in B in fig. 8, the circuit path through which the oscillation signal passes in step S63 refers to the circuit shown in C in fig. 9, and the circuit path through which the oscillation signal passes in step S64 refers to the circuit shown in D in fig. 10.
It should be noted that, in order to further improve the accuracy of the delay of the device under test, the level states of the data selection control signals received by the control terminals of the first data selection circuit and the second data selection circuit of the same oscillation unit circuit are opposite, for example, the data selection control signal received by the control terminal of the first data selection circuit is a high level signal, and the data selection control signal received by the control terminal of the second data selection circuit is a low level signal, so that the oscillation signal can be controlled to be symmetrical through the output port of the data selection circuit, and the stability of the oscillation signal can be further improved.
With reference to fig. 5 and fig. 11 in combination, in a specific implementation, the measuring the oscillation period of the loop oscillation circuit in step S52, and obtaining the delay variation of the device under test according to the oscillation period of the loop oscillation circuit may include:
step S111, measuring the T0, T1, T2 and T3;
step S112, calculating the delay variation of the element to be tested in the i-th stage of the oscillating unit circuit according to a formula (T0-T2-T3 + T1)/2;
step S113, calculating the delay variation of the element to be tested in the (i + 1) th stage of the oscillation unit circuit according to a formula (T0-T1-T3 + T2)/2;
step S114, calculating the delay variation of the element to be tested in the i +2 th stage of the oscillating unit circuit according to the formula (T0-T1-T2 + T3)/2.
In a specific implementation, the operation sequence of steps S112 to S114 is not limited at all, and may be in any calculation sequence.
The oscillation period of even number of elements to be measured is skipped through multiple measurements, and the skipped delay of the elements to be measured is calculated based on the measured oscillation period, so that the delay of the elements to be measured can be accurately obtained, and the accuracy of the measured delay of the elements to be measured can be improved.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (12)
1. A measurement circuit, comprising: a loop oscillation circuit and a period measurement circuit coupled to the loop oscillation circuit; wherein:
the loop oscillation circuit comprises an oscillation control circuit and a plurality of stages of oscillation unit circuits, wherein the input end of the first stage of oscillation unit circuit is coupled to the output end of the oscillation control circuit, the input end of the oscillation control circuit is coupled to the output end of the last stage of oscillation unit circuit, and the oscillation control circuit and the plurality of stages of oscillation unit circuits form a loop;
the oscillation unit circuit comprises a first data selection circuit, an element to be tested and a second data selection circuit, wherein the circuit structure of the first data selection circuit and the circuit structure of the second data selection circuit are symmetrical based on the element to be tested, so that the influence of a circuit port of the first data selection circuit on an oscillation signal is counteracted through a circuit port of the second data selection circuit, a first output end of the first data selection circuit is coupled to a first input end of the second data selection circuit, a second output end of the first data selection circuit is coupled to the input end of the element to be tested, an output end of the element to be tested is coupled to a second input end of the second data selection circuit, a first output end and a second output end of the second data selection circuit are coupled to the input end of the oscillation unit circuit at the next stage, and the first data selection circuit and the second data selection circuit are suitable for controlling the oscillation signal to pass through or jump over the element to be tested under the action of a data selection control signal;
the period measuring circuit is suitable for measuring the oscillation period of the loop oscillation circuit and obtaining the delay of the element to be measured according to the oscillation period of the loop oscillation circuit;
the loop oscillation circuit is suitable for meeting the oscillation starting condition under the action of the oscillation control signal received by the control end of the oscillation control circuit and the data selection control signal received by the control end of the data selection circuit.
2. The measurement circuit of claim 1, wherein the first data selection circuit comprises a first data distributor, a second data distributor, a first data selector, and a second data selector, and wherein the second data selection circuit comprises a third data distributor, a fourth data distributor, a third data selector, and a fourth data selector;
a first output terminal of the first data distributor is coupled to a second input terminal of the first data selector, and a second output terminal of the first data distributor is coupled to a first input terminal of the second data selector;
a first output of the second data distributor is coupled to a second input of the second data selector;
an output terminal of the first data selector serves as the first output terminal of the first data selection circuit;
the output end of the second data selector is used as the second output end of the first data selection circuit;
a second output of the third data distributor is coupled to a first input of the third data selector;
a first output terminal of the fourth data distributor is coupled to the second input terminal of the third data selector, and a second output terminal of the fourth data distributor is coupled to the first input terminal of the fourth data selector;
an input terminal of the third data selector serves as the first input terminal of the second data selection circuit;
an input terminal of the fourth data selector serves as the second input terminal of the second data selection circuit.
3. The measurement circuit of claim 1, wherein the oscillating unit circuit further comprises a first inverting circuit device, an input of the first inverting circuit device is coupled to the first output of the second data selecting circuit, and an output of the first inverting circuit device is coupled to an input of the oscillating unit circuit at a subsequent stage.
4. The measurement circuit of claim 1, further comprising: a decoder, an output terminal of the decoder being connected to a control terminal of the data selection circuit, adapted to generate the data selection control signal for controlling the data selection circuit based on a received selection signal.
5. The measurement circuit of claim 1, wherein the device under test comprises a second inverting circuit device.
6. The measurement circuit of claim 5, wherein the multi-stage oscillating cell circuit comprises an even number of said oscillating cell circuits, and wherein said first data selection circuit and said second data selection circuit are adapted to control said oscillating signal to skip or pass through said even number of said inverting circuit devices under the influence of a data selection control signal.
7. The measurement circuit of claim 1, wherein the loop oscillation circuit further comprises: the auxiliary oscillation starting circuit is connected in series in the loop oscillation circuit and is suitable for assisting the loop formed by connecting the elements to be tested in series in the oscillation unit circuit in the loop oscillation circuit to meet the oscillation starting condition of the loop oscillation circuit.
8. The measurement circuit according to claim 7, wherein the auxiliary oscillation starting circuit includes a first auxiliary oscillation starting sub-circuit and a second auxiliary oscillation starting sub-circuit;
the first auxiliary oscillator sub-circuit includes: a third data selection circuit, a third inversion type circuit device;
the second auxiliary oscillator sub-circuit includes: a fourth data selection circuit, a fourth inversion type circuit device;
an input end of the third data selection circuit is coupled to an output end of the oscillation control circuit, a first output end of the third data selection circuit is coupled to an input end of the third inversion type circuit device, and an output end of the third inversion type circuit device and a second output end of the third data selection circuit are coupled to an input end of the oscillation unit circuit at the next stage;
an output terminal of the fourth data selection circuit is coupled to an input terminal of the fourth inverting circuit device, and an output terminal of the fourth inverting circuit device is coupled to an input terminal of the oscillation control circuit;
the control end control signal of the third data selection circuit is a low level signal, the control end control signal of the fourth data selection circuit is a high level signal, the oscillation signal passing through the third data selection circuit is accessed to the next stage of the oscillation unit circuit through the third inversion type circuit device, and the oscillation signal passing through the fourth data selection circuit is accessed to the input end of the oscillation control circuit through the fourth inversion type circuit device.
9. A measurement method based on the measurement circuit according to any one of claims 1 to 8, comprising:
controlling an oscillation signal of a loop oscillation circuit to pass or jump over an element to be tested, and enabling the loop oscillation circuit to meet a starting oscillation condition under the action of an oscillation control signal received by an oscillation control circuit;
and measuring the oscillation period of the loop oscillation circuit, and obtaining the delay variation of the element to be measured according to the oscillation period of the loop oscillation circuit.
10. The method according to claim 9, wherein the loop oscillating circuit includes an even number of the oscillating unit circuits, the oscillation control signal is a high level signal, the control loop oscillating circuit passes or skips the device under test, and the enabling the loop oscillating circuit to satisfy the oscillation starting condition under the action of the oscillation control signal received by the oscillation control circuit comprises:
and controlling the oscillation signal to skip the even number of elements to be tested of the oscillation unit circuit.
11. The method of claim 10, wherein the controlling the oscillating signal to skip an even number of dut's of the oscillating cell circuit comprises:
controlling the oscillation signal to pass through the element to be tested of the ith-level oscillation unit circuit, the (i + 1) th-level oscillation unit circuit and the (i + 2) th-level oscillation unit circuit, wherein the oscillation period of the loop oscillation circuit is T0;
controlling the oscillation signal to pass through the element to be tested of the ith-level oscillation unit circuit, skipping over the (i + 1) th-level oscillation unit circuit and the element to be tested of the (i + 2) th-level oscillation unit circuit, wherein the oscillation period of the loop oscillation circuit is T1;
controlling the oscillation signal to pass through the element to be tested of the (i + 1) th-level oscillation unit circuit, and skipping over the element to be tested of the (i + 2) th-level oscillation unit circuit and the ith-level oscillation unit circuit, wherein the oscillation period of the loop oscillation circuit is T2;
controlling the oscillation signal to pass through the element to be tested of the (i + 2) th-level oscillation unit circuit, skipping over the i-level oscillation unit circuit and the element to be tested of the (i + 1) th-level oscillation unit circuit, wherein the oscillation period of the loop oscillation circuit is T3;
wherein i is an integer greater than 0.
12. The method according to claim 11, wherein the measuring an oscillation period of the loop oscillation circuit and obtaining the delay variation of the device under test according to the oscillation period of the loop oscillation circuit comprises:
measuring the T0, T1, T2 and T3;
calculating the delay variation of the element to be tested in the ith-stage oscillation unit circuit according to a formula (T0-T2-T3 + T1)/2;
calculating the delay variation of the element to be tested in the (i + 1) th stage of the oscillating unit circuit according to a formula (T0-T1-T3 + T2)/2;
and calculating the delay variation of the element to be tested in the (i + 2) th stage of the oscillating unit circuit according to a formula (T0-T1-T2 + T3)/2.
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| US5815043A (en) * | 1997-02-13 | 1998-09-29 | Apple Computer, Inc. | Frequency controlled ring oscillator having by passable stages |
| JP2007093476A (en) * | 2005-09-29 | 2007-04-12 | Toshiba Corp | Semiconductor integrated circuit |
| KR100675009B1 (en) * | 2006-02-01 | 2007-01-29 | 삼성전자주식회사 | Data delay control circuit and the method including the same |
| US8164966B2 (en) * | 2008-10-27 | 2012-04-24 | ASIC North | Variable-loop-path ring oscillator test circuit and systems and methods utilizing same |
| JP5579979B2 (en) * | 2008-10-30 | 2014-08-27 | ピーエスフォー ルクスコ エスエイアールエル | Semiconductor device, internal signal timing circuit, and delay time measuring method |
| US8224604B1 (en) * | 2009-08-11 | 2012-07-17 | Indian Institute Of Science | Gate delay measurement circuit and method of determining a delay of a logic gate |
| US10393796B2 (en) * | 2014-01-22 | 2019-08-27 | Carnegie Mellon University | Testing integrated circuits during split fabrication |
| CN107797046B (en) * | 2016-09-05 | 2020-03-17 | 扬智科技股份有限公司 | Integrated circuit and method for testing input/output interface of integrated circuit |
| CN108134594B (en) * | 2016-11-30 | 2021-05-04 | 中芯国际集成电路制造(上海)有限公司 | Delay measurement circuit and delay measurement method of device to be measured |
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