CN111579976A - Loop parameter calculation method and system for high-voltage capacitive direct test - Google Patents

Loop parameter calculation method and system for high-voltage capacitive direct test Download PDF

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CN111579976A
CN111579976A CN202010395088.7A CN202010395088A CN111579976A CN 111579976 A CN111579976 A CN 111579976A CN 202010395088 A CN202010395088 A CN 202010395088A CN 111579976 A CN111579976 A CN 111579976A
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voltage
test
loop
inrush
calculating
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CN111579976B (en
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张玲
洪深
陈勇
汪海波
郑占锋
胡冠
瞿哲奕
陈明亮
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State Grid Electric Power Research Institute Certification Technology Co ltd
NARI Group Corp
State Grid Electric Power Research Institute
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State Grid Electric Power Research Institute Certification Technology Co ltd
NARI Group Corp
State Grid Electric Power Research Institute
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/327—Testing of circuit interrupters, switches or circuit-breakers
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Abstract

The invention discloses a loop parameter calculation method and a loop parameter calculation system for a high-voltage capacitive direct test, wherein in the loop parameter calculation method for a single capacitor bank open-close test, a relation model of a fracture voltage per unit value and time of a tested breaker is established based on a test mode, and K values under different amplitude coefficients are calculated, so that frequency modulation branch parameters are calculated, envelope lines of initial parts of recovery voltages meet standard requirements, the calculation process and the calculation result are accurate, and manual adjustment is not needed; in the loop parameter calculation method for the back-to-back capacitor bank opening and closing test, the standard recovery voltage peak value, the inrush damping resistance, the standard inrush current peak value and the frequency are comprehensively considered, the calculation process and the calculation result are accurate, and manual adjustment is not needed.

Description

Loop parameter calculation method and system for high-voltage capacitive direct test
Technical Field
The invention relates to a loop parameter calculation method and a loop parameter calculation system for a high-voltage capacitive direct test, and belongs to the technical field of high-voltage tests.
Background
The capacitive current switching performance of an ac circuit breaker is one of its most important properties. The capacitive current switching test of the alternating current circuit breaker is researched from the seventies of the twentieth century in China, and the whole capacitive current switching test of the 550kV voltage class circuit breaker can be completed in a laboratory so far. And (3) selecting a direct or synthetic test method meeting the standard requirements by various laboratories at home and abroad according to respective test loop parameters and equipment performance.
Due to equipment limitation, each test station performs single-phase tests on the circuit breakers with the voltage class of 72.5kV and above. The single-phase capacitive current open-close test is preferably a direct test, namely voltage and current are provided by the same power supply. The capacitive opening and closing test can be divided into three test modes of an LC (line charging current opening and closing test), a CC (cable charging current opening and closing test) and a BC (capacitor bank current opening and closing test) according to the type of an opening load, however, a concentrated capacitor bank is mostly used in a test room to completely replace a line and a cable load, so that the test modes LC and CC can refer to the test mode BC when a test loop is selected and parameters are calculated. The single-phase capacitor bank open-close test (BC) includes an open-close test of a single capacitor bank or a back-to-back capacitor bank.
The circuit schematic diagram of the single capacitor bank open-close test is shown in fig. 1(a) and fig. 1 (b). After the tested breaker TB breaks the capacitive current, the recovery voltage borne by the two ends of the tested breaker TB should meet the requirements of (a) and (b) in the graph of fig. 3b) The requirements of (1). The loop parameter calculation method mainly lies in frequency modulation branch circuit (R)0-C0，R0、C0Resistance and capacitance, respectively, of the frequency-modulated branch) such that the initial portion of the expected recovery voltage remains from the origin to (t)1s,u1s) (see FIG. 3(b)) points below the line segment. The current calculation methods are all as follows: according to the test mode and the amplitude coefficient KafCalculating the actual initial recovery voltage envelope u1-t1And undamped oscillation envelope line Ls-C0(LsIs the equivalent inductance in the test loop) to obtain Ls-C0The oscillation frequency of (2). Due to LsIf known, C can be calculated0And R0The parameter (c) of (c). However, only K is given in the existing dataafThe parameter calculation still requires manual fine-tuning for a K value of 1.4.
The circuit schematic diagram of the back-to-back capacitor bank open-close test is shown in fig. 2(a) and fig. 2 (b). When the tested circuit breaker TB is switched on and off, the current flowing through the TB should meet the requirements that the frequency is close to 4250Hz and the peak value reaches 20kA, and after the capacitive current is switched off, the recovery voltage born by the two ends also meets the requirements of (a) and (b) of fig. 3. Because of the large capacitance of the inrush current branch, the initial part of the recovery voltage will automatically remain at the envelope u1s-t1sIn the following, the experimental loop parameter calculation method mainly lies in the inrush branch L1-C1(L1、C1Inductance and capacitance, respectively, of the inrush current branch) and the load branch Rd-L2-C2Accurate calculation of (2). The current method for calculating the inrush current branch is as follows: determining the load capacitance C by establishing a system of equations relating the inrush frequency, the switching current and the loop principle2Load branch inductance L2Inrush current branch inductor C1And surge branch circuit capacitor C1The parameter (c) of (c). But the standard recovery voltage peak value, the inrush damping resistance and the standard inrush peak value are not taken into comprehensive consideration and need to be adjusted manually.
Disclosure of Invention
The invention provides a loop parameter calculation method and a loop parameter calculation system for a high-voltage capacitive direct test, which solve the problems disclosed in the background technology.
In order to solve the technical problems, the technical scheme adopted by the invention is as follows:
a loop parameter calculation method for a high-voltage capacitive direct test comprises a loop parameter calculation method for a single capacitor bank switching test and a loop parameter calculation method for a back-to-back capacitor bank switching test;
the method for calculating the loop parameters of the opening and closing test of the single capacitor bank comprises the following specific steps:
responding to the on-off of the tested breaker, and constructing a relation model of the per unit voltage value and the time of the break of the tested breaker according to a test mode;
calculating the ratio K of the actual initial recovery voltage envelope curve to the undamped oscillation envelope curve according to the relation model, the straight line passing through the origin point tangent to the corresponding curve of the relation model and the horizontal line of the peak value of the overvoltage per unit value; wherein the voltage per unit value peak value is equal to the initial recovery voltage amplitude coefficient of the fracture of the tested breaker;
calculating the parameters of the open-close test loop of the single capacitor bank according to the K value;
the method for calculating the loop parameters of the back-to-back capacitor bank opening and closing test specifically comprises the following steps:
constructing a relation model of an inrush branch capacitor and a load branch capacitor according to the switching-off current, the standard recovery voltage peak value, the power frequency and the standard inrush frequency of the tested circuit breaker;
calculating the sum L of the initial inrush branch inductance and the load branch inductance according to the standard inrush frequency, the standard inrush peak value and the standard test voltage;
and calculating an inrush current branch capacitor, a load branch capacitor, a test loop equivalent power supply voltage, an inrush current damping resistor and an actual inrush current peak value according to the relation module and the L, adjusting the L according to a preset step length in response to that the actual inrush current peak value is not within a preset range, and repeating the step until the actual inrush current peak value is within the preset range to obtain back-to-back capacitor bank open-close test loop parameters.
The relation model of the fracture voltage per unit value of the tested breaker and the time is as follows,
Figure BDA0002487232080000031
Figure BDA0002487232080000032
Figure BDA0002487232080000033
Figure BDA0002487232080000034
Figure BDA0002487232080000035
wherein, ω is0For undamped angular frequency, ω for damped angular frequency, β for a variable defined in the calculation process, u1_d(t) is the per unit value of the fracture voltage of the tested breaker, t is time, R0、C0Respectively the resistance and capacitance in the frequency-modulated branch, LsIn order to test the equivalent inductance of the loop after the equivalence,
Figure BDA0002487232080000041
Figure BDA0002487232080000042
wherein, KTFor increasing the voltage to the ratio of the high-voltage side to the low-voltage side, LL、LHFor testing equivalent pre-boost of the loop to low-voltage side loop inductance and high-voltage side loop inductance, UgIs the power supply voltage, f is the power frequency, KcTo a capacitive coefficient, UrRated voltage for the circuit breaker under test, IcFor breaking the current of the circuit breaker under test, ktypeIn a test mode.
Calculating the ratio K of the actual initial recovery voltage envelope curve to the undamped oscillation envelope curve according to the relation model, the straight line passing through the origin point tangent to the corresponding curve of the relation model and the horizontal line of the peak value of the overvoltage per unit value,
according to the relation model, calculating the time t when the voltage per unit value reaches the peak valued_p；
Calculating td_pRatio K to undamped oscillation half period timeP1；
Acquiring tangent point coordinates of a corresponding curve of the relation model and a straight line passing through the origin;
acquiring intersection point coordinates of the straight line passing through the origin point and the peak horizontal line of the overvoltage per unit value according to the intersection point coordinates;
calculating the corresponding time and t of the intersection point coordinated_pRatio K ofP2；
According to KP1、KP2And calculating the ratio K of the actual initial recovery voltage envelope line to the undamped oscillation envelope line.
The test loop parameters comprise resistance and capacitance in the frequency modulation branch circuit, the calculation formula is as follows,
Figure BDA0002487232080000051
Figure BDA0002487232080000052
wherein L issFor testing equivalent inductance, R, after loop equivalence0、C0Respectively the resistance and capacitance in the frequency-modulated branch
Figure BDA0002487232080000053
Omega is the angular frequency with damping,
Figure BDA0002487232080000054
for variables defined in the calculation process, t1The time corresponding to the envelope voltage value of the initial portion of the actual recovery voltage.
The relation model formula of the inrush branch circuit capacitance and the load branch circuit capacitance is as follows,
Figure BDA0002487232080000055
Figure BDA0002487232080000056
wherein, C2、C1Respectively a load branch circuit capacitor and an inrush current branch circuit capacitor, f is a power frequency, LsFor testing the equivalent inductance u after the loop is equivalentcsTo standard restore the voltage peak, IcFor the breaking current of the circuit breaker under test, fdsIs the standard inrush frequency.
The test loop parameters include the parameters of the test loop,
adjust to the last L;
introducing the adjusted final L into a relation model to obtain an inrush current branch capacitance and a load branch capacitance;
substituting the inrush branch capacitance and the load branch capacitance into an equivalent power supply calculation formula to obtain the equivalent power supply voltage of the test loop;
and introducing the adjusted L, the inrush branch capacitance and the load branch capacitance into an inrush damping calculation formula to obtain an inrush damping resistance.
An equivalent power supply calculation formula is obtained,
Us＝UA-UA·2πf·(C1+C2)·2πf·Ls
wherein, UsFor testing the equivalent supply voltage of the loop, C2、C1Respectively a load branch circuit capacitor and an inrush current branch circuit capacitor, f is a power frequency, LsFor testing equivalent inductance, U, after loop equivalenceAThe voltage of an inrush current branch circuit when the tested breaker is closed;
the inrush current damping calculation formula is as follows,
Figure BDA0002487232080000061
wherein R isdFor surge damping resistance, KdIs a standard resistorDamping coefficient, parameter
Figure BDA0002487232080000062
A loop parameter calculation system for a high-voltage capacitive direct test comprises a loop parameter calculation system for a single capacitor bank opening and closing test and a loop parameter calculation system for a back-to-back capacitor bank opening and closing test;
the loop parameter calculation system for the opening and closing test of the single capacitor bank comprises,
a first relational model building module: responding to the on-off of the tested breaker, and constructing a relation model of the per unit voltage value and the time of the break of the tested breaker according to a test mode;
a K acquisition module: calculating the ratio K of the actual initial recovery voltage envelope curve to the undamped oscillation envelope curve according to the relation model, the straight line passing through the origin point tangent to the corresponding curve of the relation model and the horizontal line of the peak value of the overvoltage per unit value; wherein the voltage per unit value peak value is equal to the initial recovery voltage amplitude coefficient of the fracture of the tested breaker;
a test loop parameter acquisition module: and calculating the parameters of the open-close test loop of the single capacitor bank according to the K value.
The loop parameter calculation system for the back-to-back capacitor bank open-close test comprises,
a second relationship module construction module: constructing a relation model of an inrush branch capacitor and a load branch capacitor according to the switching-off current, the standard recovery voltage peak value, the power frequency and the standard inrush frequency of the tested circuit breaker;
an initial L acquisition module: calculating the sum L of the initial inrush branch inductance and the load branch inductance according to the standard inrush frequency, the standard inrush peak value and the standard test voltage;
an adjustment calculation module: and calculating an inrush current branch capacitor, a load branch capacitor, a test loop equivalent power supply voltage, an inrush current damping resistor and an actual inrush current peak value according to the relation module and the L, adjusting the L according to a preset step length in response to that the actual inrush current peak value is not within a preset range, and repeating the step until the actual inrush current peak value is within the preset range to obtain back-to-back capacitor bank open-close test loop parameters.
A computer readable storage medium storing one or more programs, the one or more programs comprising instructions, which when executed by a computing device, cause the computing device to perform a loop parameter calculation method of a high voltage capacitive direct test.
A computing device comprising one or more processors, memory, and one or more programs stored in the memory and configured to be executed by the one or more processors, the one or more programs comprising instructions for performing a loop parameter calculation method of a high voltage capacitive direct test.
The invention achieves the following beneficial effects: in the loop parameter calculation method for the single capacitor bank switching test, a relation model of a fracture voltage per unit value and time of the tested circuit breaker is established based on a test mode, and K values under different amplitude coefficients are calculated, so that frequency modulation branch parameters are calculated, envelope lines of initial parts of recovery voltages meet standard requirements, the calculation process and the calculation result are accurate, and manual adjustment is not needed; in the loop parameter calculation method for the back-to-back capacitor bank opening and closing test, the standard recovery voltage peak value, the inrush current damping resistance and the standard inrush current peak value are comprehensively considered, the calculation process and the calculation result are accurate, and manual adjustment is not needed.
Drawings
FIG. 1(a) is a circuit diagram of a single capacitor bank open-close test loop before equivalence;
FIG. 1(b) is a circuit diagram after the equivalent of the open-close test loop of a single capacitor bank;
FIG. 2(a) is a circuit diagram of a back-to-back capacitor bank before the equivalent of a switching test loop;
FIG. 2(b) is a circuit diagram of the back-to-back capacitor bank after the open-close test loop is equivalent;
FIG. 3(a) is a graph of the standard against ucs、t2s、u1s、t1sDefinition of (1) and u satisfying the conditioncAnd t2The definition of (1);
FIG. 3(b) is an enlargement of the block portion of the initial portion of FIG. 3(a), for referenceThe requirement of aligning the initial recovery voltage of the fracture of the tested breaker is that the initial recovery voltage of the fracture of the tested breaker must be kept from the origin to (t)1s,u1s) Below the line segment composed of points;
FIG. 4(a) is K in the calculation method of the loop parameters in the switching test of a single capacitor bankP1Calculating;
FIG. 4(b) is a diagram of K in the calculation method of the loop parameters in the switching test of a single capacitor bankP2Calculating;
FIG. 5 is a flow chart of a method for calculating loop parameters for a single capacitor bank open/close test;
FIG. 6 is a flow chart of a loop parameter calculation method for a back-to-back capacitor bank open/close test;
FIG. 7 is an example of a simulation calculation of a single capacitor bank opening and closing test;
fig. 8 is an example of the back-to-back capacitor bank opening and closing test calculation.
Detailed Description
The invention is further described below with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present invention is not limited thereby.
A loop parameter calculation method for a high-voltage capacitive direct test comprises a loop parameter calculation method for a single capacitor bank opening and closing test and a loop parameter calculation method for a back-to-back capacitor bank opening and closing test.
As shown in fig. 5, the method for calculating the loop parameters of the switching test of a single capacitor bank specifically includes the following steps:
step 1, responding to the on-off of the tested breaker, and constructing a relation model of the voltage per unit value of the break of the tested breaker and time according to a test mode.
The specific process of constructing the relationship model is as follows:
according to rated voltage U of Tested Breaker (TB)rOn/off current IcCalculation coefficient k corresponding to test modetypeAnd the initial recovery voltage amplitude coefficient K of the fracture of the tested circuit breakerafCalculating standard recovery voltage envelope parameters:
ucsfor standard recovery voltage peak:
Figure BDA0002487232080000091
t2stime corresponding to the standard recovery voltage peak:
t2snot only 8.7ms (50Hz) or 7.3ms (60Hz)
u1sFor the standard recovery voltage start part envelope voltage value:
Figure BDA0002487232080000092
t1sthe time corresponding to the envelope voltage value of the initial part of the standard recovery voltage is as follows:
t1s＝constant
wherein, KcIs a coefficient of capacitance, t1sIs constant according to UrThe test mode is BC1 (test mode 1 for BC, current I is cut off)c10-40% of rated breaking current) ktypeThe test method is BC2 (test method 2 for BC, open current I) 1.98c100% or more of rated breaking current) ktype＝1.95。
ucsAnd a supply voltage UgThe following formula should be satisfied:
Figure BDA0002487232080000093
wherein, KTFor step-up to T high-side to low-side ratio, LL、LHThe equivalent front boosting of a test loop is changed into a low-voltage side loop inductor and a high-voltage side loop inductor, and f is the frequency of a power frequency power supply.
KTAnd UgDetermined by the test station equipment parameters, at UgWithin an adjustable range of KTAs small as possible, the comprehensive consideration can result in KTAnd UgThen the equivalent power supply voltage U after the equivalent of the test loop can be calculatedsEquivalent inductance LsLoad electricityContainer C2：
Us＝Ug·KT
Figure BDA0002487232080000094
Figure BDA0002487232080000101
Where ω is the damped angular frequency.
Calculating the parameters of the actual initial voltage envelope curve as follows:
Figure BDA0002487232080000102
Figure BDA0002487232080000103
wherein u is1For the actual recovery voltage starting part envelope voltage value, t1The time corresponding to the envelope voltage value of the initial portion of the actual recovery voltage.
After TB is switched off, the initial part of the voltage at both ends of TB is recovered from LsAnd its two-terminal voltage drop and frequency modulation branch (R)0-C0) And (3) parameter determination, namely deducing a relation model between the per unit voltage value of the fracture of the tested breaker and time:
Figure BDA0002487232080000104
wherein the content of the first and second substances,
Figure BDA0002487232080000105
ω0for undamped angular frequency, ω for damped angular frequency, β for a variable defined in the calculation process, u1_d(t) is the per unit value of the fracture voltage of the tested breaker, t is time, R0、C0Respectively a resistor and a capacitor in the frequency modulation branch.
Step 2, calculating per unit according to the relation modelTime t at which value reaches peakd_p。
When ω td_pWhen 2 β, u1_d＝KafIt can be derived that:
Figure BDA0002487232080000106
wherein, td_pIs the time per unit to peak.
Using zeroin numerical algorithm in
Figure BDA0002487232080000107
In-range finding
Figure BDA0002487232080000108
To solve for m, i.e.
Figure BDA0002487232080000111
β＝tan-1(m) then
Figure BDA0002487232080000112
Step 3, calculating td_pRatio K to undamped oscillation half period timeP1。
Due to the fact that
Figure BDA0002487232080000113
According to td_pThe first part of K can be obtained, i.e.
Figure BDA0002487232080000114
Wherein, t0_pHalf-cycle time, parameter, for undamped oscillation
Figure BDA0002487232080000115
Omega is the angular frequency with damping,
Figure BDA0002487232080000116
are variables defined in the calculation process.
And 4, acquiring the coordinates of the tangent point of the corresponding curve of the relation model and the straight line passing through the origin.
Lines 1, lines 1 and u are defined as straight lines passing through the origin1_dAt time ttTangent, listing the equation gives:
Figure BDA0002487232080000117
m is obtained by calculation
Figure BDA0002487232080000118
Substituting the formula and making theta be omega.ttThe following can be obtained:
Figure BDA0002487232080000119
t is found by solving the numerical solution n of theta in the range of theta ∈ (0, pi) by using a zeroin numerical algorithm, namely, the theta is equal to ntN/ω, when the corresponding voltage per unit:
Figure BDA00024872320800001110
and 5, acquiring the intersection point coordinates of the straight line passing through the origin point and the per unit value peak horizontal line according to the tangent point coordinates.
Peak per unit value equal to KafSpecifically, as shown in fig. 4, the intersection time of the straight line passing through the origin and the horizontal line passing through the per unit value peak is
Figure BDA0002487232080000121
I.e. the coordinates of the intersection point is (t)c,Kaf)。
Step 6, calculating the corresponding time of the intersection point coordinates and td_pTo obtain a second part of K, denoted as KP2。
Figure BDA0002487232080000122
Wherein, tc、u1_d_tRespectively corresponding time and tangent point coordinates to the intersection point coordinateCorresponding to the voltage per unit value.
Step 7, according to KP1、KP2Calculating the ratio K of the actual initial recovery voltage envelope to the undamped oscillation envelope, wherein K is KP1·KP2。
And 8, calculating the test loop parameters according to the K value.
The test loop parameters comprise resistance and capacitance in the frequency modulation branch, and the calculation formula is as follows:
Figure BDA0002487232080000123
Figure BDA0002487232080000124
wherein L issFor testing equivalent inductance, R, after loop equivalence0、C0Respectively the resistance and capacitance in the frequency-modulated branch
Figure BDA0002487232080000125
Omega is the angular frequency with damping,
Figure BDA0002487232080000126
for variables defined in the calculation process, t1The time corresponding to the envelope voltage value of the initial portion of the actual recovery voltage.
Aiming at the parameter calculation of the opening and closing test of a single capacitor bank, the coefficient K under different amplitude coefficients is calculated by combining the second-order circuit analytical calculation and the calculation method of a Zeroin numerical algorithm, so that the frequency modulation branch parameter is calculated, and the envelope curve of the initial part of the recovery voltage meets the standard requirement. The calculation process and the calculation result are accurate, manual adjustment is not needed, and the parameter calculation can be rapidly realized in a programmable mode.
Aiming at the parameter calculation of the single capacitor bank opening and closing test, the voltage grade is subjected to per unit valuation, and the search of the tangent point can be independent of the voltage and only dependent on R0-Ls-C0Parameters and amplitude coefficients.
As shown in fig. 6, the method for calculating the loop parameters of the back-to-back capacitor bank open/close test specifically includes the following steps:
s1) constructing a relation model of the inrush branch circuit capacitance and the load branch circuit capacitance according to the on-off current, the standard recovery voltage peak value, the power frequency and the standard inrush current frequency of the tested circuit breaker.
The specific process of constructing the relationship model is as follows:
according to rated voltage U of Tested Breaker (TB)rOn/off current IcCalculation coefficient k corresponding to test modetypeAnd the initial recovery voltage amplitude coefficient K of the fracture of the tested circuit breakerafCalculating standard recovery voltage envelope parameters:
ucsfor standard recovery voltage peak:
Figure BDA0002487232080000131
t2stime corresponding to the standard recovery voltage peak:
t2snot only 8.7ms (50Hz) or 7.3ms (60Hz)
u1sFor the standard recovery voltage start part envelope voltage value:
Figure BDA0002487232080000132
t1sthe time corresponding to the envelope voltage value of the initial part of the standard recovery voltage is as follows:
t1s＝constant
wherein, KcIs a coefficient of capacitance, t1sIs constant according to UrThe test mode is BC1 (test mode 1 for BC, current I is cut off)c10-40% of rated breaking current) ktypeThe test method is BC2 (test method 2 for BC, open current I) 1.98c100% or more of rated breaking current) ktype＝1.95。
ucsAnd a supply voltage UgThe following formula should be satisfied:
Figure BDA0002487232080000141
wherein, KTFor step-up to T high-side to low-side ratio, LL、LHThe equivalent front boosting of a test loop is changed into a low-voltage side loop inductor and a high-voltage side loop inductor, and f is the frequency of a power frequency power supply.
KTAnd UgDetermined by the test station equipment parameters, at UgWithin an adjustable range of KTAs small as possible, the comprehensive consideration can result in KTAnd Ug，C1Relative to C2Small and therefore generally does not affect KTSelection of (2). Equivalent inductance can be calculated
Figure BDA0002487232080000142
Wherein C is2、C1Respectively, load branch circuit capacitance and inrush current branch circuit capacitance.
Determining the switching current IcStandard recovery voltage peak ucsAnd power frequency f, listing the following equation set:
Figure BDA0002487232080000143
UA＝Us+UA·2πf·(C1+C2)·2πf·Ls
UA′＝Us+UA′·2πf·C1·2πf·Ls
UA·ω·C2＝Ic
wherein, UA、U′AThe inrush branch voltage when TB is closed and open, respectively.
The above equation is solved to obtain C2、C1The first equation of (1):
Figure BDA0002487232080000144
according to the standard inrush frequency fdsObtaining C2、C1Second equation of (1):
Figure BDA0002487232080000145
namely, it is
Figure BDA0002487232080000146
Wherein the parameters
Figure BDA0002487232080000147
L is an inrush current branch inductance L1And load branch circuit inductance L2Sum, i.e. L ═ L1+L2。
The first equation and the second equation form a relational model of the inrush branch capacitance and the load branch capacitance.
S2), calculating the sum L of the initial inrush branch inductance and the load branch inductance according to the standard inrush frequency, the standard inrush peak value and the standard test voltage.
Figure BDA0002487232080000151
Wherein the standard test voltage
Figure BDA0002487232080000152
I_fdsIs the standard inrush peak.
S3), calculating an inrush current branch circuit capacitor, a load branch circuit capacitor, a test loop equivalent power supply voltage, an inrush current damping resistor and an actual inrush current peak value according to the relation module and the L, responding to the fact that the actual inrush current peak value is not located in a preset range, adjusting the L according to a preset step length, repeating the step until the actual inrush current peak value is located in the preset range, and obtaining back-to-back capacitor bank open-close test loop parameters.
Substituting L into the relationship model can solve C1By using C1Can solve out C2By using C2、C1Can solve out UA、U′ATest loop equivalent power supply voltage UsInrush damping resistance and actual inrush peak valueThe body is as follows:
Figure BDA0002487232080000153
Figure BDA0002487232080000154
Us＝UA-UA·2πf·(C1+C2)·2πf·Ls
Figure BDA0002487232080000155
Figure BDA0002487232080000156
Figure BDA0002487232080000157
wherein R isdFor surge damping resistance, KdAs a standard damping coefficient, I _ fdIs the actual inrush peak.
The preset range is (I _ f)ds,1.02I_fds) Therefore, if I _ fd≤I_fdsAdjusting L, that is, L- Δ L is a preset step length, and may be adjusted as needed; if I _ fd≥1.02·I_fdsAnd adjusting L, namely L + Δ L, where Δ L is a preset step length.
The resulting experimental loop parameters include: 1. adjust to the last L; 2. introducing the adjusted final L into a relation model to obtain an inrush current branch capacitance and a load branch capacitance; 3. substituting the inrush branch capacitance and the load branch capacitance into an equivalent power supply calculation formula to obtain the equivalent power supply voltage of the test loop; 4. and introducing the adjusted L, the inrush branch capacitance and the load branch capacitance into an inrush damping calculation formula to obtain an inrush damping resistance.
The following example is made based on the above method: fig. 7 shows an example of simulation calculation of the opening and closing test of a single capacitor bank: u shaper＝252kV，IcFrom the calculation results, it can be seen that the recovery voltage satisfies the envelope ucs-t2sThe initial part (amplification part) of the recovery voltage does not exceed u1s-t1sAnd the requirements are met. Fig. 8 is a calculation example of the back-to-back capacitor bank opening and closing test: u shaper＝252kV，Ic1100A, peak inrush current I _ fd≥I_fds(I_fds20kA), inrush frequency fd＝4348Hz(fds4250Hz), meets the requirements.
Aiming at the parameter calculation of the back-to-back capacitor bank switching test, an equation set related to inrush frequency, cut-off current, standard recovery voltage and loop principle is established to obtain C2、C1Expression of the relationship, C obtained thereby2、C1The parameters can be made to meet both the inrush frequency and the standard recovery voltage requirements.
Aiming at parameter calculation of back-to-back capacitor bank opening and closing test, initial L is given, and I _ f is reduceddThe calculation range of (2) shortens the calculation time and is beneficial to the realization of computer programming.
Aiming at parameter calculation of back-to-back capacitor bank opening and closing test, R is synchronously considered in the process of calculating test parametersdGiving out a calculation formula of the inrush current damping resistance to influence of inrush current attenuation, so that the inrush current waveform obtained by calculation automatically meets the standard damping coefficient Kd。
In conclusion, in the loop parameter calculation method for the single capacitor bank switching test, a relation model of the fracture voltage per unit value and time of the tested circuit breaker is established based on a test mode, and K values under different amplitude coefficients are calculated, so that frequency modulation branch parameters are calculated, the envelope curve of the initial part of the recovery voltage meets the standard requirement, the calculation process and the calculation result are accurate, and manual adjustment is not needed; in the loop parameter calculation method for the back-to-back capacitor bank opening and closing test, the standard recovery voltage peak value, the inrush damping resistance, the standard inrush current peak value and the frequency are comprehensively considered, the calculation process and the calculation result are accurate, and manual adjustment is not needed.
A loop parameter calculation system for a high-voltage capacitive direct test comprises a loop parameter calculation system for a single capacitor bank opening and closing test and a loop parameter calculation system for a back-to-back capacitor bank opening and closing test;
the loop parameter calculation system for the opening and closing test of the single capacitor bank comprises,
a first relational model building module: responding to the on-off of the tested breaker, and constructing a relation model of the per unit voltage value and the time of the break of the tested breaker according to a test mode;
a K acquisition module: calculating the ratio K of the actual initial recovery voltage envelope curve to the undamped oscillation envelope curve according to the relation model, the straight line passing through the origin point tangent to the corresponding curve of the relation model and the horizontal line of the peak value of the overvoltage per unit value; wherein the voltage per unit value peak value is equal to the initial recovery voltage amplitude coefficient of the fracture of the tested breaker;
a test loop parameter acquisition module: and calculating the parameters of the open-close test loop of the single capacitor bank according to the K value.
The loop parameter calculation system for the back-to-back capacitor bank open-close test comprises,
a second relationship module construction module: constructing a relation model of an inrush branch capacitor and a load branch capacitor according to the switching-off current, the standard recovery voltage peak value, the power frequency and the standard inrush frequency of the tested circuit breaker;
an initial L acquisition module: calculating the sum L of the initial inrush branch inductance and the load branch inductance according to the standard inrush frequency, the standard inrush peak value and the standard test voltage;
an adjustment calculation module: and calculating an inrush current branch capacitor, a load branch capacitor, a test loop equivalent power supply voltage, an inrush current damping resistor and an actual inrush current peak value according to the relation module and the L, adjusting the L according to a preset step length in response to that the actual inrush current peak value is not within a preset range, and repeating the step until the actual inrush current peak value is within the preset range to obtain back-to-back capacitor bank open-close test loop parameters.
A computer readable storage medium storing one or more programs, the one or more programs comprising instructions, which when executed by a computing device, cause the computing device to perform a loop parameter calculation method of a high voltage capacitive direct test.
A computing device comprising one or more processors, memory, and one or more programs stored in the memory and configured to be executed by the one or more processors, the one or more programs comprising instructions for performing a loop parameter calculation method of a high voltage capacitive direct test.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The present invention is not limited to the above embodiments, and any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention are included in the scope of the claims of the present invention which are filed as the application.

Claims (10)

1. A loop parameter calculation method for a high-voltage capacitive direct test is characterized by comprising the following steps: the method comprises a loop parameter calculation method for a single capacitor bank opening and closing test and a loop parameter calculation method for a back-to-back capacitor bank opening and closing test;
the method for calculating the loop parameters of the opening and closing test of the single capacitor bank comprises the following specific steps:
responding to the on-off of the tested breaker, and constructing a relation model of the per unit voltage value and the time of the break of the tested breaker according to a test mode;
calculating the ratio K of the actual initial recovery voltage envelope curve to the undamped oscillation envelope curve according to the relation model, the straight line passing through the origin point tangent to the corresponding curve of the relation model and the horizontal line of the peak value of the overvoltage per unit value; wherein the voltage per unit value peak value is equal to the initial recovery voltage amplitude coefficient of the fracture of the tested breaker;
calculating the parameters of the open-close test loop of the single capacitor bank according to the K value;
the method for calculating the loop parameters of the back-to-back capacitor bank opening and closing test specifically comprises the following steps:
constructing a relation model of an inrush branch capacitor and a load branch capacitor according to the switching-off current, the standard recovery voltage peak value, the power frequency and the standard inrush frequency of the tested circuit breaker;
calculating the sum L of the initial inrush branch inductance and the load branch inductance according to the standard inrush frequency, the standard inrush peak value and the standard test voltage;
and calculating an inrush current branch capacitor, a load branch capacitor, a test loop equivalent power supply voltage, an inrush current damping resistor and an actual inrush current peak value according to the relation module and the L, adjusting the L according to a preset step length in response to that the actual inrush current peak value is not within a preset range, and repeating the step until the actual inrush current peak value is within the preset range to obtain back-to-back capacitor bank open-close test loop parameters.
2. The method for calculating the loop parameters of the high-voltage capacitive direct test according to claim 1, wherein the method comprises the following steps: the relation model of the fracture voltage per unit value of the tested breaker and the time is as follows,
Figure FDA0002487232070000021
Figure FDA0002487232070000022
Figure FDA0002487232070000023
Figure FDA0002487232070000024
Figure FDA0002487232070000025
wherein, ω is0For undamped angular frequency, ω for damped angular frequency, β for a variable defined in the calculation process, u1_d(t) is the per unit value of the fracture voltage of the tested breaker, t is time, R0、C0Respectively the resistance and capacitance in the frequency-modulated branch, LsIn order to test the equivalent inductance of the loop after the equivalence,
Figure FDA0002487232070000026
Figure FDA0002487232070000027
wherein, KTFor increasing the voltage to the ratio of the high-voltage side to the low-voltage side, LL、LHFor testing equivalent pre-boost of the loop to low-voltage side loop inductance and high-voltage side loop inductance, UgIs the power supply voltage, f is the power frequency, KcTo a capacitive coefficient, UrRated voltage for the circuit breaker under test, IcFor breaking the current of the circuit breaker under test, ktypeAre experimental coefficients.
3. The method for calculating the loop parameters of the high-voltage capacitive direct test according to claim 1, wherein the method comprises the following steps: calculating the ratio K of the actual initial recovery voltage envelope curve to the undamped oscillation envelope curve according to the relation model, the straight line passing through the origin point tangent to the corresponding curve of the relation model and the horizontal line of the peak value of the overvoltage per unit value,
according to the relation model, calculating the time t when the voltage per unit value reaches the peak valued_p；
Calculating td_pRatio K to undamped oscillation half period timeP1；
Acquiring tangent point coordinates of a corresponding curve of the relation model and a straight line passing through the origin;
acquiring intersection point coordinates of the straight line passing through the origin point and the peak horizontal line of the overvoltage per unit value according to the intersection point coordinates;
calculating the corresponding time and t of the intersection point coordinated_pRatio K ofP2；
According to KP1、KP2And calculating the ratio K of the actual initial recovery voltage envelope line to the undamped oscillation envelope line.
4. The method for calculating the loop parameters of the high-voltage capacitive direct test according to claim 1, wherein the method comprises the following steps: the test loop parameters comprise resistance and capacitance in the frequency modulation branch circuit, the calculation formula is as follows,
Figure FDA0002487232070000031
Figure FDA0002487232070000032
wherein L issFor testing equivalent inductance, R, after loop equivalence0、C0Respectively the resistance and capacitance in the frequency-modulated branch
Figure FDA0002487232070000033
Omega is the angular frequency with damping,
Figure FDA0002487232070000034
for variables defined in the calculation process, t1The time corresponding to the envelope voltage value of the initial portion of the actual recovery voltage.
5. The method for calculating the loop parameters of the high-voltage capacitive direct test according to claim 1, wherein the method comprises the following steps: the relation model formula of the inrush branch circuit capacitance and the load branch circuit capacitance is as follows,
Figure FDA0002487232070000035
Figure FDA0002487232070000036
wherein, C2、C1Respectively a load branch circuit capacitor and an inrush current branch circuit capacitor, f is a power frequency, LsFor testing the equivalent inductance u after the loop is equivalentcsTo standard restore the voltage peak, IcFor the breaking current of the circuit breaker under test, fdsIs the standard inrush frequency.
6. The method for calculating the loop parameters of the high-voltage capacitive direct test according to claim 1, wherein the method comprises the following steps: the test loop parameters include the parameters of the test loop,
adjust to the last L;
introducing the adjusted final L into a relation model to obtain an inrush current branch capacitance and a load branch capacitance;
substituting the inrush branch capacitance and the load branch capacitance into an equivalent power supply calculation formula to obtain the equivalent power supply voltage of the test loop;
and introducing the adjusted L, the inrush branch capacitance and the load branch capacitance into an inrush damping calculation formula to obtain an inrush damping resistance.
7. The method for calculating the loop parameters of the high-voltage capacitive direct test according to claim 6, wherein the method comprises the following steps: an equivalent power supply calculation formula is obtained,
Us＝UA-UA·2πf·(C1+C2)·2πf·Ls
wherein, UsFor testing the equivalent supply voltage of the loop, C2、C1Respectively a load branch circuit capacitor and an inrush current branch circuit capacitor, f is a power frequency, LsFor testing equivalent inductance, U, after loop equivalenceAThe voltage of an inrush current branch circuit when the tested breaker is closed;
the inrush current damping calculation formula is as follows,
Figure FDA0002487232070000041
wherein R isdFor surge damping resistance, KdIs a standard damping coefficient, parameter
Figure FDA0002487232070000042
8. A loop parameter calculation system for high-voltage capacitive direct test is characterized in that: the method comprises a loop parameter calculation system for a single capacitor bank opening and closing test and a loop parameter calculation system for a back-to-back capacitor bank opening and closing test;
the loop parameter calculation system for the opening and closing test of the single capacitor bank comprises,
a first relational model building module: responding to the on-off of the tested breaker, and constructing a relation model of the per unit voltage value and the time of the break of the tested breaker according to a test mode;
a K acquisition module: calculating the ratio K of the actual initial recovery voltage envelope curve to the undamped oscillation envelope curve according to the relation model, the straight line passing through the origin point tangent to the corresponding curve of the relation model and the horizontal line of the peak value of the overvoltage per unit value; wherein the voltage per unit value peak value is equal to the initial recovery voltage amplitude coefficient of the fracture of the tested breaker;
a test loop parameter acquisition module: and calculating the parameters of the open-close test loop of the single capacitor bank according to the K value.
The loop parameter calculation system for the back-to-back capacitor bank open-close test comprises,
a second relationship module construction module: constructing a relation model of an inrush branch capacitor and a load branch capacitor according to the switching-off current, the standard recovery voltage peak value, the power frequency and the standard inrush frequency of the tested circuit breaker;
an initial L acquisition module: calculating the sum L of the initial inrush branch inductance and the load branch inductance according to the standard inrush frequency, the standard inrush peak value and the standard test voltage;
an adjustment calculation module: and calculating an inrush current branch capacitor, a load branch capacitor, a test loop equivalent power supply voltage, an inrush current damping resistor and an actual inrush current peak value according to the relation module and the L, adjusting the L according to a preset step length in response to that the actual inrush current peak value is not within a preset range, and repeating the step until the actual inrush current peak value is within the preset range to obtain back-to-back capacitor bank open-close test loop parameters.
9. A computer readable storage medium storing one or more programs, characterized in that: the one or more programs include instructions that, when executed by a computing device, cause the computing device to perform any of the methods of claims 1-7.
10. A computing device, characterized by: comprises the steps of (a) preparing a mixture of a plurality of raw materials,
one or more processors, memory, and one or more programs stored in the memory and configured to be executed by the one or more processors, the one or more programs including instructions for performing any of the methods of claims 1-7.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU2504599A (en) * 1998-02-19 1999-09-06 Queensland University Of Technology Method and apparatus for monitoring ac circuits
US6850072B1 (en) * 2003-03-31 2005-02-01 General Electric Company Methods and apparatus for analyzing high voltage circuit breakers
CN102967826A (en) * 2012-11-05 2013-03-13 中国电力科学研究院 Test method for electric endurance of switching capacitor set beaker of extra-high voltage project
CN109709476A (en) * 2018-11-05 2019-05-03 国网电力科学研究院有限公司 A kind of extracting method of transient recovery voltage waveform envelope line characteristic parameter

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU2504599A (en) * 1998-02-19 1999-09-06 Queensland University Of Technology Method and apparatus for monitoring ac circuits
US6850072B1 (en) * 2003-03-31 2005-02-01 General Electric Company Methods and apparatus for analyzing high voltage circuit breakers
CN102967826A (en) * 2012-11-05 2013-03-13 中国电力科学研究院 Test method for electric endurance of switching capacitor set beaker of extra-high voltage project
CN109709476A (en) * 2018-11-05 2019-05-03 国网电力科学研究院有限公司 A kind of extracting method of transient recovery voltage waveform envelope line characteristic parameter

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
张照辉等: "12kV真空断路器投切并联电抗器合闸预击穿过电压的研究", 《高压电器》 *
程亭婷等: "基于SF6断路器动态击穿特性的选相合闸技术", 《高电压技术》 *
魏钢等: "12kV真空断路器开断并联电抗器电弧重燃三相建模", 《电气安全 》 *

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