CN111557661B

CN111557661B - Electrocardiosignal processing method and device

Info

Publication number: CN111557661B
Application number: CN202010415291.6A
Authority: CN
Inventors: 尹说; 姜汉钧; 王志华; 贾雯
Original assignee: Shenzhen Research Institute Tsinghua University
Current assignee: Shenzhen Research Institute Tsinghua University
Priority date: 2020-05-15
Filing date: 2020-05-15
Publication date: 2024-03-08
Anticipated expiration: 2040-05-15
Also published as: CN111557661A

Abstract

An electrocardiosignal processing method at least comprises an ECG abnormal rhythm detection method, wherein the ECG abnormal rhythm detection method can be based on dynamic threshold gradient comparison, the ECG abnormal rhythm detection method is input into an electrocardiosignal stream quantized by an analog-to-digital converter, the electrocardiosignal stream is output into the peak position and the peak size of the electrocardiosignal stream, and meanwhile, a clock signal for detecting the peak value and whether an abnormal peak value exists or not are output. Once an abnormal peak is detected, i.e. an abnormal marker is present, all the cached electrocardiographic data may be transmitted out through or triggering the data interface. The electrocardiosignal processing method has low power consumption and extremely low hardware cost, and can accurately identify the abnormality. The invention also provides an electrocardiosignal processing device.

Description

Electrocardiosignal processing method and device

Technical Field

The invention relates to the technical field of medical signal processing, in particular to an electrocardiosignal processing method with low power consumption and low hardware cost.

Background

It has been studied that about a proportion (e.g. 30%) of humans experience syncope at least once throughout their lifetime. Of all syncope patients, about one third of them will repeatedly go on, and doctors cannot make clear diagnoses of the cause of syncope in a significant proportion of patients (about 17%). The recurrent attacks of syncope seriously affect the patient's lifestyle and threaten the patient's life and health. Of the various syncope conditions, heart-derived syncope is the most predominant, severe type of syncope (about 75-85% of syncope), which is caused by heart disease and the like. Severe cases can lead to sudden death in the event of a syncope. And arrhythmia is the main cause of cardiac syncope. The curve pattern displayed by an Electrocardiogram (ECG) is generally classified into P, Q, R, S, T, U waves and the like. The most important beat rhythm information is on the R wave peak value of the ECG signal, namely the main peak of the electrocardiosignal, and is the most important means for detecting various arrhythmias.

The ECG of syncope patients has three characteristics: firstly, the abnormal heart rate is difficult to capture sporadically, secondly, the abnormal heart rate is irregular and paroxysmal intermittently in a short time, and thirdly, the abnormal heart rate can be recovered spontaneously and completely. Thus, providing ECG monitoring for patients with cardiac syncope requires long, continuous, uninterrupted monitoring. The most critical components of the electrocardiographic abnormal rhythm monitoring system are an electrocardiographic signal processing unit with ultralow power consumption, ultralow hardware cost and high performance. The main structure of the system comprises a data interface, signal processing, cyclic caching, a register file and the like. Considering that the electrocardiographic monitoring system of the human body requires long-time continuous operation, especially the implantable monitoring system is required to be capable of continuous operation for 2-3 years (namely about 20000 hours), the battery power of the lithium fluorocarbon battery for the implantable application is estimated to be about 160mAh according to the performance of the commercial miniaturized lithium fluorocarbon battery, and the average current of the system can only have a plurality of microamps. While the monitoring device should be able to buffer ECG waveforms over a long period of time (typically several to tens of minutes) in the event of occasional anomalies so as to monitor and analyze the changes in its characteristics. That is, the data cache must be able to cache for a sufficient period of time to re-write the nonvolatile memory when an exception occurs that requires writing or downloading.

Since it is necessary to decide whether to write data to the nonvolatile memory based on whether or not there is an abnormality, it is necessary to accurately identify and detect an abnormality of a rhythm. The abnormal rhythm of the ECG of the syncope patient is characterized by sporadic, unexpected and spontaneous recovery, and the data stored for a period of time when the system application situation requires alarming is downloaded when analysis is needed. This means that the abnormal rhythm detection should at least meet the following requirements, namely, detecting the abnormal rhythm of the sporadic ECG signal in real time, the accuracy is high, the erroneous judgment is low, the hardware cost is low, and the occupation of operation resources is small. A typical microprocessor MSP430 is commercially available with a typical current of 2mA in its operating mode. It is apparent that such microprocessors are not suitable for use as ultra-low power consumption electrocardiographic signal exception rhythm processing. Meanwhile, although the ECG recognition algorithm has been developed for decades, algorithm hardware cost such as wavelet transformation, artificial neural network, support vector machine recognition and the like is huge, and the ECG recognition algorithm is not suitable for occasional abnormal electrocardiographic abnormality monitoring application. And low-overhead algorithms such as second-order differential detection, simple threshold judgment and the like are difficult to adapt to practical application due to poor robustness to noise, environment and ECG waveform differences of different subjects.

Disclosure of Invention

In view of the foregoing, it is necessary to provide an electrocardiosignal processing method and apparatus which have low power consumption and extremely low hardware cost, and can accurately identify abnormalities.

An electrocardiosignal processing method at least comprising an ECG abnormal rhythm detection method, the ECG abnormal rhythm detection method comprising:

(a0) Receiving the electrocardiosignal stream quantized by the analog-to-digital converter;

(a1) Obtaining gradients point by point for the electrocardiosignal flow;

(a2) Taking the maximum value of the first M gradients as a threshold value;

(a3) Searching backwards for points in the first neighborhood with a progressive difference greater than k times the threshold;

(a4) Respectively searching a maximum value and a minimum value of each point in a second neighborhood in all the obtained points which are larger than k times of the threshold value;

(a5) Obtaining an extreme value difference between a maximum value and a minimum value in each second neighborhood, and comparing the extreme value difference with a difference value between a minimum value point in a second neighborhood corresponding to the extreme value difference and a point before the minimum value point to judge whether the extreme value difference is larger than the difference value between the minimum value point and the point before the minimum value point;

(a6) When the extreme value difference is larger than or equal to the difference value between the minimum value point and the point before the minimum value point, taking the maximum value point in the second adjacent area as a peak value, and recording the peak value position and time of the peak value point;

(a7) Comparing the detected peak value with the threshold value to adaptively update the threshold value, and returning to the step (a 3);

(a8) Detecting whether the peak value is abnormal according to the steps (a 2) to (a 7).

The ECG abnormal rhythm detection module comprises a gradient solving unit, a peak value detection unit and an abnormal peak value detection unit, wherein the gradient solving unit is used for solving the gradient of an electrocardiosignal stream point by point, and the peak value detection unit and the abnormal peak value detection unit are used for detecting a peak value and judging the abnormal peak value according to the steps.

The electrocardiosignal processing method and device have at least the following advantages:

1. the hardware cost is small, and only shift, addition, multiplication and comparison operation are adopted, so that the power consumption of the hardware implementation of the processing circuit can be greatly reduced.

2. The method has the advantages of achieving the effects of considering hardware cost and identification accuracy, having good baseline drift resistance, being capable of being adaptively adjusted according to different subjects and local characteristic changes, reducing misjudgment, and having stronger robustness.

3. The multi-channel downsampling median taking mode is adopted, and the influence of noise such as high-frequency jitter, friction and the like can be effectively reduced.

Drawings

FIG. 1 is a flowchart of an ECG abnormal rhythm detection method based on dynamic threshold gradient comparison in an electrocardiographic processing method according to a preferred embodiment of the present invention.

FIG. 2 is a schematic diagram showing the variation of each sequence in the method for detecting an abnormal rhythm of the ECG shown in FIG. 1.

Fig. 3 is a schematic diagram of a hierarchical storage caching method based on two-stage compression in an electrocardiograph processing method according to a preferred embodiment of the present invention.

Fig. 4 is a flowchart of the hierarchical storage caching method based on two-stage compression shown in fig. 3.

Fig. 5 is a schematic diagram of a compression conversion method of a rotary shaft door according to a preferred embodiment of the present invention.

Fig. 6 is a flowchart of a compression conversion method using the rotation axis gate shown in fig. 5.

FIG. 7 is a functional block diagram of an ECG processing device according to a preferred embodiment of the present invention.

Fig. 8 is a diagram showing the detection result of an ECG signal by the ECG abnormal rhythm detection method according to the present invention.

Fig. 9 is a diagram showing an example of a test result of superimposing high-frequency dither noise on an ECG signal.

Fig. 10a and 10b are data diagrams before and after compression and decompression, respectively, using the adaptive revolving door transformation method of the present invention.

Description of the main reference signs

Electrocardiosignal processing device	200
		ECG abnormal rhythm detection module	21
Gradient finding unit	211
		Downsampling unit	212
Peak detection unit	213
		Counting unit	214
Abnormal peak value detection unit	215
		Cache array	22
First buffer unit	221
		Second buffer unit	222
Third buffer unit	223
		Address decoding selection interface unit	224
Register file	23
		Control interface	24
Data interface	25

The invention will be further described in the following detailed description in conjunction with the above-described figures.

Detailed Description

The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

It will be understood that when an element is referred to as being "electrically connected" to another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "electrically connected" to another element, it can be in contact, e.g., by way of a wire connection, or can be in contactless connection, e.g., by way of contactless coupling.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.

Some embodiments of the present invention are described in detail below with reference to the accompanying drawings. The following embodiments and features of the embodiments may be combined with each other without conflict.

It will be appreciated that typical non-volatile memories and transceiver chips today consume excessive power, operating currents on the order of milliamps. This determines that it is neither possible to write nonvolatile memory continuously nor to collect emission data while in the implanted device. That is, the working characteristics of the circular buffer are two: firstly, the data is written circularly and is not powered down, secondly, the data updating period is extremely long, and the cacheable data volume is very large. If the data is estimated according to 256sps,12-16bit and other indexes of commercial products, if the data with the total time length of tens of minutes is circularly cached point by point, the caching space of 2-3Mbit is required. This means that the unit drain per memory cell can only be a few pA/bit. Based on conventional memory cells such as static random access memory (Static Random Access Memory, SRAM), dynamic random access memory (Dynamic Random Access Memory, DRAM), flip-flops, latches, the unit leakage of which reaches several pA to several tens pA has come close to the theoretical limit of the existing technology. This illustrates that point-by-point buffering of data is difficult to achieve.

Therefore, the embodiment of the invention relates to an electrocardiosignal processing method with low hardware cost, which can overcome the limitation of hardware cost and the limitation that the buffer memory space is huge and can not be written into a nonvolatile memory at any time and emitted at any time aiming at the requirements of continuous and uninterrupted low-power-consumption work for a long time, and realizes the detection of abnormal rhythms in a dynamic gradient threshold mode. The electrocardiosignal processing method can be used for detecting and identifying abnormal rhythms of the electrocardiosignals of the human body, and has the advantages of continuous detection for a long time, low power consumption, low hardware cost and accurate identification of the abnormal rhythms. It is understood that the electrocardiosignal processing method can be applied to an implantable Electrocardiogram (ECG) monitoring system and also can be applied to a wearable ECG monitoring system or other application environments.

It can be understood that the electrocardiosignal processing method can be realized in the form of an embedded algorithm module, a field programmable gate Array (Field Programmable Gate-Array, FPGA) hardware platform or a fully-customized digital application-specific integrated circuit (Application Specific Integrated Circuit, ASIC) and the like. In this embodiment, the electrocardiograph signal processing method is described by way of example in which the electrocardiograph signal processing method is implemented in a fully-custom digital ASIC.

It can be understood that the electrocardiosignal processing method in the embodiment of the invention mainly comprises two parts, namely an ECG abnormal rhythm detection method based on dynamic threshold gradient comparison and a hierarchical storage caching method based on two-stage compression, wherein the ECG abnormal rhythm detection method is low in hardware cost. These two parts will be described in detail below, respectively.

FIG. 1 is a flow chart of a method of detecting an abnormal ECG rhythm based on dynamic threshold gradient comparison. FIG. 2 is a schematic diagram showing the variation of each sequence in the method for detecting an abnormal rhythm of the ECG shown in FIG. 1. The input of the ECG abnormal rhythm detection method based on dynamic threshold gradient comparison is an unsigned integer electrocardiosignal stream quantized by an Analog-to-digital converter (ADC), the output is the peak position and the peak size of the electrocardiosignal stream, and at the same time, a clock signal (i.e. peak marking clock) for detecting the peak is output, and whether an abnormal peak exists or not. Once an abnormal peak is detected, i.e. an abnormal marker is present, all the cached electrocardiographic data may be transmitted out through or triggering the data interface.

It will be appreciated that in this embodiment, the ECG abnormal rhythm detection method is largely divided into two parts, namely rhythm (i.e., peak) detection and abnormal rhythm detection or identification. Typically, the parameters on which ECG rhythm detection is primarily dependent are from the time domain, frequency domain, entropy domain, wavelet domain, etc. Considering that the practical application of the electrocardiosignal processing method in the implantable electrocardio monitoring system requires extremely low hardware cost, the time domain parameter identification algorithm is adopted in the embodiment. Furthermore, depending on the nature of the actual waveform of the ECG, the derivative local around the peak is maximized, while the derivative operation is essentially a subtraction operation, since the magnitude is only compared, without knowing the specific magnitude of the derivative. Therefore, in the present embodiment, the derivative operation can be simplified to the gradient operation.

In this embodiment, the rhythm detection portion in the electrocardiographic signal processing method is mainly based on dynamic threshold gradient comparison. The abnormal rhythm detection or identification method is similar to the rhythm detection method, and only two searches for abnormal gradient values are actually needed. Therefore, in the present embodiment, an ECG abnormal rhythm detection method will be described mainly by taking a rhythm detection method as an example. Specifically, referring to fig. 1 together, the method for detecting abnormal ECG rhythms based on dynamic threshold gradient comparison mainly includes the following steps:

step S10, receiving the electrocardiographic signal stream quantized by the ADC, i.e. the data point sequence (refer to fig. 2). Wherein the data point sequence at least comprises parameters such as numerical value, time and the like.

It will be appreciated that in this embodiment, the electrocardiographic signal stream quantized by the ADC may also be subjected to symbol adjustment, for example, to an unsigned integer electrocardiographic signal stream, when the electrocardiographic signal stream is received.

Step S11, gradient is calculated point by point for the electrocardiosignal flow, namely the data point sequence.

In step S12, the maximum value of the first M gradients is set as a threshold T.

In step S13, a point in the first neighborhood of the size of the first Window (Window) is searched backward, where the difference (i.e. gradient or derivative) is larger than k times the threshold T (i.e. kT).

In this embodiment, the first window length may be the same as or different from the M value. For example, a second M gradients after the first M gradients may be analyzed as a first neighborhood to search for all points within the first neighborhood that differ by a factor k greater than a threshold T.

Step S14, among all obtained points which are larger than k times of the threshold T, searching a maximum value and a minimum value of each point in a second neighborhood of a second window size.

For example, in the present embodiment, it is assumed that in step S13, 5 points whose step-by-step difference is greater than k times the threshold T are available. The 5 points are used for respectively establishing the second neighborhoods, and a maximum value and a minimum value are respectively searched in each second neighborhoods.

It is understood that in this embodiment, the second window length may also be the same as or different from the value of M.

And S15, obtaining an extremum difference between a maximum value and a minimum value in each second adjacent area, and comparing the extremum difference with a difference value between a minimum value point in the second adjacent area corresponding to the extremum difference and a point before the minimum value point to judge whether the extremum difference is larger than the difference value between the minimum value point and the point before the minimum value point.

It is understood that in step S15, when the extremum difference is not greater than the difference between the minimum point and the point preceding the minimum point, it is indicated that there is no peak in the second neighborhood corresponding to the extremum difference. When the extremum difference is greater than or equal to the difference between the minimum point and the point preceding the minimum point, step S16 is performed.

And S16, taking the maximum point in the second adjacent area as a peak value, and recording the peak value position and time.

And step S17, comparing the peak value detected in the step S16 with the threshold value T to adaptively adjust or update the threshold value T.

When the peak value is smaller than the threshold value T, the peak value is updated to a new threshold value T, and the step S13 is returned. And when the peak value is greater than the threshold value T, the threshold value T is not updated. Thus, a corresponding peak point sequence (see fig. 2) is obtained according to steps S12-S17, i.e. peak detection is performed. The peak point sequence at least comprises parameters such as a peak sequence number, a peak size, a peak interval and the like.

Step S18, detecting whether the peak value is abnormal according to the steps S12-S17, namely adopting a method similar to the peak value detection to execute abnormal peak value detection.

It will be appreciated that the location of the peak anomaly may be detected using a similar method as described above, since the peak anomaly is in fact a peak occurring at a time interval. When an abnormal peak is detected, the abnormal peak may be marked, i.e., an abnormal mark is generated, and an abnormal peak sequence is obtained (see fig. 2). For example, when an abnormal peak is detected, the abnormal peak may be marked as a logical "1", a logical "0", or other symbol. The abnormal peak value sequence at least comprises parameters such as a numerical value, time and the like, namely the size of an abnormal peak value and the moment of the abnormal peak value. In addition, once an abnormal peak is detected, buffering of all electrocardiographic data may be triggered.

It will be appreciated that when the method described above is used for abnormal rhythm detection, erroneous decisions may be caused if high frequency jitter noise is present. Therefore, in this embodiment, step S11 in the ECG abnormal rhythm detection method based on dynamic threshold gradient comparison may be further improved as follows:

downsampling the electrocardiographic signal stream, i.e. the data point sequence, into a plurality of sequences with equal step length (for example, the step length is four), then solving the gradient for the data points in each sequence, and obtaining the median of the derivative (gradient) of the corresponding position of each sequence, i.e. after solving the gradient for each sequence, obtaining the median to form a median sequence, and then executing step S12.

Obviously, the above steps only add shift operations (e.g. two digits shift 1 bit to the right, four digits shift 2 bits to the right), and the adder only has to multiplex according to the clock. It can be understood that the step can realize taking the subspace of the low-dimensional signal by carrying out downsampling processing on the data point sequence, and the high-frequency noise is changed drastically in the neighborhood of the peak value, so that the change can be weakened by segmentation processing, and the erroneous judgment can be reduced.

It can be understood that please refer to fig. 3 and fig. 4 together, wherein fig. 3 is a schematic diagram of a hierarchical storage caching method based on two-stage compression in the electrocardiograph signal processing method of the present invention. Fig. 4 is a flowchart of the hierarchical storage caching method based on two-stage compression.

It will be appreciated that the peak and interval variations of the signal are small and the difference is less, considering that the ECG signal information is unevenly distributed and that the ECG anomalies are sporadic for syncope patients. Therefore, key information can be reserved, and the traditional serial point-by-point data caching is changed into a layered caching mode. Specifically, the hierarchical storage method based on two-stage compression provided by the invention adopts a three-layer hierarchical cache structure. The hierarchical storage caching method based on two-stage compression mainly comprises the following steps:

And step S30, carrying out first-stage buffering on the electrocardiosignal stream.

In this embodiment, the first level buffer refers to directly buffering data for several seconds, which reflects the instantaneous changes in the ECG signal. For example, in one embodiment, the first level cache may directly cache 2 seconds(s) of data.

It will be appreciated that in this embodiment, the first level buffered data may also serve as a source of data for the ECG abnormal rhythm detection method. That is, after the data buffered in the first stage is subjected to symbol adjustment, for example, to an unsigned integer electrocardiographic signal stream, the ECG abnormal rhythm detection method may perform a processing operation on the data to obtain peak information. The peak information refers to the peak point sequence information described above, including, but not limited to, peak sequence number, peak size, and peak interval.

Step S31, performing first-level compression on the data cached at the first level, and then performing second-level caching.

It will be appreciated that in this embodiment, the second level buffer belongs to a short time buffer, for example, a buffer of several minutes of data, reflecting the morphological changes of the ECG signal over a period of time. For example, in one embodiment, the second stage may store 256 compressed blocks.

And S32, extracting key feature points from the peak value information, performing secondary compression on the key feature points, and performing third-stage caching.

It will be appreciated that in this embodiment, the third level buffer is a long-term buffer, that is, it compresses and stores key feature points, such as peak values and differences between time intervals at which peak values occur. The third level buffer may store 1000-2000 cardiac cycles of corresponding data to reflect the trend of the ECG signal over a longer period of time. For example, in one embodiment, the third level buffer may be configured to buffer peaks of the cardiac signal and time interval differences between the peaks, and buffer a peak of 64 cardiac cycles and time interval compressed blocks of peaks (about 1500 cardiac cycles).

It can be appreciated that in the present embodiment, both the step S31 and the step S32 may use a revolving door compression transformation method to perform the primary compression and the secondary compression. Wherein the first stage compression is compressing the signal data points themselves. The two-stage compression is the difference between the data points (i.e., key feature points) compressing key feature values (e.g., peak values and the time at which the peak occurs) of the ECG signal.

Referring to fig. 5 and fig. 6 together, fig. 5 is a schematic diagram of a compression conversion method of a rotary shaft door according to the present invention. Fig. 6 is a flow chart of a compression conversion method using a rotation axis gate.

Wherein first a starting point and a margin of error epsilon are determined (see step S40). The corresponding points of the upper and lower limits of the error, i.e. the door width, are then confirmed in the coordinate system along the vertical axis from the starting point. As time goes backward, the latter points are wired one by one toward the corresponding points of the upper and lower limits of the error (refer to step S41). Once the link angle increases, the link is updated (step S42). If the extension lines of the two connection lines become disjoint from a certain point, the point is updated as a new start point (refer to step S43), and the original start point, the new start point and the distance between the two points are cached (refer to step S44).

Obviously, after the rotation axis door compression transformation method is adopted, the final compression result is a compression block with three values as a group. Wherein the first value is a block header data value, the second value is a block mantissa data value, and the third value is a compressed block length. In addition, when decompression is needed later, the compressed data can be decompressed in an interpolation mode.

It can be appreciated that in order to adapt to the characteristics of periodicity and information concentration of compressed data, the invention also provides a revolving door compression transformation strategy based on self-adaptive adjustment. In particular, for the first stage compression, the adaptation of the turnstile compression may be increased periodically from the ECG waveform. I.e. after initial updating of the threshold T, the ECG rhythm period is saved. That is, the ECG peak is kept periodically after it occurs, but the present stage compression (i.e., the first stage compression) does not need to take into account the peak size and the presence of anomalies. At the occurrence of a peak mark (i.e., peak mark clock), one quarter of the heart rate period (i.e., rhythm period) is pushed back, and the data points during this time are compressed with a small error margin E. After a quarter of the heart rate cycle, the compression of the turnstile is performed with a larger margin of error epsilon. After one-half heart rate cycle, the smaller error margin ε is recovered for turnstile compression and for one-quarter heart rate cycle.

It will be appreciated that, in general, as the error margin becomes larger, the compression loss increases. And typically during the preceding and following periods of the heart rate cycle, e.g., one quarter of the heart rate cycle, the signal jitter is greater and the signal jitter is less for the intermediate period. Thus, the above-mentioned method can be adopted to adopt smaller error tolerance in the front period and the rear period of the heart rate period so as to prevent compression loss. And the middle time period adopts larger error tolerance, so that the cache information loss and the hardware cost are reasonably balanced.

It will be appreciated that in this embodiment, the smaller generally refers to less than one twentieth of the maximum amplitude of the signal. The larger generally refers to greater than one tenth of the maximum amplitude of the signal.

Also, for the two-stage compression, a register parameter threshold N is first set, and the error margin of the peak difference is reduced, e.g., automatically halved, when the absolute value of the peak difference is less than the error margin ε for more than N cycles. Also, when the absolute value of the time difference is smaller than the error margin epsilon for more than N cycles, the error margin of the time difference is reduced, for example, the error margin epsilon is automatically halved, so that the cache information loss and the hardware cost are reasonably balanced.

It is understood that, in this embodiment, fig. 7 is a block diagram of a structure in which the electrocardiograph signal processing method is implemented in an ASIC form. Namely, the invention also provides an electrocardiosignal processing device 200. The electrocardiosignal processing device 200 at least comprises an ECG abnormal rhythm detection module 21, a cache array 22, a register file 23, a control interface 24 and a data interface 25.

It will be appreciated that pipeline architecture is a common design approach in digital circuit design, and that a common pipeline architecture is a five-stage pipeline. The operation resources comprise circuit structures such as adders, multipliers, comparators, shift registers and the like so as to realize basic logic operation. The pipeline can increase the utilization rate of the operation resources and reduce the expenditure of the operation resources. Thus, in this embodiment, the ECG abnormal rhythm detection module 21 may multiplex the computational resources through a simplified three-stage pipeline structure. The ECG abnormal rhythm detection module 21 is configured to perform gradient operation on the electrocardiographic signal flow to obtain a dynamic threshold, then detect a rhythm (peak value) based on the dynamic threshold to generate a corresponding peak point sequence, and finally perform abnormal rhythm detection or discrimination according to a similar manner. Specifically, the ECG abnormal rhythm detection module 21 includes a gradient determination unit 211, a peak detection unit 213, a counting unit 214, and an abnormal peak detection unit 215.

The gradient unit 211 is used for gradient the electrocardiosignal flow point by point. The peak detection unit 213 is configured to perform peak detection according to the steps S12-S17, and form a corresponding peak point sequence. The peak point sequence at least comprises parameters such as a peak sequence number, a peak size, a peak interval and the like. The counting unit 214 is configured to count peak intervals in the peak point sequence. The abnormal peak detecting unit 215 is similar to the peak detecting unit 213 for detecting an abnormal peak. When an abnormal peak is detected, the abnormal peak can be marked, and an abnormal peak sequence is obtained. For example, when an abnormal peak is detected, the abnormal peak may be marked as a logical "1", a logical "0", or other symbol. The abnormal peak value sequence at least comprises parameters such as a numerical value, time and the like, namely the size of an abnormal peak value and the moment of the abnormal peak value.

It will be appreciated that in this embodiment, the ECG abnormal rhythm detection module 21 may output at least information such as peak size, peak time, peak marker clock, abnormal marker, etc.

It will be appreciated that in this embodiment, the ECG abnormal rhythm detection module 21 further includes a downsampling unit 212. The downsampling unit 212 is configured to downsample the electrocardiographic signal stream, i.e., the data point sequence, into a plurality of sequences with equal step length (e.g., the step length is four), then calculate the gradient for the data points in each of the sequences, and obtain the median of the derivative (gradient) of the corresponding position of each of the sequences, i.e., the median of each of the sequences is calculated after calculating the gradient, so as to form a median sequence, and then output the median sequence to the peak detection unit 213 for peak detection.

Obviously, the setting of the downsampling unit 212 only increases the shift operation (for example, two digits shift right by 1 bit, four digits shift right by 2 bits), and the adder can be multiplexed according to the clock. It can be understood that the step can realize taking the subspace of the low-dimensional signal by carrying out downsampling processing on the data point sequence, and the high-frequency noise is changed drastically in the neighborhood of the peak value, so that the change can be weakened by segmentation processing, and the erroneous judgment can be reduced.

The cache array 22 at least includes a first cache unit 221, a second cache unit 222, and a third cache unit 223. The first buffer unit 221 is configured to perform a first level buffer on the electrocardiograph signal stream. In this embodiment, the first level buffer refers to directly storing seconds of data, which reflects the instantaneous changes in the ECG signal. For example, in one embodiment, the first level cache may directly cache 2s of data.

It will be appreciated that in this embodiment, the first level buffered data may also serve as a data source for the ECG abnormal rhythm detection module 21. That is, after the data buffered in the first stage is subjected to symbol adjustment, for example, to an unsigned and shaped electrocardiographic signal stream, the data may be received by the gradient determining unit 211 or the downsampling unit 212 in the ECG abnormal rhythm detection module 21, and processed and operated.

The second buffer unit 222 is configured to perform a first level compression on the first level buffered data, and then perform a second level buffering. In this embodiment, the second level buffer belongs to a short time buffer, for example, a buffer of several minutes of data, which reflects the morphology change of the ECG signal over a period of time. For example, in one embodiment, the second stage may store 256 compressed blocks.

The third buffer unit 223 is configured to extract key feature points from the peak information of the peak detection unit 213, and perform a third level buffer after performing a second level compression on the key feature points.

It can be appreciated that in this embodiment, the primary compression and the secondary compression may be implemented by the revolving door compression transformation method described above, which is not described herein. Wherein the first stage compression is compressing the signal data points themselves. The two-stage compression is the difference between the data points (i.e., key feature points) compressing key feature values (e.g., peak values and the time at which the peak occurs) of the ECG signal.

It will be appreciated that in the present embodiment, each of the buffer units, for example, the first to third buffer units 221, 222, 223 uses a latch for realizing the latch function. In addition, in design, if the hardware description language does not instantiate a latch, metastable states such as logic lock may result. Thus, each cache unit employs an instantiated latch.

It will be appreciated that in this embodiment, since the exemplary latch is used, no sense amplifier circuit is required, the sense frequency is low, and no operation is performed at all most of the time after the data is buffered, only the gate pulse needs to be turned off. Wherein the gate pulse, when active, has an output equal to the input. When the pulse is inactive, the output remains unchanged.

In addition, if the gate pulse and the clock rising edge of the latch arrive at the same time, a data error written into the cache unit may be caused. Therefore, in the present embodiment, the buffer array 22 may further be provided with a latch pulse generating and debounce circuit (not shown). The circuit can be composed of a trigger, an AND gate, a buffer and other circuit units, and is used for ensuring that a write pulse arrives after a data clock, and the edges of the write pulse are staggered with the data clock so as to prevent burrs.

It will be appreciated that in the present embodiment, since the cache array 22 includes a plurality of latches, for example, the first cache unit 221, the second cache unit 222, and the third cache unit 223. Therefore, it is necessary to select which cache unit to read from or write to, i.e., to set a corresponding address decoder, according to the address. In addition, the cache array 22 may further include an address decode and select interface unit 224, since reading and writing may not be simultaneous, and in order to ensure that the above method may facilitate user testing. In this embodiment, the address decoding selection interface unit 224 may include at least three sets of address decoding selection interfaces, one set of address decoding selection interfaces is used for implementing a write function, one set of functional modules for implementing an abnormal rhythm processing trace back the buffered historical data function, and one set of functional modules for implementing a test read function.

It will be appreciated that in this embodiment, the register file 23 is configured to configure parameters such as window lengths (e.g., a first window length and a second window length) for detection, and a revolving door compression conversion error margin epsilon. Of course, the register file 23 may also store necessary processing calculation parameters, control commands, and the like.

It will be appreciated that in this embodiment, the control interface 24 may be a serial peripheral interface (Serial Peripheral Interface Bus, SPI) interface or other similar interface for enabling the data interaction between the ecg signal processing device 200 and the outside world. For example, the electrocardiosignal processing device 200 can be connected to a microcontroller through the control interface 24 to communicate with the microcontroller.

It will be appreciated that, in this embodiment, the data interface 25 may also be implemented by SPI interface logic or other interfaces, so as to implement data interaction between the electrocardiograph signal processing device 200 and the outside. For example, the electrocardiosignal processing device 200 can be electrically connected to a nonvolatile memory through the data interface 25 to realize data interaction with the nonvolatile memory. For example, when there is a marker bit of an abnormal peak, the data interface 25 may be triggered to write all of the cached electrocardiographic data to the non-volatile memory.

It can be understood that in this embodiment, the ECG abnormal rhythm detection method, the adaptive revolving door transformation method, and the hierarchical storage caching method in the electrocardiosignal processing method may be implemented by using a behavior-level code, or may be implemented in a single chip as an embedded algorithm module in a hardware system. After RTL hardware description language synthesis, the method can be realized on an FPGA hardware platform, and a special chip can be formed in a fully-customized digital ASIC (application specific integrated circuit) form, wherein the hardware cost is equivalent to O (Window). Wherein, O (Window) represents the same magnitude as the size of Window, and if Window is small, then O (Window) and Window are infinitesimal equivalents. In addition, window is a Window length for searching for points with a difference greater than kT, i.e., a section length of the first Window.

Fig. 8 and 9 are graphs showing the effect of the ECG signal abnormal rhythm detection by the electrocardiosignal processing method according to the present invention. Fig. 8 is a diagram showing a detection result of an ECG signal by the ECG abnormal rhythm detection method according to the present invention. Where the label "×" is the detected rhythm (peak). The label "." is the location where the abnormal rhythm occurs. Fig. 9 is a diagram showing an example of a test result of superimposing high-frequency dither noise on an ECG signal.

Fig. 10a and 10b are data diagrams before and after compression and decompression, respectively, using the adaptive revolving door transformation method of the present invention. Fig. 10a is a schematic diagram of an example of ECG data before compression. Fig. 10b is a schematic diagram illustrating an example of decompression of compressed data according to the compression method of the present invention. Obviously, after data localization (the electrocardiographic data are all integer numbers converted by a 12-bit ADC), a behavior-level algorithm code can be converted into an RTL hardware description language, and logic verification and simulation are performed.

It can be appreciated that in the present invention, the size of the cache unit may increase the slow storage according to the actual application requirement.

It will be appreciated that in the present invention, the length of the detection window or the search neighborhood may be dynamically adjusted according to whether there is a peak in the window, and not necessarily a fixed value.

It will be appreciated that in the present invention, the data buffered in the third level buffer is not limited to the peak difference and the time difference, but may also include other characteristic parameters of the electrocardiographic signal.

It will be appreciated that the present invention is not limited to the first stage and the second stage compression by the revolving door compression transformation method, and may be implemented by a method with low hardware cost.

It will be appreciated that the present invention is not limited to the operation of unsigned integer data, but may also operate on or process other types of data, such as signed integer data, floating point numbers, etc., as required by different precision requirements.

It can be understood that in the present invention, the electrocardiosignal processing method and apparatus can be applied to detection of other human body signals needing long-term observation, i.e. detection of rhythm information is not necessarily performed by changing configuration parameters and the like. Similarly, the electrocardiosignal processing method and the electrocardiosignal processing device can be applied to clinical researches and the like of ECG signal monitoring of other animals.

Obviously, the electrocardiosignal processing method and the electrocardiosignal processing device adopt a gradient detection mode based on a dynamic threshold value, and according to the principle that the first derivative of the electrocardiosignal is extremely large near a peak value, one determination proportion of an initial peak value is used as an initial threshold value T, and the threshold value is automatically updated according to the peak value detected in a fixed window. And then according to the detected peak point sequence and the same principle, judging the position of the abnormal peak value. In a hardware implementation, there will be only comparison, addition, multiplication, and shift operations. In addition, in order to process the influence of high-frequency jitter noise, the electrocardiosignal processing method and device downsamples the input digital signal stream, takes the median as the differential derivative true value of the electrocardiosignal, and only comparison, addition and shift operation are carried out in hardware implementation, so that the hardware cost is low, and the power consumption is greatly saved. Thirdly, the electrocardiosignal processing method and device adopt a three-level circulation buffer structure to buffer electrocardiosignal data so as to store the data for a period of time before abnormality occurs in time during alarm. The buffer structure can compress the first-level buffer data into a second-level buffer and compress the peak value data output by the rhythm detection method into a third-level buffer. In addition, the electrocardiosignal processing method and device adopt an improved revolving door compression method to compress, the error margin of the revolving door compression conversion is dynamically and adaptively adjusted according to whether the electrocardiosignal has a peak value and the change of the peak value difference value, and the error margin parameter is cached in a configuration register, so that a caching unit used by a caching structure can be greatly reduced compared with the traditional point-by-point caching strategy, and the power consumption of electrocardiosignal processing is greatly reduced.

In summary, compared with the prior art, the electrocardiosignal processing method and device have at least the following advantages:

4. The improved revolving door compression method can greatly compress the storage scale, has extremely low hardware cost, further reduces the area and electric leakage of the system, transfers the data decompression part of signal processing to a mobile terminal with low power consumption requirement, and is more beneficial to realizing the requirements of long-term, continuous and uninterrupted medical monitoring application.

In summary, although the preferred embodiments of the present invention have been disclosed for illustrative purposes, the present invention is not limited to the embodiments described above, and various modifications and applications can be made by those skilled in the relevant art without departing from the scope of the basic technical idea of the present invention.

Claims

1. An electrocardiosignal processing method is characterized in that: the electrocardiosignal processing method at least comprises an ECG abnormal rhythm detection method, and the ECG abnormal rhythm detection method comprises the following steps:

(a1) Obtaining gradients point by point for the electrocardiosignal flow;

(a2) Taking the maximum value of the first M gradients as a threshold value;

(a8) Obtaining a peak point sequence according to the steps (a 2) to (a 7), and determining an abnormal peak value according to the time interval of the adjacent peak values in the peak point sequence.

2. The method for processing an electrocardiograph signal according to claim 1, wherein: the step (a 1) further comprises:

and downsampling the electrocardiosignal stream into a plurality of sequences in equal step length, solving gradients of data points in each sequence, and obtaining the median of the gradients of the corresponding positions of each sequence to form a median sequence.

3. The method for processing an electrocardiograph signal according to claim 1, wherein: the electrocardiosignal processing method further comprises a hierarchical storage caching method, and the hierarchical storage caching method comprises the following steps:

(b0) Performing first-level cache on the electrocardiosignal stream;

(b1) Performing first-level compression on the data of the first-level cache and then performing second-level cache; and

(b2) And extracting key characteristic points from peak information detected by the ECG abnormal rhythm detection method, performing secondary compression on the key characteristic points, and performing third-level cache, wherein the peak information comprises a peak sequence number, a peak size and a peak interval, and the key characteristic points comprise peaks and moments when the peaks appear.

4. An electrocardiosignal processing device is characterized in that: the electrocardiosignal processing device at least comprises an ECG abnormal rhythm detection module, wherein the ECG abnormal rhythm detection module comprises a gradient solving unit, a peak detection unit and an abnormal peak detection unit, the gradient solving unit is used for solving the gradient of an electrocardiosignal flow point by point, the peak detection unit is used for detecting peaks according to the steps (a 2) to (a 7) in the claim 1 so as to obtain a peak point sequence, and the abnormal peak detection unit is used for judging abnormal peaks according to the time intervals of adjacent peaks in the peak point sequence.

5. The electrocardiosignal processing apparatus of claim 4 wherein: the ECG abnormal rhythm detection module further comprises a downsampling unit, wherein the downsampling unit is used for downsampling the electrocardiosignal stream into a plurality of paths of sequences in equal step length, then solving gradients of data points in each path of sequences, acquiring the median of the gradients of the corresponding positions of each path of sequences to form a median sequence, and then outputting the median sequence to the peak detection unit for peak detection.

6. The electrocardiosignal processing apparatus of claim 4 wherein: the electrocardiosignal processing device further comprises a cache array, the cache array at least comprises a first cache unit, a second cache unit and a third cache unit, the first cache unit is used for carrying out first-level cache on the electrocardiosignal stream, the second cache unit is used for carrying out second-level cache after carrying out first-level compression on data of the first-level cache, the third cache unit is used for extracting key feature points from peak information of the peak detection unit and carrying out second-level cache on the key feature points after carrying out second-level compression, wherein the peak information comprises peak sequence numbers, peak sizes and peak intervals, and the key feature points comprise peaks and time when the peaks appear.

7. The electrocardiosignal processing apparatus of claim 6 wherein: the first level buffer reflects the instantaneous change of the ECG signal, the second level buffer reflects the morphological change of the ECG signal in a period of time, and the third level buffer reflects the change trend of the rhythm information of the ECG signal in a longer period of time.

8. The electrocardiosignal processing apparatus of claim 6 wherein: the primary compression and the secondary compression are both compressed by adopting a revolving door compression conversion method.

9. The electrocardiosignal processing apparatus of claim 8 wherein: for the first-stage compression, after the threshold value is initially updated, an ECG rhythm period is saved, when a peak value mark appears, a quarter heart rate period is pushed backwards, a data point in the period is subjected to revolving door compression by adopting a smaller error margin, after the quarter heart rate period, the data point is subjected to revolving door compression by adopting a larger error margin, after the half heart rate period, the smaller error margin is recovered to be subjected to revolving door compression, the data point lasts for the quarter heart rate period, the smaller data point is smaller than twenty times of the maximum amplitude of a signal, and the larger data point is larger than one tenth of the maximum amplitude of the signal; for the two-stage compression, a register parameter threshold N is set, the error margin of the peak difference is reduced when the absolute value of the peak difference is smaller than the error margin for more than N periods, and the error margin of the time difference is reduced when the absolute value of the time difference is smaller than the error margin for more than N periods.

10. The electrocardiosignal processing apparatus of claim 6 wherein: the electrocardiosignal processing device further comprises a register file, a control interface and a data interface, wherein the register file is used for storing control commands, the control interface and the data interface are respectively used for realizing data interaction between the electrocardiosignal processing device and the outside, and when a mark bit of an abnormal peak exists, the data interface is triggered so as to write all cached electrocardiosignal data into a nonvolatile memory.