CN111556559B - Hybrid clock synchronization method based on timestamp-free interaction and one-way message propagation - Google Patents

Hybrid clock synchronization method based on timestamp-free interaction and one-way message propagation Download PDF

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CN111556559B
CN111556559B CN202010388739.XA CN202010388739A CN111556559B CN 111556559 B CN111556559 B CN 111556559B CN 202010388739 A CN202010388739 A CN 202010388739A CN 111556559 B CN111556559 B CN 111556559B
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CN111556559A (en
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王恒
余斐
彭政岑
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Chongqing University of Post and Telecommunications
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H04W56/001—Synchronization between nodes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0658—Clock or time synchronisation among packet nodes
    • H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0682—Clock or time synchronisation in a network by delay compensation, e.g. by compensation of propagation delay or variations thereof, by ranging
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H04W56/0035—Synchronisation arrangements detecting errors in frequency or phase
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H04W56/004—Synchronisation arrangements compensating for timing error of reception due to propagation delay

Abstract

The invention relates to a hybrid clock synchronization method based on timestamp-free interaction and one-way message propagation, and belongs to the technical field of wireless sensor networks. The method can be executed simultaneously with a broadcasting mechanism according to a one-way message transmission synchronization mode, the timestamp-free interactive synchronization can implicitly acquire synchronization information in a network data stream, and the method jointly designs and optimizes the timestamp-free interactive synchronization mechanism and the one-way message transmission mechanism, so that the time synchronization function and an actual wireless sensor network are seamlessly integrated. The invention can realize the joint estimation of clock frequency offset, phase offset and fixed time delay without special synchronous message transmission, effectively reduce the synchronous communication overhead of nodes and improve the estimation performance of clock phase offset.

Description

Hybrid clock synchronization method based on timestamp-free interaction and one-way message propagation
Technical Field
The invention belongs to the technical field of wireless sensor networks, and relates to a hybrid clock synchronization method based on timestamp-free interaction and one-way message propagation.
Background
From the viewpoint of statistical signal processing, the time synchronization problem in the wireless sensor network can be regarded as a parameter estimation problem for clock frequency offset and clock phase offset. However, if only the acquisition of the clock phase offset parameter is concerned and the clock frequency offset is not estimated, the existence of the clock frequency offset may cause the node clock to deviate again, and the clock deviation may accumulate continuously, even affect the life cycle of the sensor network. In order to maintain the synchronization precision between the nodes, the resynchronization operation must be performed periodically, but the frequent synchronization process causes a large energy consumption to the network. On the other hand, if only the estimation of the clock frequency offset parameter is considered, and the clock phase offset is not compensated, there is always an initial offset between the node clocks. Therefore, to achieve time synchronization between nodes, the clock frequency offset parameter and the clock phase offset parameter must be jointly estimated and corrected at the same time.
Timestamp-free interactive synchronization mechanisms have attracted attention in recent years because synchronization information can be acquired implicitly in the network data stream. However, the existing timestamp-free interactive synchronization protocol based on the linear clock model only estimates the clock frequency offset of the sensor node and the fixed time delay of data packet transmission. If the clock synchronization between the nodes is to be really realized, other modes are also needed to compensate the phase deviation of the node clock. Although the one-way message transmission synchronization method can be executed in parallel with a broadcasting mechanism, the clock phase offset and the fixed time delay of data packet transmission cannot be accurately distinguished because only one-way synchronous message interaction is carried out.
The invention aims to jointly optimize a timestamp interaction-free synchronization mechanism and a one-way message transmission mechanism, invents a hybrid clock synchronization method capable of seamlessly integrating with the existing network protocol, can simultaneously estimate three parameters of clock frequency offset, fixed time delay and clock phase offset without special additional synchronous communication overhead, and realizes time synchronization among nodes.
Disclosure of Invention
In view of the above, an object of the present invention is to provide a hybrid clock synchronization method based on timestamp-free interaction and one-way message propagation, so that a slave node can achieve time synchronization with respect to a master node only by using network data streams and broadcast frames between the slave node and the master node.
In order to achieve the purpose, the invention provides the following technical scheme:
a mixed clock synchronization method based on timestamp-free interaction and one-way message propagation integrates a timestamp-free interaction synchronization mechanism and a one-way message propagation mechanism, and estimates clock frequency offset, clock phase offset and fixed time delay by using a maximum likelihood estimation method to realize clock synchronization between nodes. The method integrates the time synchronization function into the existing network transmission, and does not need to construct a special data packet to transmit the synchronization information.
Further, the timestamp-free interaction synchronization mechanism specifically includes the following steps:
s11: in the ith communication cycle, the slave node S is at the local time
Figure BDA0002484863930000021
Sending a common data packet to the master node M, wherein the data packet does not contain any timestamp information;
s12: after the master node M successfully receives the data packet sent by the slave node S, the master node M waits for a fixed time interval delta and then replies a response message, and the slave node S records the arrival time of the response message
Figure BDA0002484863930000022
Based on a linear clock model, the round-trip time interval of one data transmission is calculated as follows:
Figure BDA0002484863930000023
wherein the content of the first and second substances,
Figure BDA0002484863930000024
which represents the relative clock frequency offset between the slave node S and the master node M, delta represents the fixed time delay incurred during the transmission of the radio channel,
Figure BDA0002484863930000025
for the random time delay incurred in the link from node S to master node M,
Figure BDA0002484863930000026
is the random time delay generated in the link from the master node M to the slave node S.
Further, the one-way message propagation mechanism specifically includes the following steps:
b21: in the jth communication period, the master node M is at the local time
Figure BDA0002484863930000027
Sending a synchronization message to the slave node S, the synchronization message containing the sending time of the master node M
Figure BDA0002484863930000028
B22: after the slave node S successfully receives the message, the arrival time of the synchronous message is recorded
Figure BDA0002484863930000029
According to the linear clock model, the one-way transmission process of the synchronous message between the node M and the node S is represented as follows:
Figure BDA00024848639300000210
wherein phi is(SM)Representing the initial clock phase offset between the slave node S and the master node M,
Figure BDA00024848639300000211
is the random time delay experienced by the one-way synchronization message during the link transmission.
Further, the clock frequency offset and the clock phase are estimatedThe bit offset and the fixed time delay specifically include: according to a series of time stamps acquired locally from the node S
Figure BDA00024848639300000212
Wherein N is1Representing the number of time-stamp-free interaction executions, N2Representing the number of times of execution of one-way message propagation, deriving an estimated value of clock frequency offset using a maximum likelihood estimation method
Figure BDA00024848639300000213
Clock phase offset estimation
Figure BDA00024848639300000214
And fixed delay estimate
Figure BDA00024848639300000215
The calculation formula is as follows:
Figure BDA00024848639300000216
Figure BDA00024848639300000217
Figure BDA0002484863930000031
Figure BDA0002484863930000032
wherein the content of the first and second substances,
Figure BDA0002484863930000033
[X]krepresenting the kth element in vector X.
The invention has the beneficial effects that: the invention carries out joint optimization on a timestamp-free interaction synchronization mechanism and a one-way message transmission mechanism, and because the timestamp-free interaction is easy to be embedded into the existing network data stream and the one-way message transmission is suitable to be realized in a broadcast mechanism, the method of the invention is easy to be integrated with an actual wireless sensor network, and can realize node synchronization without additional communication overhead. In addition, the invention can simultaneously estimate clock frequency offset, clock phase offset and fixed time delay under the condition of unknown and nonzero data packet transmission fixed time delay, makes up the defects of a timestamp interaction-free synchronization mechanism and a one-way message propagation mechanism, and can further improve the clock phase offset estimation performance by effectively estimating the fixed time delay.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objectives and other advantages of the invention may be realized and attained by the means of the instrumentalities and combinations particularly pointed out hereinafter.
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For the purposes of promoting a better understanding of the objects, aspects and advantages of the invention, reference will now be made to the following detailed description taken in conjunction with the accompanying drawings in which:
FIG. 1 is a schematic diagram of a hybrid synchronous model of the present invention;
FIG. 2 is a flow chart of a hybrid clock synchronization method according to an embodiment of the present invention;
FIG. 3 is a graph comparing clock phase offset estimation performance with CRLB according to an embodiment of the present invention;
FIG. 4 is a graph comparing the performance of clock frequency offset estimation with CRLB according to the embodiment of the present invention.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention in a schematic way, and the features in the following embodiments and examples may be combined with each other without conflict.
Referring to fig. 1 to 4, fig. 1 is a schematic diagram of a hybrid synchronization model according to an embodiment of the present invention, wherein a left dotted box is a timestamp interaction free process, and a right box is a broadcast frame or a beacon frame transmitted in one direction. As shown in the left dashed box of fig. 1, in the ith communication cycle, the slave node S is first at its local time
Figure BDA0002484863930000041
And sending a common data packet to the master node M, wherein the data packet does not contain any time stamp information. After the master node M successfully receives the data packet sent by the slave node S, the master node M waits for a fixed time interval delta and then replies a response message, and the slave node S records the arrival time of the response message
Figure BDA0002484863930000042
Based on a linear clock model, the communication process of sending a data packet by the slave node S and replying a response message by the master node M is expressed by a mathematical formula as follows:
Figure BDA0002484863930000043
Figure BDA0002484863930000044
wherein phi is(SM)And
Figure BDA0002484863930000045
respectively, an initial clock phase offset and a frequency offset between the slave node S and the master node M, delta a fixed time delay generated during the transmission of the radio channel,
Figure BDA0002484863930000046
for the random time delay incurred in the link from node S to master node M,
Figure BDA0002484863930000047
is the random time delay generated in the link from the master node M to the slave node S.
Subtracting equation (1) from equation (2) yields a round trip time interval of one data transmission of
Figure BDA0002484863930000048
Further, as shown on the right side of FIG. 1, in the j-th communication cycle, the master node M is at
Figure BDA0002484863930000049
Sending a synchronization message to the slave node S at a time, the synchronization message containing the sending time of the node M
Figure BDA00024848639300000410
After the slave node S successfully receives the message, the arrival time of the synchronous message is recorded
Figure BDA00024848639300000411
The one-way transmission process of the synchronization message between the node M and the node S can be expressed as
Figure BDA00024848639300000412
Wherein the content of the first and second substances,
Figure BDA00024848639300000413
is the random time delay experienced by the one-way synchronization message during the link transmission.
Multiplying both sides of equation (4) by
Figure BDA00024848639300000414
To obtain
Figure BDA00024848639300000415
So that
Figure BDA00024848639300000416
It is assumed that in the hybrid clock synchronization method shown in fig. 1, N is performed separately without timestamp interaction and one-way message propagation1Sub sum N2Next, the process is carried out. Thus, node S may obtain a series of observations
Figure BDA00024848639300000417
From these observations, equations (3) and (5) can be written in matrix form as follows
Figure BDA0002484863930000051
Wherein the content of the first and second substances,
Figure BDA0002484863930000052
deriving an estimate of clock frequency offset using a maximum likelihood estimation method
Figure BDA0002484863930000053
Clock phase offset estimation
Figure BDA0002484863930000054
And fixed delay estimate
Figure BDA0002484863930000055
The calculation formula is as follows:
Figure BDA0002484863930000056
Figure BDA0002484863930000057
Figure BDA0002484863930000058
Figure BDA0002484863930000059
wherein the content of the first and second substances,
Figure BDA00024848639300000510
[X]krepresenting the kth element in vector X.
To evaluate the performance of the hybrid estimator, a maximum likelihood estimator can be derived
Figure BDA00024848639300000511
And
Figure BDA00024848639300000512
the Lower limit of Cramer-Rao Lower Bound (CRLB) is as follows:
Figure BDA00024848639300000513
Figure BDA0002484863930000061
Figure BDA0002484863930000062
wherein, it is made
Figure BDA0002484863930000063
Fig. 2 is a flowchart of a hybrid clock synchronization method according to an embodiment of the present invention. The embodiment provides a clock phase offset and frequency offset estimation method based on a timestamp-free interaction mechanism and a one-way message propagation mechanism, as shown in fig. 2, the method specifically includes the following steps:
c1: the synchronization process begins.
C2: at local time from node S
Figure BDA0002484863930000064
A normal data packet is sent to the master node M.
C3: after the host node M successfully receives the data packet, it waits for a fixed time interval Δ and then replies with an ACK.
C4: the slave node S records an ACK arrival time of
Figure BDA0002484863930000065
C5-C7: judging whether the number of the timestamp-free interaction cycles reaches a set value N1If the message reaches the main node M, starting to perform the one-way message transmission process, and enabling the main node M to be at
Figure BDA0002484863930000066
Sending a synchronization message to the node S at any time, wherein the synchronization message comprises the sending time of the node M
Figure BDA0002484863930000067
Otherwise, if i is equal to i +1, the process proceeds to the flow C2 to continue the timestamp interaction exempting process.
C8: after the slave node S successfully receives the message, the arrival time of the synchronous message is recorded
Figure BDA0002484863930000068
C9-C11: judging whether the one-way message propagation period number reaches a set value N2If the clock phase offset and the frequency offset of the slave node S relative to the master node M are reached, estimating the clock phase offset and the frequency offset of the slave node S relative to the master node M; otherwise, j equals j +1, and the flow C7 is entered to continue the one-way message propagation process.
C12: the synchronization process ends by correcting the clock based on the estimated clock phase offset and frequency offset.
Fig. 3 presents a graph comparing the performance of clock phase offset estimation with CRLB. As can be seen from FIG. 3, the maximum likelihood estimator
Figure BDA0002484863930000069
The mean square error curve of (A) is completely coincided with the lower limit of CRLB, and the size of the curve is along with the observation times N2Gradually towards 0, indicating that the clock phase offset estimator of the present invention is effective. Fig. 4 presents a graph of the performance of the clock frequency offset estimation versus CRLB. The results also show that the clock frequency offset estimator of the present invention is also effective.
Finally, the above embodiments are only intended to illustrate the technical solutions of the present invention and not to limit the present invention, and although the present invention has been described in detail with reference to the preferred embodiments, it will be understood by those skilled in the art that modifications or equivalent substitutions may be made on the technical solutions of the present invention without departing from the spirit and scope of the technical solutions, and all of them should be covered by the claims of the present invention.

Claims (1)

1. A mixed clock synchronization method based on timestamp-free interaction and one-way message propagation is characterized in that the method performs joint optimization on a timestamp-free interaction synchronization mechanism and a one-way message propagation mechanism, integrates a time synchronization function into the existing network transmission, and estimates clock frequency offset, clock phase offset and fixed time delay by using a maximum likelihood estimation method to realize clock synchronization between nodes;
the timestamp-free interaction synchronization mechanism specifically comprises the following steps:
s11: in the ith communication cycle, the slave node S is at the local time
Figure FDA0003310417530000011
Sending a common data packet to the master node M, wherein the data packet does not contain any timestamp information;
s12: after the master node M successfully receives the data packet sent by the slave node S, the master node M waits for a fixed time interval delta and then replies a response message, and the slave node S records the arrival time of the response message
Figure FDA0003310417530000012
Calculating to obtain a data transmission based on a linear clock modelThe round trip time interval is:
Figure FDA0003310417530000013
wherein the content of the first and second substances,
Figure FDA0003310417530000014
which represents the relative clock frequency offset between the slave node S and the master node M, delta represents the fixed time delay incurred during the transmission of the radio channel,
Figure FDA0003310417530000015
for the random time delay incurred in the link from node S to master node M,
Figure FDA0003310417530000016
random time delay generated in a link from a master node M to a slave node S;
the one-way message propagation mechanism specifically comprises the following steps:
b21: in the jth communication period, the master node M is at the local time
Figure FDA0003310417530000017
Sending a synchronization message to the slave node S, the synchronization message containing the sending time of the master node M
Figure FDA0003310417530000018
B22: after the slave node S successfully receives the message, the arrival time of the synchronous message is recorded
Figure FDA0003310417530000019
According to the linear clock model, the one-way transmission process of the synchronous message between the node M and the node S is represented as follows:
Figure FDA00033104175300000110
wherein phi is(SM)Representing the initial clock phase offset between the slave node S and the master node M,
Figure FDA00033104175300000111
random time delay experienced by the unidirectional synchronous message in the link transmission process;
estimating clock frequency offset, clock phase offset and fixed time delay, specifically comprising: according to a series of time stamps acquired locally from the node S
Figure FDA00033104175300000112
Wherein N is1Representing the number of time-stamp-free interaction executions, N2Representing the number of times of execution of one-way message propagation, deriving an estimated value of clock frequency offset using a maximum likelihood estimation method
Figure FDA00033104175300000113
Clock phase offset estimation
Figure FDA00033104175300000114
And fixed delay estimate
Figure FDA00033104175300000115
The calculation formula is as follows:
Figure FDA00033104175300000116
Figure FDA0003310417530000021
Figure FDA0003310417530000022
Figure FDA0003310417530000023
wherein the content of the first and second substances,
Figure FDA0003310417530000024
[X]krepresenting the kth element in vector X.
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