CN111552201A

CN111552201A - Model processor in-loop test method, device, equipment and medium

Info

Publication number: CN111552201A
Application number: CN202010344655.6A
Authority: CN
Inventors: 毛善坤
Original assignee: Nanjing Tacking Automobile Electronic Co ltd
Current assignee: Nanjing Tacking Automobile Electronic Co ltd
Priority date: 2020-04-27
Filing date: 2020-04-27
Publication date: 2020-08-18

Abstract

The application belongs to the technical field of testing, and particularly relates to a method, a device, equipment and a medium for testing a processor of a model in a loop. The method comprises the following steps: creating a first system test project to build an embedded system model and generate a target program which can be run by a target machine; creating a second system test project to build a test link model, wherein the test link model is used for acquiring and synchronously uploading real-time test data to the embedded system model; synchronously operating the first system test project and the second system test project based on test cases, and carrying out simulation test on the embedded system model to obtain simulation data with the same type as the test data; and stopping the test when the difference value of the simulation data and the test data of the same type accords with a preset test precision range. The test flexibility and the response speed are improved, and the test cost is reduced.

Description

Model processor in-loop test method, device, equipment and medium

Technical Field

The invention belongs to the technical field of testing, and particularly relates to an in-loop testing method, device, equipment and medium for a processor of a model.

Background

With the rapid development of the embedded intelligent control product, the testing efficiency of the embedded intelligent control model becomes one of the important factors influencing the development cycle of the embedded intelligent control product. Moreover, Model Based Design (MBD) has gradually become the mainstream development mode of control system design, and especially in the automotive electronics industry, MBD development capability is the basic requirement of the host computer factory on the technical capability of the automobile part manufacturer. Processor In Loop (PIL) testing is an important Loop In MBD development flow.

However, the technical difficulty in building a test platform for a loop test of a processor is high, and a host factory and a component manufacturer in the industry generally adopt a test scheme provided by a professional company. Although the testing function of the PIL testing software provided by professional companies is relatively perfect, the software price and the service cost are higher, and great economic pressure is brought to component manufacturers. In addition, if the PIL test software needs to be customized and developed according to a specific target processor, the customization period is long, additional charges are needed, and the test efficiency is seriously affected.

Disclosure of Invention

In view of the above, there is a need to provide a method, an apparatus, a device and a medium for testing a processor in a ring, which can achieve the same testing effect with less cost, more flexible testing and faster response speed.

A first aspect of the present application provides a processor-in-loop test method for a model, comprising:

creating a first system test project to build an embedded system model and generate a target program which can be run by a target machine, wherein the target machine executes a preset function and generates test data of a preset type when running the target program;

creating a second system test project to build a test link model, wherein the test link model is used for acquiring real-time test data of the target program operated by the target machine and synchronously uploading the real-time test data to the embedded system model;

synchronously operating the first system test project and the second system test project based on test cases, and carrying out simulation test on the embedded system model to obtain simulation data with the same type as the test data;

and stopping the test when the difference value of the simulation data and the test data of the same type accords with a preset test precision range.

In the loop test method for the processor of the model in the above embodiment, first, a first system test project may be created in a simulation test environment to build an embedded system model, so as to generate a target program that a target machine may run, so that the target machine executes a preset function and generates a preset type of test data when running the target program. And then creating a second system test project in another simulation test environment to build a test link model, wherein the purpose is to upload the actual operation result of the target machine to the embedded system model loaded in the first system test project. And then, synchronously operating the first system test project and the second system test project based on test cases, and respectively testing the embedded system model and the target machine simultaneously to acquire the same type of simulation data and test data. Comparing the simulation data with the test data, when the difference value of the simulation data and the test data accords with a preset test precision range, indicating that the test result accords with the requirement, and stopping the test. Because the first system test engineering used for loading the test link model can be established based on a common simulation environment, the second system test engineering used for loading the test link model can be established based on another common simulation environment, then the actual operation result of the target machine is uploaded to the embedded system model loaded in the first system test engineering through the test link model, the synchronous closed-loop operation control of the simulation model and the actual measurement target machine is realized, and the simulation data and the test data are compared in the simulation model, the in-loop test method of the processor under the cross environment is provided, and because the simulation test and the actual test of the target machine are synchronously operated, the flexibility and the response speed of the test are improved, and the test cost is reduced.

In one embodiment, the creating a first system test project to build an embedded system model and generate an object program which can be run by an object machine includes:

and creating a first system test project in a visual simulation tool Simulink of MATLAB, and establishing the embedded system model in a graphical form.

In the processor-in-loop test method of the model in the above embodiment, the embedded system model is established in a graphical form in a Simulink of a MATLAB visualization simulation tool, so that the difficulty in establishing the embedded system model is reduced, and the simulation cost is saved.

In one embodiment, the graphically modeling the embedded system model includes:

adding a signal output module of a database and a signal input module of the database into the embedded system model, and respectively establishing signal connection between the signal output module and the signal input module and the embedded system model;

establishing the correlation between the output signal of the target machine and the signal input module; and

and establishing the correlation between the receiving signal of the target machine and the signal output module.

In the ring testing method for the processor of the model in the above embodiment, the signal output module of the database and the signal input module of the database are continuously added to the embedded system model in the Simulink of the MATLAB, and the signal connection between the signal output module and the signal input module and the embedded system model is respectively established. Then, the correlation between the output signal of the target machine and the signal input module and the correlation between the target machine receiving signal and the signal output module are respectively established, and the signal correlation between the embedded system model and the target machine is realized by simple operation.

In one embodiment, the generating the target program executable by the target machine comprises:

and compiling the code automatically generated based on MATLAB \ Simulink into the target program through a compiler.

In the processor-in-loop test method of the model in the above embodiment, the code automatically generated based on MATLAB \ Simulink is compiled into the target program through the compiler, which improves the flexibility and cheapness of establishing an embedded system model and performing a simulation test.

In one embodiment, after the generating the target program executable by the target machine, the method includes:

and downloading the target program to the embedded system model.

In the above embodiment of the ring test method for the processor of the model, the code automatically generated based on MATLAB \ Simulink is compiled into the target program and downloaded to the target machine, so as to test the feasibility and the operation effect of the model design program by testing the actual operation effect of the target machine.

In one embodiment, the creating a second system test project to build a test link model includes:

creating a second system test project based on the CANoe simulation environment to build a test link model;

compiling a network database file in a DBC format in a CANoeCANDb + + editing environment, and importing the network database file into the second system test project;

and adding a node in the test link model, and associating the embedded system model with the simulation node in the network database file through the node.

In the processor-in-loop test method of the model in the above embodiment, a second system test project is created in a common CANoe simulation environment, a test link model is loaded, information association between the test link model and an embedded system model in the first system test project is established, and an information transmission path through which a target machine transmits information to the embedded system model via the test link model is further established, so as to implement in-loop test of the processor of the model.

and connecting a controller local area network interface of the target machine with the test link model through a controller local area network signal line, wherein the controller local area network signal line is output by a CANCase XL (controller area network) of a CANoe peripheral device.

In the method for testing the ring of the processor of the model in the embodiment, the information transmission channel between the target machine and the test link model is directly established in the CANoe simulation environment, so that the difficulty of establishing the ring test platform of the processor of the model is reduced, and the cost is effectively reduced.

In one embodiment, the synchronously running the first system test engineering and the second system test engineering based on the test cases includes:

and controlling the first system test project and the second system test project to run synchronously based on the scheduling information and the handshake signals.

In the processor-in-loop test method of the model in the above embodiment, the synchronization of the operation of the first system test project and the second system test project is controlled by using the scheduling information of the control system and setting the handshake signal, so that the synchronization of the operation of the embedded system model, the test link model and the target machine is ensured, the real-time performance and the flexibility of the processor-in-loop test of the model are ensured, and the cost of the processor-in-loop test of the model is effectively reduced.

A second aspect of the present application provides a processor-in-loop test apparatus for a model, comprising:

the system comprises a first system test project creating module, a first data processing module and a second data processing module, wherein the first system test project creating module is used for creating a first system test project so as to build an embedded system model and generate a target program which can be run by a target machine, and the target machine executes a preset function and generates preset type test data when running the target program;

the second system test engineering creating module is used for creating a second system test engineering to build a test link model, and the test link model is used for acquiring real-time test data of the target machine for running the target program and synchronously uploading the real-time test data to the embedded system model;

the system test engineering operation module is used for synchronously operating the first system test engineering and the second system test engineering based on test cases, and respectively testing the embedded system model and the target machine simultaneously so as to obtain simulation data and test data of the same type;

and the in-loop test module is used for stopping the test when the difference value between the simulation data and the test data of the same type accords with a preset test precision range.

In the above embodiment, in the ring test apparatus for a processor of a model, first a first system test project may be created in a simulation test environment by using a first system test project creation module to create an embedded system model, so as to generate a target program that a target machine may run, so that the target machine executes a preset function and generates a preset type of test data when running the target program. And secondly, creating a second system test project in another simulation test environment by using a second system test project creating module to build a test link model, and uploading the actual operation result of the target machine to an embedded system model loaded in the first system test project. And then, synchronously operating the first system test project and the second system test project by using a system test project operation module based on a test case, and simultaneously testing the embedded system model and the target machine respectively to obtain the same type of simulation data and test data. Comparing the simulation data with the test data by the in-loop test module, and when the difference value between the simulation data and the test data meets a preset test precision range, indicating that the test result meets the requirement, and stopping the test. The device can establish a first system test project for loading a test link model based on a common simulation environment, establish a second system test project for loading the test link model based on another common simulation environment, upload an actual operation result of a target machine to an embedded system model loaded in the first system test project through the test link model, realize synchronous closed-loop operation control of the simulation model and an actual measurement target machine, and compare the simulation data with the test data in the simulation model.

In one embodiment, the system test engineering operation module includes:

and the synchronous control module is used for controlling the first system test project and the second system test project to run synchronously based on the scheduling information and the handshake signals.

In the above embodiment, the synchronous control module is arranged in the in-loop testing device for the processor of the model, and the synchronization of the operation of the first system test project and the second system test project is controlled by using the scheduling information of the control system and setting the handshake signal, so that the synchronization of the operation of the embedded system model, the test link model and the target machine is ensured, the real-time performance and the flexibility of the in-loop testing of the processor of the model are ensured, and the in-loop testing cost of the processor of the model is effectively reduced.

A third aspect of the present application provides a computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of the method described in any of the embodiments of the present application when executing the computer program.

A fourth aspect of the present application provides a computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method described in any of the embodiments of the present application.

In the computer device or the computer-readable storage medium in the above embodiments, first, a first system test project may be created in a simulation test environment to build an embedded system model, so as to generate a target program that a target machine can run, so that the target machine executes a preset function and generates a preset type of test data when running the target program. And then creating a second system test project in another simulation test environment to build a test link model, wherein the purpose is to upload the actual operation result of the target machine to the embedded system model loaded in the first system test project. And then, synchronously operating the first system test project and the second system test project based on test cases, and respectively testing the embedded system model and the target machine simultaneously to acquire the same type of simulation data and test data. Comparing the simulation data with the test data, when the difference value of the simulation data and the test data accords with a preset test precision range, indicating that the test result accords with the requirement, and stopping the test. Because the first system test engineering used for loading the test link model can be established based on a common simulation environment, the second system test engineering used for loading the test link model can be established based on another common simulation environment, then the actual operation result of the target machine is uploaded to the embedded system model loaded in the first system test engineering through the test link model, the synchronous closed-loop operation control of the simulation model and the actual measurement target machine is realized, and the simulation data and the test data are compared in the simulation model, the in-loop test method of the processor under the cross environment is provided, and because the simulation test and the actual test of the target machine are synchronously operated, the flexibility and the response speed of the test are improved, and the test cost is reduced.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain drawings of other embodiments based on these drawings without any creative effort.

Fig. 1 is a schematic flowchart of a processor-in-loop testing method for a model provided in a first embodiment of the present application.

Fig. 2 is a flowchart illustrating an in-loop testing method for a processor of a model according to a second embodiment of the present application.

Fig. 3 is a flowchart illustrating an in-loop testing method for a processor of a model according to a third embodiment of the present application.

Fig. 4 is a flowchart illustrating an in-loop testing method for a processor of a model according to a fourth embodiment of the present application.

Fig. 5 is a flowchart illustrating an in-loop testing method for a processor of a model according to a fifth embodiment of the present application.

Fig. 6 is a block diagram of a processor-in-loop test apparatus of a model provided in a sixth embodiment of the present application.

Fig. 7 is a block diagram of a processor-in-loop test apparatus of a model provided in a seventh embodiment of the present application.

Fig. 8 is a block diagram of a processor-in-loop test apparatus of a model provided in an eighth embodiment of the present application.

Fig. 9 is a block diagram of a processor-in-loop test apparatus of a model provided in a ninth embodiment of the present application.

Fig. 10 is a block diagram of a processor-in-loop test apparatus according to a model provided in a tenth embodiment of the present application.

Fig. 11 is an internal structural diagram of a computer device provided in an embodiment of the present application.

Detailed Description

To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present application are illustrated in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

Where the terms "comprising," "having," and "including" are used herein, another component or method can be added unless an explicit limitation is used, such as "only," "consisting of … …," etc. Unless mentioned to the contrary, terms in the singular may include the plural and are not to be construed as being one in number.

CANoe is a development software produced by Vector information (abbreviated as Vector) in germany, and is mainly used for a Controller Area Network (CAN) network of a host factory and an on-board computer (ECU) supplier, or development, analysis, simulation, test and diagnosis of a CAN-related ECU. The method comprises the steps of establishing a system test project in a CANoe simulation environment to establish and load a target machine with a program, and acquiring actual operation data of the target machine of a preset type in the established system test project to monitor the actual operation condition of the target machine in real time.

As shown in fig. 1, in a processor-in-loop testing method of a model provided in an embodiment of the present application, the method includes the steps of:

step 202, a first system test project is created to build an embedded system model and generate a target program which can be run by a target machine, and the target machine executes a preset function and generates preset type test data when running the target program.

Illustratively, a first system test project can be created in an MATLAB simulation environment, an embedded system model is built, and an object program which can be run by an object machine is generated, wherein the object machine executes a preset function and generates a preset type of test data when the object program is run. Because the module library in the MATLAB simulation environment comprises a large number of functional modules which can be used by a user, the user can directly load the existing functional modules in the created system engineering and edit the functional modules according to the built embedded system model, so that the embedded system model is built quickly in a graphical mode, time and labor are saved, and the cost is low.

And 204, creating a second system test project to build a test link model, wherein the test link model is used for acquiring real-time test data of the target machine running the target program and synchronously uploading the real-time test data to the embedded system model.

Illustratively, a second system test project may be created in another simulation environment different from the simulation environment in step 204 to build a test link model to leverage the advantages unique to each of the two different simulation environments in a cross-over manner. For example, in this embodiment, a second system test engineering may be created in a CANoe simulation environment to build a test link model, and an information connection path between the target machine and the embedded system model built in step 202 is built through the test link model, so as to implement in-loop real-time testing between the embedded system model and the actual measurement target machine, and effectively improve flexibility and efficiency of testing.

And step 206, synchronously operating the first system test project and the second system test project based on test cases, and performing simulation test on the embedded system model to acquire simulation data with the same type as the test data.

Illustratively, the embedded system model and the target machine are synchronously operated through the first system test project in the step 202 and the second system test project in the step 204, and the real-time simulation data of the preset type and the real-time operation parameter data of the target machine of the same type can be acquired in the embedded system model.

And 208, stopping testing when the difference value between the simulation data and the test data of the same type accords with a preset test precision range.

For example, the simulation data and the real-time operation parameter data of the same type of target machine may be compared in the embedded system model, and when the difference between the simulation data and the test data of the same type meets a preset test precision range, it is indicated that the designed embedded system model meets the actual test requirement, and the test may be stopped.

Further, in the processor-in-loop testing method for a model provided in an embodiment of the present application, as shown in fig. 2, the creating a first system test project to build an embedded system model and generate an object program that can be run by an object machine includes:

step 2021: and creating a first system test project in a visual simulation tool Simulink of MATLAB, and establishing the embedded system model in a graphical form.

Further, in the processor-in-loop testing method for a model provided in an embodiment of the present application, as shown in fig. 3, the creating a first system test project to build an embedded system model and generate an object program that can be run by an object machine further includes:

step 2022: and adding a signal output module of a database and a signal input module of the database into the embedded system model, and respectively establishing signal connection between the signal output module and the signal input module and the embedded system model.

Step 2023: and establishing the correlation between the output signal of the target machine and the signal input module.

Step 2024: and establishing the correlation between the receiving signal of the target machine and the signal output module.

For example, in the loop test method for the processor of the model in the above embodiment, a signal output module of a database and a signal input module of the database may be continuously added to the embedded system model in a Simulink of a MATLAB, and signal connections between the signal output module and the signal input module and between the embedded system model are respectively established. Then, the correlation between the output signal of the target machine and the signal input module and the correlation between the target machine receiving signal and the signal output module are respectively established, and the signal correlation between the embedded system model and the target machine is realized by simple operation.

Further, in the processor-in-loop testing method for a model provided in an embodiment of the present application, as shown in fig. 4, the creating a first system test project to build an embedded system model and generate an object program that can be run by an object machine further includes:

step 2025: and compiling the code automatically generated based on MATLAB \ Simulink into the target program through a compiler.

For example, in the ring test method for the processor of the model in the above embodiment, the code automatically generated based on MATLAB \ Simulink is compiled into the target program through the compiler, so that the flexibility and the cheapness for establishing the embedded system model and performing the simulation test can be improved.

Further, in the processor-in-loop testing method for a model provided in an embodiment of the present application, as shown in fig. 5, after the creating a first system test project to build an embedded system model and generate an object program that can be run by an object machine, the method further includes:

step 203: and downloading the target program to the embedded system model.

For example, in the ring test method for the processor of the model in the above embodiment, the code automatically generated based on MATLAB \ Simulink is compiled into the target program and downloaded to the target machine, so as to test the feasibility and the operation effect of the model design program by testing the actual operation effect of the target machine.

Further, in the processor of a model in a ring test method provided in an embodiment of the present application, as shown in fig. 6, the creating a second system test project to build a test link model includes:

step 2041: and creating a second system test project based on the CANoe simulation environment to build a test link model.

Step 2042: and compiling a network database file in a DBC format in a CANoeCANDb + + editing environment, and importing the network database file into the second system test project.

Step 2043: and adding a node in the test link model, and associating the embedded system model with the simulation node in the network database file through the node.

For example, in the method for testing the processor in the model in the foregoing embodiment, a second system test project may be created in a common CANoe simulation environment, a test link model is loaded, a test link model is established to be associated with information of an embedded system model in the first system test project, and an information transmission path through which a target machine transmits information to the embedded system model via the test link model is further established, so as to implement the in-loop test of the processor in the model.

Further, in the processor-in-loop testing method for a model provided in an embodiment of the present application, as shown in fig. 7, the creating a second system test project to build a test link model includes:

step 2044: and connecting a controller local area network interface of the target machine with the test link model through a controller local area network signal line, wherein the controller local area network signal line is output by a CANCase XL (controller area network) of a CANoe peripheral device.

In the method for testing the ring of the processor of the model in the embodiment, the information transmission channel between the target machine and the test link model is directly established through the CAN signal line output by the CANCase XL arranged outside the CANoe in the CANoe simulation environment, so that the difficulty of establishing the processor of the model on the ring test platform is reduced, and the cost is effectively reduced.

Further, in a processor-in-loop testing method of a model provided in an embodiment of the present application, as shown in fig. 8, the synchronously running the first system test engineering and the second system test engineering based on the test case includes:

step 2061: and controlling the first system test project and the second system test project to run synchronously based on the scheduling information and the handshake signals.

For example, a preset communication specification (protocol) is adopted between the embedded system model and the test link model to exchange data, a contact process between the embedded system model and the test link model may be referred to as "handshake", and a signal of the contact between the embedded system model and the test link model may be referred to as "handshake signal". The method and the device control the first system test project and the second system test project to run synchronously by utilizing the scheduling information of the control system and setting handshake signals, so that the running synchronism of the embedded system model, the test link model and the target machine is ensured, the real-time performance and the flexibility of the in-loop test of the processor of the model are ensured, and the in-loop test cost of the processor of the model is effectively reduced.

It should be understood that although the various steps in the flow charts of fig. 1-8 are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least some of the steps in fig. 1-8 may include multiple sub-steps or multiple stages that are not necessarily performed at the same time, but may be performed at different times, and the order of performance of the sub-steps or stages is not necessarily sequential, but may be performed in turn or alternating with other steps or at least some of the sub-steps or stages of other steps.

In one embodiment of the present application, as shown in fig. 9, there is provided a processor-in-loop test apparatus for a model, including: a first system test project creation module 20, a second system test project creation module 40, a system test project operation module 60, and an in-loop test module 80, wherein:

a first system test engineering creating module 20, configured to create a first system test engineering to build an embedded system model and generate a target program that can be run by a target machine, where the target machine executes a preset function and generates a preset type of test data when running the target program;

the second system test engineering creating module 40 is configured to create a second system test engineering to build a test link model, where the test link model is configured to obtain real-time test data of the target machine running the target program, and to synchronously upload the real-time test data to the embedded system model;

a system test engineering operation module 60, configured to synchronously operate the first system test engineering and the second system test engineering based on test cases, and simultaneously test the embedded system model and the target machine, respectively, so as to obtain simulation data and test data of the same type;

and the in-loop test module 80 is configured to stop the test when a difference between the simulation data and the test data of the same type meets a preset test precision range.

Specifically, in the ring test device, the processor of the model in the above embodiment may first create a first system test project in a simulation test environment by using a first system test project creation module to create an embedded system model, so as to generate a target program that may be run by a target machine, so that the target machine executes a preset function and generates a preset type of test data when running the target program. And secondly, creating a second system test project in another simulation test environment by using a second system test project creating module to build a test link model, and uploading the actual operation result of the target machine to an embedded system model loaded in the first system test project. And then, synchronously operating the first system test project and the second system test project by using a system test project operation module based on a test case, and simultaneously testing the embedded system model and the target machine respectively to obtain the same type of simulation data and test data. Comparing the simulation data with the test data by the in-loop test module, and when the difference value between the simulation data and the test data meets a preset test precision range, indicating that the test result meets the requirement, and stopping the test. The device can establish a first system test project for loading a test link model based on a common simulation environment, establish a second system test project for loading the test link model based on another common simulation environment, upload an actual operation result of a target machine to an embedded system model loaded in the first system test project through the test link model, realize synchronous closed-loop operation control of the simulation model and an actual measurement target machine, and compare the simulation data with the test data in the simulation model.

Further, in an embodiment of the present application, as shown in fig. 10, there is provided a processor-in-loop test apparatus for a model, wherein the system test engineering operation module includes:

and the synchronous control module 61 is configured to control the first system test project and the second system test project to operate synchronously based on the scheduling information and the handshake signal.

For the specific definition of the processor-in-loop test apparatus of the model, reference may be made to the above definition of the processor-in-loop test method of the model, which is not described herein again.

In one embodiment of the present application, a computer device is provided, and the computer device may be a terminal, and its internal structure diagram may be as shown in fig. 11. The computer device includes a processor, a memory, a network interface, a display screen, and an input device connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program is executed by a processor to implement a processor-in-loop testing method of a model. The display screen of the computer equipment can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer equipment can be a touch layer covered on the display screen, a key, a track ball or a touch pad arranged on the shell of the computer equipment, an external keyboard, a touch pad or a mouse and the like.

Those skilled in the art will appreciate that the architecture shown in fig. 11 is merely a block diagram of some of the structures associated with the disclosed aspects and is not intended to limit the computing devices to which the disclosed aspects apply, as particular computing devices may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.

In one embodiment of the present application, there is provided a computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the following steps when executing the computer program:

synchronously operating the first system test project and the second system test project based on test cases, and respectively testing the embedded system model and the target machine simultaneously to obtain simulation data and test data of the same type;

and stopping the test when the difference value of the simulation data and the test data accords with a preset test precision range.

In one embodiment of the application, the processor when executing the computer program further performs the steps of:

creating a first system test project in a visual simulation tool Simulink of MATLAB, establishing an embedded system model in a graphical form and generating an object program which can be run by an object machine, wherein the object machine executes a preset function and generates preset type test data when running the object program;

creating a first system test project in a visual simulation tool Simulink of MATLAB, and establishing an embedded system model in a graphical form; adding a signal output module of a database and a signal input module of the database into the embedded system model, respectively establishing signal connection between the signal output module and the signal input module and the embedded system model, establishing association between an output signal of a target machine and the signal input module, and establishing association between a received signal of the target machine and the signal output module; generating a target program which can be run by the target machine, wherein the target machine executes a preset function and generates preset type test data when running the target program;

creating a first system test project in a visual simulation tool Simulink of MATLAB, and establishing an embedded system model in a graphical form; adding a signal output module of a database and a signal input module of the database into the embedded system model, respectively establishing signal connection between the signal output module and the signal input module and the embedded system model, establishing association between an output signal of a target machine and the signal input module, and establishing association between a received signal of the target machine and the signal output module; compiling codes automatically generated based on MATLAB/Simulink into an object program which can be run by the target machine through a compiler, wherein the target machine executes preset functions and generates preset type test data when running the object program;

creating a first system test project in a visual simulation tool Simulink of MATLAB, and establishing an embedded system model in a graphical form; adding a signal output module of a database and a signal input module of the database into the embedded system model, respectively establishing signal connection between the signal output module and the signal input module and the embedded system model, establishing association between an output signal of a target machine and the signal input module, and establishing association between a received signal of the target machine and the signal output module; compiling codes automatically generated based on MATLAB \ Simulink into an object program which can be run by the object machine through a compiler; downloading the target program to the embedded system model, wherein the target machine executes a preset function and generates test data of a preset type when running the target program;

creating a second system test project based on the CANoe simulation environment to build a test link model; compiling a network database file in a DBC format in a CANoeCANDb + + editing environment, and importing the network database file into the second system test project; adding nodes in the test link model; associating the embedded system model with a simulation node in the network database file through the node, wherein the test link model is used for acquiring real-time test data of the target machine for running the target program and synchronously uploading the real-time test data to the embedded system model;

creating a second system test project based on the CANoe simulation environment to build a test link model; compiling a network database file in a DBC format in a CANoeCANDb + + editing environment, and importing the network database file into the second system test project; adding nodes in the test link model; associating, via the node, the embedded system model with a simulation node in the network database file; connecting a controller local area network interface of the target machine with the test link model through a controller local area network signal line, wherein the controller local area network signal line is output by a CANCase XL (controller area network) of a CANoe peripheral device; the test link model is used for acquiring real-time test data of the target machine for running the target program and synchronously uploading the real-time test data to the embedded system model;

synchronously operating the first system test project and the second system test project based on test cases, controlling the first system test project and the second system test project to operate synchronously based on scheduling information and handshake signals, and simultaneously testing the embedded system model and the target machine respectively to acquire simulation data and test data of the same type;

In an embodiment of the application, a computer-readable storage medium is provided, on which a computer program is stored, which computer program, when being executed by a processor, carries out the steps of:

In one embodiment of the application, the computer program when executed by the processor further performs the steps of:

It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in the embodiments provided herein may include non-volatile and/or volatile memory, among others. Non-volatile memory can include read-only memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), Rambus Direct RAM (RDRAM), direct bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.

The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the claims. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims

1. A processor-in-loop test method of a model, comprising:

2. The method of claim 1, wherein creating a first system test project to build an embedded system model and generate a target program executable by a target machine comprises:

3. The method of claim 2, wherein the graphically modeling the embedded system model comprises:

4. The method of any one of claims 1-3, wherein the generating a target program executable by a target machine comprises:

5. The method of any of claims 1-3, further comprising, after the generating a target program executable by a target machine:

and downloading the target program to the embedded system model.

6. The method according to any one of claims 1-3, wherein the creating a second system test project to build a test link model comprises:

7. The method according to any one of claims 1-3, wherein the creating a second system test project to build a test link model comprises:

8. The method according to any one of claims 1-3, wherein the synchronously running the first system test project and the second system test project based on the test cases comprises:

9. A processor-in-loop test apparatus for a model, comprising:

10. The apparatus of claim 9, wherein the system test engineering runtime module comprises:

11. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the steps of the method of any of claims 1 to 8 are implemented when the computer program is executed by the processor.

12. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 8.