CN111538267A - Power-on and power-off time sequence control circuit and control method for multi-path power supply - Google Patents
Power-on and power-off time sequence control circuit and control method for multi-path power supply Download PDFInfo
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- CN111538267A CN111538267A CN202010333448.0A CN202010333448A CN111538267A CN 111538267 A CN111538267 A CN 111538267A CN 202010333448 A CN202010333448 A CN 202010333448A CN 111538267 A CN111538267 A CN 111538267A
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- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/25—Pc structure of the system
- G05B2219/25257—Microcontroller
Abstract
The invention discloses a power-on and power-off time sequence control circuit and a power-on and power-off time sequence control method for a multi-channel power supply, belonging to the field of time sequence control of power switches, wherein the power-on and power-off time sequence control circuit comprises a reference circuit, a first power supply, a second power supply and at least N groups of time sequence control units, wherein N belongs to N and N is more than or equal to 2; each group of time sequence control units comprises a voltage sampling circuit, a voltage comparison circuit, an output control circuit and a load unit; the voltage sampling circuit samples the power supply voltage of the first power supply, the voltage comparison circuit compares the sampling voltage with the reference voltage through the hysteresis comparator, and the reference voltages provided by the reference circuits in any two groups of timing sequence control units are unequal; the load unit is connected with the output control circuit, and the output control circuit switches the on-off state of the load unit according to the comparison level output by the voltage comparison circuit. The invention integrates the power-on time sequence control and the power-off time sequence control into a whole, has simple circuit, can expand a new time sequence control unit at any time, and has strong creativity and high practicability.
Description
Technical Field
The invention relates to the field of power switch time sequence control, in particular to a power-on and power-off time sequence control circuit and a power-on and power-off time sequence control method for a multi-path power supply.
Background
The switch power supply is widely used in the fields of industry and national defense, is an important component of military and civil electronic systems such as aerospace, aviation, ships, weapons, railways, communication, medical electronics, industrial automation equipment and the like, generally has multi-output, and sometimes can ensure that the system can reliably and stably work by requiring that each path of voltage has power-on time sequence requirements and power-off time sequence requirements. The traditional power-on time sequence control circuit of the multi-output power supply is realized by adopting a mode of designing different delay circuits, but a better control mode is not provided for a power-off time sequence generally. The power-on time sequence control circuit designed by adopting the time delay circuit is complex in circuit, is not suitable for time sequence control in power failure, and often needs a set of circuit to realize power failure time sequence control.
Disclosure of Invention
The invention aims to provide a power-on and power-off time sequence control circuit and a power-on and power-off time sequence control method for a multi-path power supply, which can conveniently realize power-on time sequence control of the multi-path output power supply and power-off time sequence control, and can conveniently expand multi-path voltage time sequence control.
In order to achieve the purpose, the invention provides the following technical scheme:
a multi-path power supply power-on and power-off time sequence control circuit comprises a reference circuit, a first power supply, a second power supply and at least N groups of time sequence control units, wherein N belongs to N and N is more than or equal to 2; each group of time sequence control units comprises a voltage sampling circuit, a voltage comparison circuit, an output control circuit and a load unit; the voltage sampling circuit samples the power supply voltage of the first power supply, and the second power supply provides the power supply voltage of the reference circuit and the voltage comparison circuit;
the voltage comparison circuit compares the sampling voltage with the reference voltage provided by the reference circuit through the hysteresis comparator, and the reference voltages provided by the reference circuits in any two groups of timing sequence control units are unequal;
the load unit is connected with the output control circuit; the output control circuit switches the on-off state of the output control circuit according to the comparison level output by the voltage comparison circuit, and then controls the on-off state of the load unit.
As the improvement scheme of the invention, in order to further change the slope of the power-down of the power supply voltage in different groups of time sequence control units, the time sequence control unit of the N-1 group also comprises a power-down maintaining circuit for maintaining the voltage when the first power supply is powered down; the power failure maintaining circuit comprises a power diode and a maintaining capacitor, wherein the anode end of the power diode is connected with a first power supply, the cathode of the power diode is connected with the first end of the maintaining capacitor, and the second end of the maintaining capacitor is grounded; and the common end of the power diode and the holding capacitor is connected with the voltage sampling circuit.
As an improved scheme of the invention, in order to control power-on and power-off time sequences, the time sequence control units are divided into two groups, the time sequence control unit of the first group comprises a first voltage sampling circuit, a first voltage comparison circuit, a first output control unit and a first load unit, the first voltage sampling circuit is connected between a first power supply and an input ground, and the output end of the first voltage sampling circuit is connected with the inverted input end of the first voltage comparison circuit; the non-inverting input end of the first voltage comparison circuit is connected with the reference circuit, and the output end of the first voltage comparison circuit is connected with the first output control circuit.
As an improved scheme of the invention, in order to control the power-on and power-off time sequence conveniently, the time sequence control circuit of the second group comprises a second voltage sampling circuit, a second voltage comparison circuit, a second output control unit, a second load unit and a power-off maintaining circuit, wherein the first voltage sampling circuit is connected between the power-off maintaining circuit and an input ground, and the output end of the first voltage sampling circuit is connected with the inverted input end of the second voltage comparison circuit; and the non-inverting input end of the second voltage comparison circuit is connected with the reference circuit, and the output end of the second voltage comparison circuit is connected with the second output control circuit.
As an improved solution of the present invention, the reference circuit includes a first current-limiting resistor R5 and a voltage reference source N3, an anode terminal of the voltage reference source N3 is grounded, a reference terminal thereof is connected to a cathode terminal, a first terminal of the first current-limiting resistor R5 is connected to the second power supply Vcc, and a second terminal thereof is connected to the cathode terminal of the voltage reference source N3.
As an improved scheme of the present invention, the first voltage sampling circuit includes a first sampling resistor R1 and a second sampling resistor R2, the first voltage comparison circuit includes a first voltage dividing resistor R10, a second voltage dividing resistor R11, a first positive feedback resistor R6 and a first hysteresis comparator N1, the first output control circuit includes a second current limiting resistor R8 and a first switching transistor V2; a first end of the first sampling resistor R1 is connected with a first power supply Vin, and a second end is connected with an inverting input end of the first hysteresis comparator N1 and a first end of the second sampling resistor R2; a power supply terminal of the first hysteretic comparator N1 is connected to the second power supply Vcc, a non-inverting input terminal thereof is connected to the second terminal of the first voltage-dividing resistor R10, the first terminal of the second voltage-dividing resistor R11 and the first terminal of the first positive feedback resistor R6, the first terminal of the first voltage-dividing resistor R10 is connected to the second terminal of the first current-limiting resistor R5, the second terminal of the first positive feedback resistor R6 is connected to the first terminal of the second current-limiting resistor R8, the second terminal of the second current-limiting resistor R8 is connected to the base of the first switching transistor V2, a collector of the first switching transistor V2 is connected to the control terminal of the first load unit, and an emitter thereof is grounded together with the second terminal of the second sampling resistor R2 and the second terminal of the second voltage-dividing resistor R11.
As an improved scheme of the present invention, the second voltage sampling circuit includes a third sampling resistor R3 and a fourth sampling resistor R4, the second voltage comparison circuit includes a third voltage dividing resistor R12, a fourth voltage dividing resistor R13, a second positive feedback resistor R7 and a second hysteretic comparator N2, and the second output control circuit includes a third current limiting resistor R9 and a second switching transistor V3; a first end of the third sampling resistor R3 is connected with the power-down sequential circuit, and a second end of the third sampling resistor R3 is connected with a first end of the fourth sampling resistor R4 and an inverting input end of the second hysteresis comparator N2; a power supply terminal of the second hysteretic comparator N2 is connected to the second power supply Vcc, a non-inverting input terminal thereof is connected to the second terminal of the third voltage-dividing resistor R12, the first terminal of the fourth voltage-dividing resistor R13 and the first terminal of the second positive feedback resistor R7, the first terminal of the third voltage-dividing resistor R12 is connected to the second terminal of the first current-limiting resistor R5, the second terminal of the second positive feedback resistor R7 is connected to the first terminal of the third current-limiting resistor R9, the second terminal of the third current-limiting resistor R9 is connected to the base of the second switching transistor V3, a collector of the second switching transistor V3 is connected to the control terminal of the second load unit, and an emitter thereof is grounded together with the second terminal of the fourth sampling resistor R4 and the second terminal of the fourth voltage-dividing resistor R13.
Aiming at the technical scheme, the control method of the power-on and power-off sequential control circuit of the multi-path power supply is further provided, and the control steps comprise:
s1: when the first power supply Vin is powered on, reference voltages in the timing sequence control units of 1-N groups are Vr 1-Vrn in sequence, and Vr1, Vr2, Vrn … … and Vrn; when the first power supply Vin is powered off, the reference voltages in the timing control units of the 1-N groups are Vd 1-Vdn in sequence, and Vd1, Vd2, Vdn and Vdn are larger than Vd … …;
s2: the voltage comparison circuit in each group of time sequence control units compares the sampling voltage of the voltage sampling circuit with the reference voltage provided by the reference circuit;
s3: when the first power supply Vin is powered on, along with the rise of the voltage of the first power supply Vin, the sampling voltages V01-Vn of the voltage sampling circuits in each group of timing control units are not less than the corresponding reference voltages Vr 1-Vrn after passing through the time Trn and Tr (n-1) … … Tr1 respectively; the power-on time difference delta Tr of any two groups of timing control units a and b is | Trb-Tra |;
s4: when the first power supply Vin is powered down, along with the voltage drop of the first power supply Vin, the sampling voltages V01-Vn of the voltage sampling circuits in each group of timing control units are not smaller than the corresponding reference voltages Vd 1-Vdn after passing through the time Td1 and the time Td2 … … Tdn, and the power down time difference delta Td of any two groups of timing control units a and b is | Tdb-Tda |.
Has the advantages that: the invention utilizes the rising slope of the power supply voltage, sets the reference starting voltage of each group, and utilizes the time difference that the sampling voltage value among the groups reaches the corresponding reference starting voltage value as the time difference for establishing the output voltage of each group, thereby realizing the sequential control of electrification; by setting different reference turn-off voltages of each group, the power failure time sequence of each group of output voltage is realized by utilizing the time difference that the sampling voltage value of each group reaches the corresponding reference turn-off voltage value, energy is provided for a load unit needing to be turned off after the power failure maintaining circuit, the reduction rate of power supply of the back turn-off circuit is reduced, the longer power failure time difference can be realized, and the time difference requirement during power failure is ensured. The invention integrates the power-on time sequence control and the power-off time sequence control into a whole, has simple circuit, can expand a new time sequence control unit at any time, and has strong creativity and high practicability.
Drawings
FIG. 1 is a circuit diagram according to embodiment 2 of the present invention;
FIG. 2 is a schematic diagram illustrating the generation of the power-on time difference according to the present invention;
FIG. 3 is a schematic diagram illustrating the generation of the power-on time difference according to the present invention;
FIG. 4 is a circuit diagram of a plurality of timing control units according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Embodiment 1, a power-on and power-off timing control circuit for a multi-path power supply includes a reference circuit, a first power supply, a second power supply, and at least N groups of timing control units, where N is N and N is greater than or equal to 2; each group of time sequence control units comprises a voltage sampling circuit, a voltage comparison circuit, an output control circuit and a load unit; the voltage sampling circuit samples the power supply voltage of the first power supply, and the second power supply provides the power supply voltage of the reference circuit and the voltage comparison circuit; the voltage comparison circuit compares the sampling voltage with the reference voltage provided by the reference circuit through the hysteresis comparator, and the reference voltages provided by the reference circuits in any two groups of timing sequence control units are unequal; the load unit is connected with the output control circuit; the output control circuit switches the on-off state of the output control circuit according to the comparison level output by the voltage comparison circuit, and then controls the on-off state of the load unit.
In this embodiment, the reference voltage (on) of each group of timing control units is set by using the rising slope of the power supply voltage, and as the first power supply voltage rises, the time for the sampling voltage of each group of timing control units to reach the reference voltage is different, that is, the time for the on-off state of the output control circuit to change is different, so that the time difference of the on-off state of each group is used as the time difference for establishing the output voltage of each group, and the power-on timing control can be realized.
When the first power supply is powered down, the reference voltage (turn-off) of each group of time sequence control units is set, the principle is similar to that when the first power supply is turned on, and because the reference voltage is different, the time for the sampling voltage of each group of time sequence control units to reach the reference voltage is different, and the time for the on-off state of the output control circuit to change is different, the power-down time sequence of each group of output voltage is realized by utilizing the time difference for each group of sampling voltage to reach the corresponding reference turn-off voltage value, so that the longer power-down time difference can be realized, and the time difference.
A control method of this embodiment includes the steps of:
s1: when the first power supply Vin is powered on, reference voltages in the timing sequence control units of 1-N groups are Vr 1-Vrn in sequence, and Vr1, Vr2, Vrn … … and Vrn; when the first power supply Vin is powered off, the reference voltages in the timing control units of the 1-N groups are Vd 1-Vdn in sequence, and Vd1, Vd2, Vdn and Vdn are larger than Vd … …;
s2: the voltage comparison circuit in each group of time sequence control units compares the sampling voltage of the voltage sampling circuit with the reference voltage provided by the reference circuit;
s3: when the first power supply Vin is powered on, along with the rise of the voltage of the first power supply Vin, the sampling voltages V01-Vn of the voltage sampling circuits in each group of timing control units are not less than the corresponding reference voltages Vr 1-Vrn after passing through the time Trn and Tr (n-1) … … Tr1 respectively; the power-on time difference delta Tr of any two groups of timing control units a and b is | Trb-Tra |;
s4: when the first power supply Vin is powered down, along with the voltage drop of the first power supply Vin, the sampling voltages V01-Vn of the voltage sampling circuits in each group of timing control units are not smaller than the corresponding reference voltages Vd 1-Vdn after passing through the time Td1 and the time Td2 … … Tdn, and the power down time difference delta Td of any two groups of timing control units a and b is | Tdb-Tda |.
In embodiment 2, the N-1 group of timing control units further includes a power-down maintaining circuit for maintaining voltage when the first power supply is powered down; the power failure maintaining circuit comprises a power diode and a maintaining capacitor, wherein the anode end of the power diode is connected with a first power supply, the cathode of the power diode is connected with the first end of the maintaining capacitor, and the second end of the maintaining capacitor is grounded; and the common end of the power diode and the holding capacitor is connected with the voltage sampling circuit.
The maintaining capacitor in the power-down maintaining circuit can store electric energy, when the first power supply is powered off, the maintaining capacitor discharges, the descending slope of the power supply voltage in the power-down state can be delayed, and the turn-off time is further prolonged by using the difference of the reference voltages in different groups of time sequence control units.
In this embodiment, the reference circuit includes a first current-limiting resistor R5 and a voltage reference source N3, an anode terminal of the voltage reference source N3 is grounded, a reference terminal thereof is connected to a cathode terminal, a first terminal of the first current-limiting resistor R5 is connected to the second power supply Vcc, and a second terminal thereof is connected to the cathode terminal of the voltage reference source N3.
In this embodiment, the first voltage sampling circuit includes a first sampling resistor R1 and a second sampling resistor R2, the first voltage comparison circuit includes a first voltage dividing resistor R10, a second voltage dividing resistor R11, a first positive feedback resistor R6 and a first hysteretic comparator N1, and the first output control circuit includes a second current limiting resistor R8 and a first switching transistor V2; a first end of the first sampling resistor R1 is connected to the first power supply Vin, and a second end is connected to the inverting input terminal of the first hysteresis comparator N1 and the first end of the second sampling resistor R2; a power supply terminal of the first hysteretic comparator N1 is connected to the second power supply Vcc, a non-inverting input terminal thereof is connected to the second terminal of the first voltage-dividing resistor R10, the first terminal of the second voltage-dividing resistor R11 and the first terminal of the first positive feedback resistor R6, the first terminal of the first voltage-dividing resistor R10 is connected to the second terminal of the first current-limiting resistor R5, the second terminal of the first positive feedback resistor R6 is connected to the first terminal of the second current-limiting resistor R8, the second terminal of the second current-limiting resistor R8 is connected to the base of the first switching transistor V2, the collector of the first switching transistor V2 is connected to the control terminal of the first load unit, and the emitter thereof is grounded together with the second terminal of the second sampling resistor R2 and the second terminal of the second voltage-dividing resistor R11. A capacitor c1 is also connected between the first power supply Vin and the input ground.
In this embodiment, the power-down maintaining circuit includes a first diode V1 and a maintaining capacitor C2, the second voltage sampling circuit includes a third sampling resistor R3 and a fourth sampling resistor R4, the second voltage comparison circuit includes a third voltage dividing resistor R12, a fourth voltage dividing resistor R13, a second positive feedback resistor R7 and a second hysteresis comparator N2, and the second output control circuit includes a third current limiting resistor R9 and a second switching transistor V3; an anode terminal of the first diode V1 is connected to the first power supply Vin, a cathode terminal thereof is connected to the first terminal of the holding capacitor C2, the input terminal of the second load unit, and the first terminal of the third sampling resistor R3, and a second terminal of the third sampling resistor R3 is connected to the first terminal of the fourth sampling resistor R4 and the inverting input terminal of the second hysteretic comparator N2; a power supply terminal of the second hysteretic comparator N2 is connected to the second power supply Vcc, a non-inverting input terminal thereof is connected to the second terminal of the third voltage-dividing resistor R12, the first terminal of the fourth voltage-dividing resistor R13 and the first terminal of the second positive feedback resistor R7, the first terminal of the third voltage-dividing resistor R12 is connected to the second terminal of the first current-limiting resistor R5, the second terminal of the second positive feedback resistor R7 is connected to the first terminal of the third current-limiting resistor R9, the second terminal of the third current-limiting resistor R9 is connected to the base of the second switching transistor V3, the collector of the second switching transistor V3 is connected to the control terminal of the second load unit, and the emitter thereof is grounded together with the second terminal of the fourth sampling resistor R4 and the second terminal of the fourth voltage-dividing resistor R13.
Therefore, referring to fig. 2, the reference voltage Vr1 of the first voltage comparison circuit and the reference voltage Vr2 of the second voltage comparison circuit are set,
Vr1>vr2, when power is initially turned on, the voltage of the first power supply Vin is zero, and since the sampling voltage value of the voltage sampling circuit is smaller than the reference voltage value, the output of the two voltage comparison circuits is at high level, and the output of the collectors of the two output control circuits is at low level. The load units take a DC/DC converter as an example, the outputs of the two load units are turned off, when the voltage of the first power supply Vin rises until the sampling voltage of the second voltage sampling circuit reaches Vr2, at this time, the time is Tr2, the comparison voltage output by the second voltage comparison circuit becomes low level, the collector output of the second output control circuit becomes high resistance, and the output voltage of the DC/DC converter 2 is established. At this time, the output of the first output control circuit remains at the low level, and the output of the DC/DC converter 1 remains off. Until the voltage of the first power supply Vin continues to rise, so that the sampling voltage of the first voltage sampling circuit reaches Vr1, the time at this time is Tr1, the comparison level output by the first voltage comparison circuit is changed into low level, the collector output of the first output control circuit is changed into high resistance, the output of the DC/DC converter 1 is established, the output voltages of the two time sequence control units are established in sequence, the power-on time sequence control of the output voltage is realized, and the time difference is (Tr1-Tr 2).
Referring to fig. 3, when the first power supply Vin is powered off, the power supply voltage will drop rapidly, and since the second group of timing control units have the power-down maintaining circuit supplying power, the voltage of VA will drop more slowly than the voltage of the first power supply Vin, and point a is the cathode terminal of the first diode V1 in fig. 1.
At the beginning of power failureThe second power supply continues VCC to supply power to the first voltage comparison circuit and the second voltage comparison circuit, the reference voltage Vd1 of the first voltage comparison circuit and the reference voltage Vd2 of the second voltage comparison circuit are set,
Vd1>vd 2. The voltage of the first power supply Vin is reduced from a steady-state value, the voltage VA is also reduced from the steady-state value, but the sampling voltage is still larger than the reference voltage at the moment, so the comparison levels output by the two voltage comparison circuits are both low levels, the outputs of the two output control circuits are high resistances, and the outputs of the two DC/DC converters are normal.
When the voltage of the first power supply Vin is reduced to make the sampling voltage of the first voltage sampling circuit less than Vd1, the time is Td1, the comparison level output by the first voltage comparison circuit becomes high level, the output of the first output control circuit becomes low level, the output voltage of the DC/DC converter 1 is turned off, the output of the second output control circuit is still high resistance, the output of the DC/DC converter 2 is still normal, until the output voltage of the power-down maintaining circuit is reduced to make the sampling voltage of the second voltage sampling circuit less than Vd2, the time is Td2, the comparison level output by the second voltage comparison circuit becomes high level, the output of the second output control circuit becomes low level, the output voltage of the DC/DC converter 2 is turned off, the two output voltages realize that the DC/DC converter 1 is turned off first and the DC/DC converter 2 is turned off later, the power down timing control is completed with a time difference of (Td2-Td 1).
Referring to fig. 4, three groups of timing control units are provided, and the reference voltage provided by the reference circuit in the third group of timing control units is different from that of the first two groups of timing control units, so that when the first power supply unit is powered on or powered off, the power-on and power-off sequences of the three groups are inconsistent, the transition time of the hysteresis comparator can be adjusted by setting the resistance value of the positive feedback resistor, and the power-on and power-off timing of the three groups is further controlled.
The invention utilizes the rising slope of the power supply voltage, sets the reference starting voltage of each group, and utilizes the time difference that the sampling voltage value among the groups reaches the corresponding reference starting voltage value as the time difference for establishing the output voltage of each group, thereby realizing the sequential control of electrification; the power failure maintaining circuit provides energy for the load units which need to be turned off, the reduction rate of power supply of the back turn-off circuit is reduced, then different reference turn-off voltages of all groups are set, the time difference that the sampling voltage value of each group reaches the corresponding reference turn-off voltage value is utilized to realize the power failure time sequence of each group of output voltage, the longer power failure time difference can be realized, and the time difference requirement during power failure is ensured. The invention integrates the power-on time sequence control and the power-off time sequence control into a whole, has simple circuit, can expand a new time sequence control unit at any time, and has strong creativity and high practicability.
Although the present description is described in terms of embodiments, not every embodiment includes only a single embodiment, and such description is for clarity only, and those skilled in the art should be able to integrate the description as a whole, and the embodiments can be appropriately combined to form other embodiments as will be understood by those skilled in the art.
In the description of the present invention, it should be noted that relational terms such as first and second, and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
In the description of the present invention, it should be further noted that the terms "upper", "lower", "inside", "outside", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings or orientations or positional relationships conventionally put in use of products of the present invention, which are merely for convenience of description and simplification of description, but do not indicate or imply that the referred devices or elements must have specific orientations, be constructed in specific orientations, and be operated, and thus, should not be construed as limiting the present invention.
In the description of the present invention, it should also be noted that, unless otherwise explicitly specified or limited, the terms "disposed" and "connected" are to be interpreted broadly, e.g., as being either fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Therefore, the above description is only a preferred embodiment of the present application, and is not intended to limit the scope of the present application; all changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.
Claims (8)
1. A multi-path power supply power-on and power-off time sequence control circuit comprises a reference circuit, a first power supply, a second power supply and at least N groups of time sequence control units, wherein N belongs to N and N is more than or equal to 2; each group of time sequence control units comprises a voltage sampling circuit, a voltage comparison circuit, an output control circuit and a load unit; the voltage sampling circuit samples the power supply voltage of the first power supply, and the second power supply provides the power supply voltage of the reference circuit and the voltage comparison circuit; it is characterized in that the preparation method is characterized in that,
the voltage comparison circuit compares the sampling voltage with the reference voltage provided by the reference circuit through the hysteresis comparator, and the reference voltages provided by the reference circuits in any two groups of timing sequence control units are unequal;
the load unit is connected with the output control circuit; the output control circuit switches the on-off state of the output control circuit according to the comparison level output by the voltage comparison circuit, and then controls the on-off state of the load unit.
2. The power-on and power-off sequential control circuit of a multi-path power supply as claimed in claim 1, wherein the sequential control unit of the N-1 group further comprises a power-off maintaining circuit for maintaining the voltage when the first power supply is powered off; the power failure maintaining circuit comprises a power diode and a maintaining capacitor, wherein the anode end of the power diode is connected with a first power supply, the cathode of the power diode is connected with the first end of the maintaining capacitor, and the second end of the maintaining capacitor is grounded; and the common end of the power diode and the holding capacitor is connected with the voltage sampling circuit.
3. The power-on and power-off sequence control circuit of claim 2, wherein the sequence control units are two groups, the sequence control unit of the first group comprises a first voltage sampling circuit, a first voltage comparison circuit, a first output control unit and a first load unit, the first voltage sampling circuit is connected between a first power supply and an input ground, and the output end of the first voltage sampling circuit is connected with the inverted input end of the first voltage comparison circuit; the non-inverting input end of the first voltage comparison circuit is connected with the reference circuit, and the output end of the first voltage comparison circuit is connected with the first output control circuit.
4. The power-on and power-off sequential control circuit of claim 3, wherein the sequential control circuit of the second group comprises a second voltage sampling circuit, a second voltage comparison circuit, a second output control unit, a second load unit and a power-off maintaining circuit, the first voltage sampling circuit is connected between the power-off maintaining circuit and an input ground, and the output end of the first voltage sampling circuit is connected with the inverted input end of the second voltage comparison circuit; and the non-inverting input end of the second voltage comparison circuit is connected with the reference circuit, and the output end of the second voltage comparison circuit is connected with the second output control circuit.
5. The power-on and power-off timing control circuit of claim 4, wherein the reference circuit comprises a first current-limiting resistor R5 and a voltage reference source N3, an anode terminal of the voltage reference source N3 is grounded, a reference terminal of the voltage reference source N3 is connected to a cathode terminal, a first terminal of the first current-limiting resistor R5 is connected to a second power supply Vcc, and a second terminal of the first current-limiting resistor R5 is connected to the cathode terminal of the voltage reference source N3.
6. The power-on and power-off timing control circuit of claim 5, wherein the first voltage sampling circuit comprises a first sampling resistor R1 and a second sampling resistor R2, the first voltage comparison circuit comprises a first voltage dividing resistor R10, a second voltage dividing resistor R11, a first positive feedback resistor R6 and a first hysteretic comparator N1, and the first output control circuit comprises a second current limiting resistor R8 and a first switching transistor V2; a first end of the first sampling resistor R1 is connected with a first power supply Vin, and a second end is connected with an inverting input end of the first hysteresis comparator N1 and a first end of the second sampling resistor R2; a power supply terminal of the first hysteretic comparator N1 is connected to the second power supply Vcc, a non-inverting input terminal thereof is connected to the second terminal of the first voltage-dividing resistor R10, the first terminal of the second voltage-dividing resistor R11 and the first terminal of the first positive feedback resistor R6, the first terminal of the first voltage-dividing resistor R10 is connected to the second terminal of the first current-limiting resistor R5, the second terminal of the first positive feedback resistor R6 is connected to the first terminal of the second current-limiting resistor R8, the second terminal of the second current-limiting resistor R8 is connected to the base of the first switching transistor V2, a collector of the first switching transistor V2 is connected to the control terminal of the first load unit, and an emitter thereof is grounded together with the second terminal of the second sampling resistor R2 and the second terminal of the second voltage-dividing resistor R11.
7. The power-on and power-off timing control circuit of a multi-channel power supply as claimed in claim 5 or 6, wherein the second voltage sampling circuit comprises a third sampling resistor R3 and a fourth sampling resistor R4, the second voltage comparison circuit comprises a third voltage dividing resistor R12, a fourth voltage dividing resistor R13, a second positive feedback resistor R7 and a second hysteretic comparator N2, and the second output control circuit comprises a third current limiting resistor R9 and a second switching transistor V3; a first end of the third sampling resistor R3 is connected with the power-down sequential circuit, and a second end of the third sampling resistor R3 is connected with a first end of the fourth sampling resistor R4 and an inverting input end of the second hysteresis comparator N2; a power supply terminal of the second hysteretic comparator N2 is connected to the second power supply Vcc, a non-inverting input terminal thereof is connected to the second terminal of the third voltage-dividing resistor R12, the first terminal of the fourth voltage-dividing resistor R13 and the first terminal of the second positive feedback resistor R7, the first terminal of the third voltage-dividing resistor R12 is connected to the second terminal of the first current-limiting resistor R5, the second terminal of the second positive feedback resistor R7 is connected to the first terminal of the third current-limiting resistor R9, the second terminal of the third current-limiting resistor R9 is connected to the base of the second switching transistor V3, a collector of the second switching transistor V3 is connected to the control terminal of the second load unit, and an emitter thereof is grounded together with the second terminal of the fourth sampling resistor R4 and the second terminal of the fourth voltage-dividing resistor R13.
8. The method for controlling the power-on and power-off sequence control circuit of the multi-channel power supply as claimed in claim 1, wherein the control step comprises:
s1: when the first power supply Vin is powered on, reference voltages in the timing sequence control units of 1-N groups are Vr 1-Vrn in sequence, and Vr1, Vr2, Vrn … … and Vrn; when the first power supply Vin is powered off, the reference voltages in the timing control units of the 1-N groups are Vd 1-Vdn in sequence, and Vd1, Vd2, Vdn and Vdn are larger than Vd … …;
s2: the voltage comparison circuit in each group of time sequence control units compares the sampling voltage of the voltage sampling circuit with the reference voltage provided by the reference circuit;
s3: when the first power supply Vin is powered on, along with the rise of the voltage of the first power supply Vin, the sampling voltages V01-Vn of the voltage sampling circuits in each group of timing control units are not less than the corresponding reference voltages Vr 1-Vrn after passing through the time Trn and Tr (n-1) … … Tr1 respectively; the power-on time difference delta Tr of any two groups of timing control units a and b is | Trb-Tra |;
s4: when the first power supply Vin is powered down, along with the voltage drop of the first power supply Vin, the sampling voltages V01-Vn of the voltage sampling circuits in each group of timing control units are not smaller than the corresponding reference voltages Vd 1-Vdn after passing through the time Td1 and the time Td2 … … Tdn, and the power down time difference delta Td of any two groups of timing control units a and b is | Tdb-Tda |.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111884498A (en) * | 2020-08-28 | 2020-11-03 | 上海中兴易联通讯股份有限公司 | Power-down time sequence control circuit and method for multi-channel power supply of indoor distribution system |
| CN112526897A (en) * | 2020-12-15 | 2021-03-19 | 安徽皖通邮电股份有限公司 | Control device and control method for power supply time sequence |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111884498A (en) * | 2020-08-28 | 2020-11-03 | 上海中兴易联通讯股份有限公司 | Power-down time sequence control circuit and method for multi-channel power supply of indoor distribution system |
| CN111884498B (en) * | 2020-08-28 | 2022-04-01 | 上海中兴易联通讯股份有限公司 | Power-down time sequence control circuit and method for multi-channel power supply of indoor distribution system |
| CN112526897A (en) * | 2020-12-15 | 2021-03-19 | 安徽皖通邮电股份有限公司 | Control device and control method for power supply time sequence |
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