CN111525922A - Low-bandwidth symmetrical phase locking method for inhibiting frequency coupling effect of grid-connected inverter - Google Patents

Low-bandwidth symmetrical phase locking method for inhibiting frequency coupling effect of grid-connected inverter Download PDF

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CN111525922A
CN111525922A CN202010397117.3A CN202010397117A CN111525922A CN 111525922 A CN111525922 A CN 111525922A CN 202010397117 A CN202010397117 A CN 202010397117A CN 111525922 A CN111525922 A CN 111525922A
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徐海亮
聂飞
王诗楠
李志�
严庆增
赵仁德
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China University of Petroleum East China
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump

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Abstract

The invention discloses a low-bandwidth symmetrical phase-locking method for inhibiting frequency coupling effect of a grid-connected inverter, which constructs a phase-locked loop small interference model with low bandwidth and symmetrical control structure, and is realized by a phase discriminator, a loop filter and a voltage-controlled oscillator, wherein the phase discriminator converts input three-phase disturbance voltage by positive and negative Park, the loop filter respectively passes power grid voltage d and q-axis small disturbance components output by the phase discriminator through a proportional-integral regulator, two output angular frequencies are fed back to the phase discriminator after passing through an integral link, and the voltage-controlled oscillator calculates the average value of the angular frequency components output by the loop filter and performs integral operation to obtain small disturbance output. The invention can obviously reduce the bandwidth of the phase-locked loop and has symmetrical control structure, and when the sub-synchronous disturbance component occurs to the grid voltage, the amplitude of the frequency coupling component in the current response of the grid-connected inverter can be obviously inhibited, thereby enhancing the stability of the system and having better reference significance for developing the stability analysis of the system.

Description

Low-bandwidth symmetrical phase locking method for inhibiting frequency coupling effect of grid-connected inverter
Technical Field
The invention belongs to the research field of distributed generation grid-connected inverters and phase-locked loops, and particularly relates to a low-bandwidth symmetrical phase-locked method for inhibiting frequency coupling effect of a grid-connected inverter.
Background
In recent years, with the rapid development of new energy distributed power generation, three-phase grid-connected inverters are widely applied. However, the interaction between the grid-connected inverter and the power grid provides a huge test for the stability of the whole system, and the current common stability analysis method mainly judges the stability by establishing an impedance model and utilizing relevant criteria. In this case, the whole system is regarded as a single-input single-output system, that is, when the grid voltage is disturbed by a certain frequency, the current of the same frequency is disturbed correspondingly.
However, when the bandwidth of the phase-locked loop in the grid-connected inverter is large, the current controller is asymmetric, and the capacitance of the dc bus capacitor is small, the original single-input single-output system is converted into a single-input dual-output system, that is, when the grid voltage has a disturbance of a certain frequency, the corresponding current response contains a current disturbance component of another frequency in addition to the original same frequency disturbance component. This phenomenon is defined as a frequency coupling effect, at which point the original stability criterion is no longer applicable.
Based on the problems, experts and scholars at home and abroad model a grid-connected inverter system, indicate various reasons which possibly cause the frequency coupling effect, and deduce a corresponding impedance model to describe the frequency coupling effect. In addition, there is a literature in which a grid-connected inverter analytic impedance model in which a phase-locked loop causes a frequency coupling effect is derived, but it does not improve on the bandwidth of the phase-locked loop and the control asymmetry thereof. Therefore, the phase-locked loop structure is improved, and the phase-locked method which can effectively reduce the bandwidth and control the structural symmetry plays a crucial role in inhibiting the frequency coupling effect.
Disclosure of Invention
The invention aims to provide a low-bandwidth symmetrical phase-locking method for inhibiting frequency coupling effect of a grid-connected inverter aiming at the defects of the prior art.
The purpose of the invention is realized by the following technical scheme: a low-bandwidth symmetrical phase locking method for suppressing the frequency coupling effect of a grid-connected inverter is realized by a phase discriminator, a loop filter and a voltage-controlled oscillator;
the phase discriminator converts the input three-phase disturbance voltage through positive and negative Park to obtain a grid-connected point disturbance voltage q-axis component when d-axis orientation is adopted under a control coordinate system
Figure BDA0002487985600000011
And d-axis component of grid-connected point disturbance voltage when q-axis orientation is adopted
Figure BDA0002487985600000012
Feeding into a loop filter:
Figure BDA0002487985600000021
in the formula, the superscript "c" represents a control coordinate system, namely a coordinate system where a phase-locked loop is located; v1Is a static operating point of the power grid voltage;
Figure BDA0002487985600000022
a d-axis component of disturbance voltage when q-axis orientation is adopted in a system coordinate system;
Figure BDA0002487985600000023
a disturbance voltage q-axis component when q-axis orientation is adopted under a system coordinate system; delta thetaqRepresenting the difference value of the actual phase of the power grid voltage and the phase output by the phase-locked loop when the q-axis orientation is adopted; delta thetadRepresenting the difference value of the actual phase of the power grid voltage and the phase output by the phase-locked loop when d-axis orientation is adopted;
the loop filter is used for carrying out d-axis and q-axis small disturbance components on the power grid voltage output by the phase discriminator
Figure BDA0002487985600000024
After passing through a proportional integral regulator respectively, obtaining an angular frequency component delta omega when the d-axis orientation is adopteddAnd angular frequency component Δ ω when oriented with q-axisq：
Figure BDA0002487985600000025
In the formula, kppRepresenting a proportional parameter, k, in a phase-locked loop filterpiRepresenting an integral parameter in a phase-locked loop filter;
Figure BDA0002487985600000026
is the d-axis component of the disturbance voltage when the d-axis orientation is adopted in the system coordinate system,
Figure BDA0002487985600000027
a disturbance voltage q-axis component when q-axis orientation is adopted under a system coordinate system;
two angular frequencies Δ ωd、ΔωqAfter an integral link, the angle delta theta required by positive and negative Park conversion of the phase discriminator is obtainedq、Δθd：
Figure BDA0002487985600000028
The voltage-controlled oscillator outputs an angular frequency component delta omega to the loop filterdAnd Δ ωqAveraging and carrying out integral operation to obtain small disturbance output delta theta of the voltage-controlled oscillator:
Figure BDA0002487985600000029
the invention has the beneficial effects that: the low-bandwidth symmetrical phase-locking method for inhibiting the frequency coupling effect of the grid-connected inverter has the advantages that the model structure is simple, and the meanings of all physical quantities and expressions are clear. Theoretical analysis and simulation verification prove that the bandwidth of a phase-locked loop can be obviously reduced, the control structure is symmetrical, the amplitude of a frequency coupling component in grid-connected current response can be obviously inhibited, and the stability of the system is further enhanced. Although the invention is subjected to simulation verification in a grid-connected inverter environment, the low-bandwidth symmetrical phase-locked loop structure can be used in other occasions needing frequency coupling effect suppression and has strong applicability.
Drawings
FIG. 1 is a diagram of a low bandwidth symmetrical phase locked loop control architecture;
FIG. 2 is a diagram of an SRF-PLL control architecture;
FIG. 3 is a graph of two phase locked loops transfer function versus Bode;
FIG. 4 is a structural control block diagram of a grid-connected inverter system;
FIG. 5 is a graph of output admittance versus Bode for two phase-locked loops;
fig. 6 is a schematic diagram of a grid-connected current FFT analysis result.
Detailed Description
To describe the present invention in more detail, the following further explains the present invention with reference to the drawings and the detailed derivation process.
The invention relates to a low-bandwidth symmetrical phase-locking method for inhibiting frequency coupling effect, which comprises the steps of firstly carrying out small-interference modeling on a low-bandwidth symmetrical phase-locking loop to obtain a small-interference model of the low-bandwidth symmetrical phase-locking loop; then modeling the grid-connected inverter system to obtain an admittance matrix which can correspondingly reflect the frequency coupling relation; then, the analysis of the admittance matrix verifies that the modeling of the low-bandwidth symmetrical phase-locked loop provided by the invention can obviously inhibit the frequency coupling effect; finally, simulation results show that the phase locking method can obviously inhibit the coupling frequency current response component when the grid-connected point voltage appears subsynchronous disturbance component, and the method comprises the following specific steps:
1. solving q-axis and d-axis small disturbance components of power grid voltage sent to loop filter
Figure BDA0002487985600000031
The method comprises the following substeps:
(1.1) the control structure diagram of the low-bandwidth symmetrical phase-locked loop is shown in fig. 1, the three-phase symmetrical power grid voltage is regarded as the projection of the space vector v of the actual power grid voltage on the three-phase static coordinate system of the power grid voltage, and the voltage component v under the two-phase static coordinate system is obtained by converting the space vector v by 3s/2sαβ：
Figure BDA0002487985600000032
In the formula TabcαβIs a 3s/2s transformation matrix.
(1.2) comparing the voltage component v under the two-phase static coordinate system obtained in the step (1.1)αβRespectively carrying out Park conversion and inverse Park conversion, wherein the Park conversion adopts grid voltage d-axis orientation, the inverse Park conversion adopts grid voltage q-axis orientation, and the grid voltage space vector is projected to dq-axis voltage components under a two-phase rotating coordinate system:
Figure BDA0002487985600000033
Figure BDA0002487985600000034
in the formula, the superscript "c" represents a control coordinate system, namely a coordinate system where a phase-locked loop is located; v1For static operating points of the grid voltage, V1 c+For controlling the static operating point, V, of the grid voltage when orientation of the q-axis is applied in a coordinate system1 c-The method is characterized in that the method is used for controlling a static working point of the grid voltage when d-axis orientation is adopted under a coordinate system;
Figure BDA0002487985600000035
to control the d-axis component of the perturbation voltage when using q-axis orientation in a coordinate system,
Figure BDA0002487985600000036
to control the q-axis component of the perturbation voltage when using q-axis orientation in a coordinate system,
Figure BDA0002487985600000041
to control the d-axis component of the perturbation voltage when d-axis orientation is used in the coordinate system,
Figure BDA0002487985600000042
to control the q-axis component of the perturbation voltage when d-axis orientation is used in the coordinate system,
Figure BDA0002487985600000043
is the d-axis component of the disturbance voltage when the q-axis orientation is adopted in the system coordinate system,
Figure BDA0002487985600000044
is the q-axis component of the disturbance voltage when the q-axis orientation is adopted in the system coordinate system,
Figure BDA0002487985600000045
is the d-axis component of the disturbance voltage when the d-axis orientation is adopted in the system coordinate system,
Figure BDA0002487985600000046
a disturbance voltage q-axis component when q-axis orientation is adopted under a system coordinate system; delta thetaqRepresenting the difference value of the actual phase of the power grid voltage and the phase output by the phase-locked loop when the q-axis orientation is adopted; delta thetadAnd the difference value of the actual phase of the power grid voltage and the phase output by the phase-locked loop when the d-axis orientation is adopted is shown.
Further, the two formulas are simplified to obtain a q-axis component of the voltage of the grid-connected point when the d-axis orientation is adopted in a control coordinate system
Figure BDA0002487985600000047
And the d-axis component of the grid-connected point voltage when adopting the q-axis orientation
Figure BDA0002487985600000048
Figure BDA0002487985600000049
When the grid-connected point voltage adopts d-axis orientation, its q-axis component
Figure BDA00024879856000000410
D-axis component in value and with q-axis orientation
Figure BDA00024879856000000411
Equal in numerical terms, difference in their physical meaningsOnly in the direction of the phase angle rotation.
(2) Deriving a low-bandwidth symmetric phase-locked loop small interference output delta theta for suppressing frequency coupling effects, comprising the following sub-steps:
(2.1) referring to the SRF-PLL control structure diagram of FIG. 2, the dynamic equation of the SRF-PLL in the time domain state can be obtained as follows:
Figure BDA00024879856000000412
in the formula,. DELTA.theta.qRepresenting the phase of the perturbation voltage when the q-axis orientation is adopted; k is a radical ofppRepresenting a proportional parameter, k, in a phase-locked loop filterpiRepresenting the integration parameters in the phase-locked loop filter.
(2.2) when the phase-locked loop structure shown in FIG. 1 is adopted, the two angular frequencies output by Δ ω via the loop filterd、ΔωqComprises the following steps:
Figure BDA00024879856000000413
after the two-angle frequency is subjected to an integral link, the angle delta theta required in positive and negative Park conversion can be obtainedd、Δθq，：
Figure BDA00024879856000000414
(2.3) averaging the two angular frequencies obtained in the step (2.2), and sending the two angular frequencies to a voltage-controlled oscillator to obtain a corresponding small disturbance output delta theta:
Figure BDA0002487985600000051
wherein,
Figure BDA0002487985600000052
a small disturbance model of the low-bandwidth symmetrical phase-locked loop is obtained; the bode diagrams corresponding to the two phase-locked loops obtained from the equations (5) and (7) are shown in FIG. 3, which shows that the symmetric phase-locked loop corresponding to the equation (7) can significantly reduce the SRF-PLLBandwidth.
(3) The control structure block diagram of the grid-connected inverter system is shown in FIG. 4, wherein viDenotes the pcc voltage, with subscript i ═ a, b, c, representing the phase sequence a, b, c; v represents the grid voltage; i represents a grid-connected current; v. ofd、idAnd vq、iqRespectively representing dq axis components of grid-connected point voltage and grid-connected current; i.e. idref、iqrefRespectively represent dq-axis reference currents; m isiRepresenting a three-phase modulated signal, md、mqRespectively representing dq-axis components of the three-phase modulation signal; vdcRepresents the dc bus voltage; hdi、HqiRespectively representing the transfer functions of the current inner loop proportional integral PI regulators; kdRepresenting a current inner loop decoupling coefficient; kmRepresenting a current inner loop modulation factor; thetaPLLRepresenting the phase locked loop output grid angle.
The large bandwidth of the phase-locked loop, the asymmetric current controller and the small capacitance of the direct current bus are all reasons for frequency coupling effect, and when the conditions are considered, the grid-connected inverter outputs admittance YinvExpressed as:
Figure BDA0002487985600000053
in the formula, Y11Admittance, Y, representing the response of positive sequence voltage disturbances to positive sequence current12Admittance, Y, representing the response of the coupled frequency voltage disturbance to the positive sequence current21Admittance, Y, representing the response of positive sequence voltage disturbances to coupled frequency current22Admittance, V, representing the response of a coupling frequency voltage disturbance to a coupling frequency currentpRepresenting a disturbance frequency component, V, of the disturbance voltagecRepresenting a disturbance voltage coupling frequency component, IpRepresenting the frequency component of the current response disturbance, IcRepresenting current response coupling frequency components
However, when only the influence of the pll bandwidth and its control asymmetry on the frequency coupling is considered, the following assumptions are made: the current controller is completely symmetrical, and the capacitance value of the direct current bus is larger and is regarded as a voltage source; at the moment, the frequency coupling effect is only related to the phase-locked loop, and the output admittance matrix of the grid-connected inverter is represented as:
Figure BDA0002487985600000054
Figure BDA0002487985600000055
Figure BDA0002487985600000061
Figure BDA0002487985600000062
in the formula, Z11Impedance, Z, representing the response of positive sequence voltage disturbances to positive sequence current22An impedance representing a coupling frequency voltage disturbance versus a coupling frequency current response; p11Represents the influence of the positive sequence voltage disturbance on the positive sequence voltage of the output port of the grid-connected inverter, P12Representing the influence of the coupling frequency voltage disturbance on the positive sequence voltage of the output port of the grid-connected inverter, P21Represents the influence of positive sequence voltage disturbance on the coupling frequency voltage of the output port of the grid-connected inverter, P22Representing the influence of the coupling frequency voltage disturbance on the coupling frequency voltage of the output port of the grid-connected inverter; hi(s)＝Hdi(s)＝Hqi(s) represents the current inner loop PI regulator transfer function when the current controller is symmetric; t isPLL(s) is a phase-locked loop transfer function; m1Representing the fundamental frequency components of the three-phase modulated signal,
Figure BDA0002487985600000063
represents M1Conjugation of (1); f. of1Representing the grid voltage fundamental frequency.
From the equations (9) to (12), it can be seen that T is obtained when the asymmetry of the current controller and the influence of the DC bus voltage on the frequency coupling effect are not consideredPLL(s) appear on the output admittance molecule with opposite effects on diagonal elements and off-diagonal elementsAnd (6) sounding. When the bandwidth of the phase-locked loop is larger, TPLL(s) the larger the amplitude at high frequency, the larger the amplitude of the off-diagonal element representing the frequency coupling relationship, and further the amplitude of the output impedance is reduced, so that the system stability is affected. The formula (7) shows that the low-bandwidth symmetrical phase-locked loop provided by the invention can obviously reduce the bandwidth of the phase-locked loop, and in addition, the symmetrical structure of the phase-locked loop also avoids the influence on the frequency coupling effect caused by the asymmetry of the dq axis control. By combining the analysis and Bode diagram of the output admittance comparison corresponding to the two phase-locked loops shown in FIG. 5, the phase-locked loop structure can obviously inhibit the frequency coupling effect when applied to a grid-connected inverter system.
According to the theoretical analysis and derivation, a grid-connected inverter system simulation model shown in fig. 4 is built in MATLAB/Simulink software, wherein: v1＝311V，f1＝50Hz，I1＝50A，Vdc＝650V，L＝0.42mH，Kd＝0.13，Km＝0.0014，kp＝0.48，ki＝603，kpp＝0.079，kpi＝4.95。
After the grid voltage is injected with 20Hz positive sequence disturbance, FFT analysis is performed on the grid-connected current, and the result is shown in fig. 6. From fig. 6, it can be found that when the original conventional phase-locked loop is adopted, the grid-connected point current obviously has 20Hz and 80Hz disturbance components, and the THD value is greater than 5%, and the THD value which does not meet the requirement in the grid-connected criterion is less than 5%. When the phase locking method provided by the invention is adopted, 20Hz disturbance is reduced by 24.67%, 80Hz disturbance component is reduced by 54.57%, and the THD value is 3.19%, thus meeting the grid-connection requirement.
The simulation result is consistent with the theoretical analysis and prediction result, and the invention proves that the bandwidth of the phase-locked loop can be obviously reduced, the symmetry of the dq axis control structure is realized, and the frequency coupling effect can be obviously inhibited.

Claims (1)

1. A low-bandwidth symmetrical phase locking method for suppressing the frequency coupling effect of a grid-connected inverter is characterized by being realized through a phase discriminator, a loop filter, a voltage-controlled oscillator and the like.
Three to be input by the phase discriminatorThe phase disturbance voltage is converted into a positive Park and a negative Park to obtain a grid connection point disturbance voltage q-axis component when d-axis orientation is adopted in a control coordinate system
Figure FDA0002487985590000011
And d-axis component of grid-connected point disturbance voltage when q-axis orientation is adopted
Figure FDA0002487985590000012
Feeding into a loop filter:
Figure FDA0002487985590000013
in the formula, the superscript "c" represents a control coordinate system, namely a coordinate system where a phase-locked loop is located; v1Is a static operating point of the power grid voltage;
Figure FDA00024879855900000111
a d-axis component of disturbance voltage when q-axis orientation is adopted in a system coordinate system;
Figure FDA0002487985590000014
a disturbance voltage q-axis component when q-axis orientation is adopted under a system coordinate system; delta thetaqRepresenting the difference value of the actual phase of the power grid voltage and the phase output by the phase-locked loop when the q-axis orientation is adopted; delta thetadAnd the difference value of the actual phase of the power grid voltage and the phase output by the phase-locked loop when the d-axis orientation is adopted is shown.
The loop filter is used for carrying out d-axis and q-axis small disturbance components on the power grid voltage output by the phase discriminator
Figure FDA0002487985590000015
After passing through a proportional integral regulator respectively, obtaining an angular frequency component delta omega when the d-axis orientation is adopteddAnd angular frequency component Δ ω when oriented with q-axisq：
Figure FDA0002487985590000016
In the formula, kppRepresenting a proportional parameter, k, in a phase-locked loop filterpiRepresenting an integral parameter in a phase-locked loop filter;
Figure FDA0002487985590000017
is the d-axis component of the disturbance voltage when the d-axis orientation is adopted in the system coordinate system,
Figure FDA0002487985590000018
the q-axis component of the disturbance voltage when the q-axis orientation is adopted in the system coordinate system.
Two angular frequencies Δ ωd、ΔωqAfter an integral link, the angle delta theta required by positive and negative Park conversion of the phase discriminator is obtainedq、Δθd：
Figure FDA0002487985590000019
The voltage-controlled oscillator outputs an angular frequency component delta omega to the loop filterdAnd Δ ωqAveraging and carrying out integral operation to obtain small disturbance output delta theta of the voltage-controlled oscillator:
Figure FDA00024879855900000110
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