CN111524177A - Micro-miniature high-speed binocular stereoscopic vision system of robot - Google Patents
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Abstract
The invention belongs to the field of robot digital images, and particularly discloses a microminiature high-speed binocular stereoscopic vision system of a robot. The system comprises image acquisition devices and a high-speed image processing device, wherein each image acquisition device is respectively used for acquiring image data; the high-speed image processing device takes the FPGA as a main chip, wherein the image acquisition control unit is used for sending a trigger control instruction to the image acquisition device, the image receiving unit is used for receiving image data sent by the image acquisition device, the image processing unit is used for processing the image data, and the image output unit is used for outputting the processed image data. The invention takes the FPGA as a main chip, greatly reduces the size requirement and power consumption of hardware equipment, has the characteristics of embedding, small volume and low power consumption, has strong computing capability and high algorithm output frame rate, and effectively solves the problems of poor robustness, slow computing speed and large volume and function of the traditional vision system.
Description
Technical Field
The invention belongs to the field of robot digital images, and particularly relates to a microminiature high-speed binocular stereoscopic vision system of a robot.
Background
With the rapid development of information technology and the increasingly important role of various robot devices in modern social production life, research on robots is becoming more and more important. Machine vision is an important component of the development direction of robots. The binocular vision technology is an important form of machine vision, and the principle of the binocular vision technology is that two images of a measured object are obtained from different directions and angles by using imaging equipment based on parallax, and the three-dimensional geometric information of the object is restored by calculating the position deviation between corresponding pixel points and using a mapping or three-dimensional reconstruction technology.
The stereo matching is the most important link in binocular stereo vision, and mainly comprises the steps of obtaining two groups of images at different direction angles through two imaging devices, finding corresponding characteristics in the two groups of images, finding out the corresponding relation, finally corresponding images of points in the same physical space in different images, obtaining parallax information according to a triangulation principle, obtaining the parallax information, and further obtaining depth information and three-dimensional information of a measured object through a projection model. The binocular stereo vision system has the characteristics of low cost and good adaptability, does not need additional transmitters and receivers like TOF and structured light, can adapt to image acquisition application of indoor and outdoor environments, and has the defects of binocular stereo vision. Because stereo matching is based on the corresponding feature relationship between two images to obtain parallax information, the following limitations are present:
1) the method is sensitive to ambient illumination, and when the angle and the intensity of the ambient illumination are changed, the effect of the stereo matching algorithm is rapidly reduced even when the light is strong or weak;
2) the algorithm is complex in calculation, needs to be matched and calculated pixel by pixel, is limited by factors such as a base line, a measurement range and a shooting environment, and is large in calculation amount and long in calculation time.
Disclosure of Invention
Aiming at the defects or improvement requirements in the prior art, the invention provides a robot micro-miniature high-speed binocular stereoscopic vision system, wherein a high-speed image processing device takes an FPGA (field programmable gate array) as a main chip, so that the size requirement and power consumption of hardware equipment are greatly reduced, the robot micro-miniature high-speed binocular stereoscopic vision system has the characteristics of being embedded, small in size and low in power consumption, and is high in computing capability and algorithm output frame rate, and the problems of poor robustness, low computing speed and large size and function of the traditional vision system are effectively solved.
In order to achieve the above purpose, the present invention provides a robot microminiature high-speed binocular stereo vision system, which comprises two image acquisition devices and a high-speed image processing device, wherein the two image acquisition devices have the same structure and are independent of each other, and the system comprises:
each image acquisition device is respectively used for acquiring image data and transmitting the image data to the high-speed image processing device;
the high-speed image processing device takes an FPGA as a main chip and comprises an image acquisition control unit, an image receiving unit, an image processing unit and an image output unit, wherein the image acquisition control unit is used for sending a trigger control instruction to the image acquisition device, the image receiving unit is used for receiving image data sent by the image acquisition device, the image processing unit is used for processing the image data, and the image output unit is used for outputting the processed image data.
Further preferably, the image processing unit has functions of gaussian filtering, adaptive white balance, GAMMA correction, adaptive gain, and noise removal.
As a further preferred, each of the image capturing devices respectively includes a CMOS image sensor, an IMU attitude sensor and a zooming unit, wherein the CMOS image sensor is used for performing photoelectric conversion, the IMU attitude sensor is used for measuring a three-axis attitude, and the zooming unit is used for controlling the motorized zoom lens; when the device works, a hardware trigger signal of the CMOS image sensor and a synchronous signal of the IMU attitude sensor are synchronously input by the high-speed image processing device, so that image exposure and three-axis attitude data synchronization are ensured.
Preferably, the FPGA main chip in the high-speed image processing device has the heterogeneous characteristics of ARM + FPGA, and is supplemented with DDR4 and a Flash function chip, and the trigger control instruction is sent to the image acquisition device through the FPC connector via the FPC flexible bus.
As a further preferred, the image receiving unit includes 2 high-speed LVDS interfaces, the image acquisition control unit includes 2 SPI buses and 2 hardware trigger signal lines, and the image output unit includes a USB3.0 controller and a USB3.0 interface.
More preferably, the high-speed image processing apparatus performs calculation using a stereo matching algorithm based on an FPGA platform.
Preferably, the high-speed image processing apparatus performs a uniform control process including exposure time control, analog and digital gain control, and auto white balance parameter control on the two image data based on the FPGA platform, thereby improving the calculation accuracy of the stereo matching algorithm.
Generally, compared with the prior art, the above technical solution conceived by the present invention mainly has the following technical advantages:
1. the invention aims at the problem that the two cameras in the traditional binocular stereo vision system are separated and isolated and can not keep the shutter time and the camera gain in each frame of image consistent, and correspondingly designs two image acquisition devices which are simultaneously controlled by a high-speed image processing device, so that the invention controls the two cameras simultaneously through FPGA hardware triggering on hardware, ensures that each frame of image is consistent in shutter time, ensures that each frame of image is kept always in gain, and the two cameras are kept consistent on an aperture without adjustment, thereby improving the problem that the binocular stereo vision system has poor sensitivity to ambient light, meanwhile, the high-speed image processing device of the invention takes the FPGA as a main chip, greatly reduces the size requirement and power consumption of hardware equipment, has the characteristics of embedding, small volume and low power consumption, and has strong computing capability, the algorithm has high output frame rate, and effectively solves the problems of poor robustness, low calculation speed and large volume and function of the traditional vision system;
2. in addition, the image processing unit provided by the invention has the functions of Gaussian filtering, self-adaptive white balance, GAMMA correction, self-adaptive gain and noise removal, can realize high signal-to-noise ratio digital image output, and provides clear and reliable original image information for subsequent image calibration, calibration and stereo matching;
3. meanwhile, by optimizing the structures of the image acquisition device and the high-speed image processing device, the micro-miniature low-power-consumption design meets the requirement of the robot on moving operation, the information output with the high frame rate of 100fps meets the information feedback of the robot on quick movement, and meanwhile, the operation requirement of the robot in a complex environment is ensured by the high-robustness depth map calculation.
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FIG. 1 is a schematic diagram of a robotic microminiature high-speed binocular stereo vision system constructed in accordance with a preferred embodiment of the present invention;
fig. 2 is a hardware design structure frame diagram of the robot microminiature high-speed binocular stereo vision system constructed according to the preferred embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
As shown in fig. 1, the present invention provides a robot microminiature high-speed binocular stereo vision system, which comprises two image acquisition devices and a high-speed image processing device, wherein the two image acquisition devices have the same structure and are independent of each other, and the system comprises:
the image acquisition device comprises a first image acquisition module and a second image acquisition module which are respectively used for acquiring image data and transmitting the image data to the high-speed image processing device, each image acquisition device comprises a CMOS (complementary metal oxide semiconductor) image sensor, an IMU (inertial measurement Unit) attitude sensor and a zooming unit (stm32 microcontroller), the CMOS image sensor is used for carrying out photoelectric conversion and acquiring external image information, and the image acquisition device has the characteristics of global shutter and external control triggering and the performance of high resolution and high frame rate; the IMU attitude sensor is used for measuring the three-axis attitude, so that the attitude of the system and the three-axis speed change data are output, and reliable data basis is provided for the correction and the space positioning of the robot attitude; the zooming unit is used for controlling the motorized zoom lens; when the device works, a hardware trigger signal of the CMOS image sensor and a synchronous signal of the IMU attitude sensor are synchronously input by the high-speed image processing device, so that image exposure and three-axis attitude data synchronization are ensured;
the high-speed image processing device takes the FPGA as a main chip and comprises an image acquisition control unit, an image receiving unit, an image processing unit and an image output unit, wherein the image acquisition control unit is used for sending a trigger control instruction to the image acquisition device, the image receiving unit is used for receiving image data sent by the image acquisition device, the image processing unit is used for processing the image data, and the image output unit is used for outputting the processed image data.
Further, in order to improve the robustness of the robot microminiature high-speed binocular stereo vision system to different environment measurements, the high-speed image processing device comprises an image processing ISP (image processing) framework which comprises an image acquisition firmware, an image preprocessing firmware, an automatic exposure and white balance firmware, an image correction firmware, a stereo matching algorithm firmware and an image output firmware, wherein the ISP framework has the functions of Gaussian filtering, self-adaptive white balance, GAMMA correction, self-adaptive gain and noise removal, high signal-to-noise ratio digital image output is realized, and clear and reliable original image information is provided for subsequent image calibration, calibration and stereo matching.
The Gaussian filtering algorithm realized based on the FPGA adopts a simplified Gaussian filtering kernel, generates a 5 x 5 filtering window by utilizing 4 shift registers and 25 registers, performs convolution operation on output data of the image acquisition device, and eliminates Gaussian noise of the acquired data.
The GAMMA correction is adopted to adjust the gray value of the input image, the principle is to utilize the characteristic of nonlinear transformation, and the power law expression is defined as follows:
s＝crγ
performing exponential transformation on the gray value of an input image to further correct brightness deviation, adopting different correction values aiming at different measurement environments, and selecting a correction value larger than 1 when the ambient brightness is higher, wherein the highlight part of the image is compressed and the dark tone part of the image is expanded; when the ambient brightness is dark, a correction value smaller than 1 is selected, at which time the highlight portion of the image is expanded and the shadow portion is compressed, thereby reducing the influence of the ambient brightness on the subsequent image processing.
The human visual system has color constancy, so that the observation of people on objects is not influenced by the color of a light source, but the image sensor does not have the characteristic, so that images acquired under different light source conditions become blue or red due to different light sources, the micro-miniature high-speed binocular stereo vision system of the robot is added with a white balance function, a classic gray world algorithm is adopted, the algorithm is based on the gray world assumption, for an image with a large number of colors, the average value of R, G, B three components tends to the same gray value, and based on the assumption, the average value of the three channels is calculated and determined to obtain the target gray value, so that the gain coefficients of R, G, B three channels can be obtained, and the R, G, B three-channel component of each pixel can be adjusted. Thereby eliminating the influence of ambient light on the image.
In order to adapt to the change of different indoor and outdoor illumination conditions, the microminiature high-speed binocular stereo vision system of the robot researches an adaptive gain adjustment algorithm of quick response based on FPGA.
Because the binocular stereo matching algorithm is highly sensitive to the brightness information of the left and right camera images, the gain and exposure parameters of the left and right cameras are required to be consistent in real time. Therefore, in order to achieve the purposes of adjusting the gain and exposure parameters of the camera at a high speed in real time and ensuring the adjustment parameters of the two cameras to be consistent, the system adopts a synchronous adjustment mode of the two high-speed acquisition modules, takes the image acquired by the first image acquisition module at a high speed by the image sensor as a reference, calculates the self-adaptive gain and the exposure time, and synchronously controls the gain and the exposure parameters of the two high-speed acquisition modules at the same time.
Meanwhile, in order to eliminate the influence of image noise, besides filtering is added, the method of subtracting the average value of pixel data acquired by a sensor under a non-photosensitive condition is adopted, so that the influence of noise caused by dark current and high gain on an image signal is subtracted.
Further, as shown in fig. 2, the FPGA main chip in the high-speed image processing device has the heterogeneous characteristics of ARM + FPGA, and simultaneously is supplemented with DDR4 and Flash functional chips, and a trigger control instruction is sent to the image acquisition device through the FPC connector via the FPC flexible flat cable. The image receiving unit comprises 2 high-speed LVDS interfaces; the image acquisition control unit comprises 2 SPI buses and 2 hardware trigger signal lines, the image output unit comprises a USB3.0 controller and a USB3.0 interface, and image data (including original images and depth images) processed by the high-speed image processing device are subjected to data transmission at a high frame rate through a USB3.0 high-speed transmission protocol. The FPGA chip receives the left image and the right image acquired by the two image acquisition devices through the LVDS interface, performs cache on the DDR4, performs related matching on the left image and the right image on FPGA logic, calculates depth information of a scene in the images in real time, and further outputs the left image and the right image and the corresponding depth information through the USB3.0 interface.
The high-speed image processing device is based on an FPGA platform and carries out consistent control processing on two image data, including exposure time control, analog and digital gain control and automatic white balance parameter control, so that the calculation precision of the stereo matching algorithm is improved.
Furthermore, in the aspect of miniaturization design, the embedded SoC chip is selected, and the processing chip with the ARM + FPGA combined architecture is adopted, so that the characteristics of large occupied space and high power consumption of the hardware of the binocular vision processing unit in the traditional PC-side GPU acceleration mode are avoided.
Firstly, the first image acquisition module and the second image acquisition module are properly installed according to the requirements of the users, and are ensured to be installed on the same horizontal line as much as possible, so that subsequent calibration and correction are facilitated.
The precision of binocular stereo vision depends on the calibration and calibration of images to a great extent, wherein the binocular camera is corrected according to the following principle and steps:
(1) obtaining internal parameter matrixes and distortion coefficients of the two cameras through calibration;
(2) respectively converting pixel coordinate systems of the two images into a camera coordinate system through the external parameter matrix;
(3) calculating a rotation matrix and a translation matrix of the two cameras through the internal reference matrix and the distortion coefficient, and converting a camera coordinate system into a pixel coordinate system to perform parallel epipolar line correction operation;
(4) and assigning a new image coordinate by utilizing interpolation according to the pixel value of the image source image coordinate, and finally outputting the corrected image.
The corrected images finally reach the target that the same object has the same size in the two images and is horizontally arranged on a straight line. The invention takes FPGA as the basis, transplants the correction algorithm to hardware for realization, and greatly improves the processing speed.
The method comprises the steps of calibrating distortion parameters of an acquired lens in an internal reference matrix, inputting the parameters into a written driving module, executing a correction module by the system when the system is powered on and operates, enabling corrected data to be used by a subsequent processing module, and researching a set of real-time high-speed ISP (image processing) framework based on an FPGA (field programmable gate array) in order to adapt to scene changes caused by illumination changes in different measurement environments, wherein the real-time high-speed ISP framework comprises the functions of Gaussian filtering, self-adaptive white balance, GAMMA correction, self-adaptive gain, noise removal and the like, so that high signal-to-noise ratio digital image output is realized, and clear and reliable original image information is provided for subsequent image calibration, calibration and stereo matching.
The corrected image data can flow into a stereo matching algorithm module, the stereo matching algorithm is the core of a binocular vision system, and in order to meet the requirement of high-speed processing and high-precision output, the binocular vision high-speed processing unit researches an SGBM binocular stereo matching algorithm realized based on an FPGA (field programmable gate array), realizes the output of a high-frame-rate and high-precision depth map with more than 100 frames, and has the following specific contents:
the stereo matching algorithm firstly carries out Gaussian filtering processing on input left and right images, and a Gaussian filter consists of line buffering, window buffering and a Gaussian filtering kernel. And then, calculating the Sobel gradient of the image by using a Sobel gradient calculation module, transmitting the gradient information and the gray information of the image to an initialization matching cost calculation module, and calculating the matched initialization matching cost. And then, the cost aggregation module carries out path cost aggregation by using the initialized matching cost, and the total cost is calculated by summing. The cost aggregation module has two same parts for simultaneous calculation, one of which uses the left graph as reference and searches a matching point on the right graph; the other is referenced using the right image, and the matching points are found on the left image. And the two cost aggregation modules respectively output depth map information through the WTA optimal value selection module. And the L-R checking module is used for carrying out consistency check on the depth maps with the left cost and the right cost aggregated to eliminate mismatching points and improve the matching robustness and the precision of the depth maps.
Finally, the invention adopts the combined design of double USB interfaces and Ethernet interfaces, and carries out data transmission on the image data (including the original image and the depth image) processed by the high-speed image processing module at a high frame rate through a USB3.0 high-speed transmission protocol. The maximum transmission rate of a single USB reaches 5 Gbps. And finally, the output of the raw data acquired by the two image sensor acquisition modules and the depth data after stereo matching calculation is larger than 100 frames per second at the resolution of 640 × 480. The output data can be output to an upper computer for display and output to subsequent optimization or other application equipment for use.
It will be understood by those skilled in the art that the foregoing is merely a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included within the scope of the present invention.
Claims (7)
1. The microminiature high-speed binocular stereoscopic vision system of the robot is characterized by comprising two image acquisition devices and a high-speed image processing device, wherein the two image acquisition devices have the same structure and are mutually independent, and the microminiature high-speed binocular stereoscopic vision system comprises:
each image acquisition device is respectively used for acquiring image data and transmitting the image data to the high-speed image processing device;
the high-speed image processing device takes an FPGA as a main chip and comprises an image acquisition control unit, an image receiving unit, an image processing unit and an image output unit, wherein the image acquisition control unit is used for sending a trigger control instruction to the image acquisition device, the image receiving unit is used for receiving image data sent by the image acquisition device, the image processing unit is used for processing the image data, and the image output unit is used for outputting the processed image data.
2. The robotic microminiature high-speed binocular stereo vision system of claim 1, wherein the image processing unit has gaussian filtering, adaptive white balance, GAMMA correction, adaptive gain and noise removal functions.
3. The robotic micro-miniature high-speed binocular stereoscopic vision system of claim 1, wherein each of the image capturing devices comprises a CMOS image sensor for performing photoelectric conversion, an IMU attitude sensor for measuring three-axis attitude, and a zoom unit for controlling a motorized zoom lens; when the device works, a hardware trigger signal of the CMOS image sensor and a synchronous signal of the IMU attitude sensor are synchronously input by the high-speed image processing device, so that image exposure and three-axis attitude data synchronization are ensured.
4. The system of claim 1, wherein a main chip of the FPGA in the high-speed image processing device has the heterogeneous characteristics of ARM + FPGA, and is supplemented with DDR4 and a Flash function chip, and the high-speed image processing device sends a trigger control instruction to the image acquisition device through an FPC connector and an FPC flexible bus.
5. The robotic microminiature high-speed binocular stereoscopic vision system of claim 1, wherein the image receiving unit comprises 2 high-speed LVDS interfaces, the image acquisition control unit comprises 2 SPI buses and 2 hardware trigger signal lines, and the image output unit comprises a USB3.0 controller and a USB3.0 interface.
6. The robot microminiature high-speed binocular stereo vision system according to any one of claims 1 to 5, wherein the high-speed image processing device is based on an FPGA platform and performs calculation by using a stereo matching algorithm.
7. The robotic microminiature high-speed binocular stereoscopic vision system of claim 6 wherein the high-speed image processing means performs consistent control processing of the two image data based on the FPGA platform, including exposure time control, analog and digital gain control, and auto white balance parameter control, thereby improving the computational accuracy of the stereo matching algorithm.
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Application publication date: 20200811 |