CN111521643A - Panel crack detection method and device - Google Patents
Panel crack detection method and device Download PDFInfo
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- CN111521643A CN111521643A CN202010342247.7A CN202010342247A CN111521643A CN 111521643 A CN111521643 A CN 111521643A CN 202010342247 A CN202010342247 A CN 202010342247A CN 111521643 A CN111521643 A CN 111521643A
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- 238000001514 detection method Methods 0.000 title claims abstract description 32
- 238000000034 method Methods 0.000 claims abstract description 67
- 230000036962 time dependent Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000002035 prolonged effect Effects 0.000 description 3
- 230000002159 abnormal effect Effects 0.000 description 2
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- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N27/00—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
Abstract
The invention provides a panel crack detection method and a device thereof, wherein the method comprises the following steps: determining a target characteristic parameter value of a grid scanning signal on the grid line in a primary voltage change stage, wherein the target characteristic parameter value is associated with the duration of the grid scanning signal in the primary voltage change stage; and if the target characteristic parameter value is larger than a preset parameter value, determining that the display panel has a panel crack. The panel crack detection method and the panel crack detection device provided by the invention can reduce the detection cost of the panel crack.
Description
Technical Field
The invention relates to the technical field of display, in particular to a panel crack detection method and a device thereof.
Background
In a flexible Organic Light-Emitting Diode (OLED) product, if a Panel Crack (Panel Crack) occurs, water and oxygen may intrude into an Electroluminescent (EL) element, which may cause an EL material to fail and reduce a product yield. Therefore, detecting the presence or absence of panel cracks is critical to product quality.
In the related art, a large number of resistor strings or voltage comparators need to be preset in the display device, and whether or not a panel crack occurs is determined by a rapid change in resistance or voltage, which causes a problem of high cost.
Disclosure of Invention
The embodiment of the invention provides a panel crack detection method and a device thereof, which aim to solve the problem of higher cost of detecting panel cracks in the related technology.
In order to solve the above technical problems, the present invention provides the following technical solutions:
in a first aspect, an embodiment of the present invention provides a panel crack detection method, which is applied to a display panel, where the display panel includes a gate line extending along a direction and a driving integrated circuit electrically connected to the gate line, and the driving integrated circuit provides a gate scan signal to the gate line, and the method includes:
determining a target characteristic parameter value of a grid scanning signal on the grid line in a primary voltage change stage, wherein the target characteristic parameter value is associated with the duration of the grid scanning signal in the primary voltage change stage;
and if the target characteristic parameter value is larger than a preset parameter value, determining that the display panel has a panel crack.
Further, the determining a target characteristic parameter value of the gate scan signal on the gate line in a voltage variation phase includes:
determining a first characteristic parameter value of a process of switching a grid scanning signal on the grid line from a low voltage to a high voltage;
if the target characteristic parameter value is larger than a preset parameter value, determining that a panel crack exists in the display panel, including:
and if the first characteristic parameter value is larger than a preset lifting parameter value, determining that the display panel has a panel crack.
Further, the determining a first characteristic parameter value of a process of switching the gate scan signal on the gate line from a low voltage to a high voltage includes:
and counting a first count value of an oscillator in the driving integrated circuit in the process of switching the grid scanning signal on the grid line from low voltage to high voltage.
Further, the determining a target characteristic parameter value of the gate scan signal on the gate line in a voltage variation phase includes:
determining a second characteristic parameter value of the process of switching the grid scanning signal on the grid line from high voltage to low voltage;
if the target characteristic parameter value is larger than a preset parameter value, determining that a panel crack exists in the display panel, including:
and if the second characteristic parameter value is larger than a preset descending parameter value, determining that the display panel has a panel crack.
Further, the determining a second characteristic parameter value of a process of switching the gate scan signal on the gate line from a high voltage to a low voltage includes:
and counting a second count value of an oscillator in the driving integrated circuit in the process of switching the grid scanning signal on the grid line from high voltage to low voltage.
In a second aspect, an embodiment of the present invention provides a panel crack detection apparatus, which is applied to a display panel, where the display panel includes a gate line extending along a first direction and a driving integrated circuit electrically connected to the gate line, and the driving integrated circuit provides a gate scan signal to the gate line, and the apparatus includes:
a first determining module, configured to determine a target characteristic parameter value of the gate scan signal on the gate line in a voltage change phase, where the target characteristic parameter value is associated with a duration of the gate scan signal in the voltage change phase;
and the second determining module is used for determining that the display panel has a panel crack if the target characteristic parameter value is larger than a preset parameter value.
Further, the first determining module is further configured to determine a first characteristic parameter value of a process of switching the gate scanning signal on the gate line from a low voltage to a high voltage;
the second determining module is further configured to determine that a panel crack exists in the display panel if the first characteristic parameter value is greater than a preset lifting parameter value.
Further, the first determining module is further configured to determine a second characteristic parameter value of a process of switching the gate scanning signal on the gate line from a high voltage to a low voltage;
and the second determining module is further used for determining that the display panel has a panel crack if the second characteristic parameter value is larger than a preset descending parameter value.
In a third aspect, an embodiment of the present invention provides a display device, including a processor, a memory, and a program stored on the memory and executable on the processor, where the program, when executed by the processor, implements the steps of the panel crack detection method described above.
In a fourth aspect, the embodiments of the present invention provide a readable storage medium, which stores a program that, when executed by a processor, implements the steps of the panel crack detection method as described above.
In the technical scheme provided by the invention, the grid scanning signal on the grid line is influenced by the resistance of the grid line, a gradual change process is carried out in the high-low voltage change process, the gradual change duration is in direct proportion to the resistance value of the grid line, and the occurrence of the panel crack of the display panel is equivalent to the increase of the resistance value of the grid line, so that the gradual change duration of the grid scanning signal in the high-low voltage change process is prolonged. Therefore, the technical scheme provided by the invention can reduce the cost of detecting the cracks of the panel.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without inventive exercise.
FIG. 1 is a flowchart of a method for detecting cracks in a panel according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of waveforms of voltage boosting under different conditions in a panel crack detection method according to another embodiment of the present invention;
FIG. 3 is a schematic diagram of waveforms of voltage drops under different conditions in a panel crack detection method according to another embodiment of the present invention;
FIG. 4 is a waveform diagram of gate scan signals when different resistors are connected in series;
fig. 5 is a schematic structural diagram of a panel crack detection apparatus according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The embodiment of the invention provides a panel crack detection method, which is applied to a display panel, wherein the display panel comprises a grid line extending along a direction and a drive integrated circuit electrically connected with the grid line, the drive integrated circuit provides a grid scanning signal for the grid line, and as shown in figure 1, the method comprises the following steps:
step 101: determining a target characteristic parameter value of a grid scanning signal on the grid line in a primary voltage change stage, wherein the target characteristic parameter value is associated with the duration of the grid scanning signal in the primary voltage change stage;
step 102: and if the target characteristic parameter value is larger than a preset parameter value, determining that the display panel has a panel crack.
In the embodiment of the invention, the grid scanning signals on the grid lines are influenced by the resistance of the grid lines, a gradual change process is carried out in the high-low voltage change process, the gradual change time length is in direct proportion to the resistance value of the grid lines, and the display panel has panel cracks which are equivalent to the increase of the resistance value of the grid lines, so that the gradual change time length of the grid scanning signals in the high-low voltage change process is prolonged. Therefore, the technical scheme provided by the invention can reduce the cost of detecting the cracks of the panel.
The display panel may include a gate line extending in a first direction, a data line extending in a second direction, and a pixel region defined by the gate line and the data line crossing each other. Each pixel region comprises a pixel electrode and a transistor, a control electrode of the transistor is electrically connected with a grid line, a first electrode of the transistor is electrically connected with a data line, a second electrode of the transistor is electrically connected with the pixel electrode, and a grid scanning signal on the grid line controls the connection or disconnection between the first electrode of the transistor and the second electrode of the transistor, so that the pixel electrode obtains voltage on the data line, and the light emission of the pixel is realized.
The Gate line may be a Gate driving signal electrically connected to the driving integrated circuit, or may be a Gate driving signal electrically connected to a Gate Driver on Array (GOA) unit of the Array substrate, which is not limited herein.
The gate scan signal is a square wave, as shown by a line i in fig. 2 and 3, but since the gate line itself has a certain resistance value, the gate scan signal on the gate line is affected by the resistance, and a voltage gradient process occurs when switching between a high voltage and a low voltage, as shown by a line ii in fig. 2 and 3, which is a normal phenomenon.
And the duration of the gradual change process is proportional to the resistance value of the gate line, as shown in fig. 4, the waveform a in the gradual change waveform is the waveform of the gate scanning signal not connected in series with the resistor, the waveform B is the waveform of the gate scanning signal connected in series with 68K Ω, and the waveform C is the waveform of the gate scanning signal connected in series with 136K Ω. It can be seen that the time length of the gradual change of the gate scanning signal is proportional to the resistance value of the gate line.
However, when the display panel has a panel crack, the resistance of the gate line increases, and the voltage gradient process is prolonged, as shown by line iii in fig. 2 and 3, which is an abnormal phenomenon.
The target characteristic parameter value refers to a parameter value generated by a time-dependent functional device included in the display device during a voltage change of the gate scan signal, for example: the display device itself has a timer, and the timer is triggered every 1us, so the target characteristic parameter value may be the triggering times of the timer in the process of one voltage change of the gate scanning signal.
The preset parameter value and the target characteristic parameter value are the same type of parameter, that is, when the target characteristic parameter value is the triggering frequency of the timer, the preset parameter value is also the triggering frequency of the timer.
In the embodiment of the present invention, a preset parameter value is set as a reference for determining whether the gradual change process of the gate scan signal is normal, where the preset parameter value may be a parameter value corresponding to a reference duration slightly longer than the normal gradual change duration and smaller than the abnormal gradual change duration, for example: under normal conditions, the triggering times of the gate scanning signal in the one-time voltage change stage timer is 200 times, a certain range is reserved, and the preset parameter value can be set to 230 times. By comparing the target characteristic parameter value with a preset parameter value, whether the gradual change process of the grid scanning signal is normal at each time can be judged, and whether the display panel has panel cracks or not is judged.
In an alternative embodiment of the present invention, step 101 includes:
determining a first characteristic parameter value of a process of switching a grid scanning signal on the grid line from a low voltage to a high voltage;
and if the first characteristic parameter value is larger than a preset lifting parameter value, determining that the display panel has a panel crack.
In this embodiment, as shown in fig. 2, the process of switching the gate scan signal from the low voltage to the high voltage is used to determine whether a panel crack occurs on the display panel.
The preset boosting parameter value may be derived from an estimated resistance value of the gate line, for example: after determining a basic lifting parameter value through the estimated resistance value, reserving a certain parameter range, and further determining a preset lifting parameter; or testing the products produced in the same batch and determined to have no panel cracks, reserving a certain parameter range after determining the lifting parameter value of the normal display panel, and further determining the preset lifting parameter.
After the preset boosting parameter is determined, the process that the primary grid scanning signal is switched from low voltage to high voltage is determined, and the parameter value generated by the time-dependent functional device in the period is used as the first characteristic parameter value. And comparing the first characteristic parameter value with a preset lifting parameter value, and determining that the display panel has a panel crack when the first characteristic parameter value is larger than the preset lifting parameter value.
Further, the driving integrated circuit of the display device includes an oscillator, which is a time-dependent counting device, so that the count value of the oscillator can be used as the first characteristic parameter value. Specifically, assuming that the frequency of the oscillator is F, the counting period of the oscillator may be determined to be T ═ 1/F, and the duration of the normal voltage ramp-up process may be n1F, on the basis of which n is set2As a preset boost parameter value, n2＞n1N corresponding to the process of switching the primary grid scanning signal from low voltage to high voltage3In F, n is3And n2Making comparison at n3Greater than n2And determining that the display panel has a panel crack.
For example: the frequency of the oscillator is 100Mhz, the counting period T of the oscillator is 0.01us, and the duration of the normal voltage boosting ramp process is 6.1us, then n is determined16410, n may be set2640. When it is detected that the count period of the oscillator exceeds 640 times in the process of switching the gate scan signal from the low voltage to the high voltage once, it is determined that the display panel has a panel crack.
In another alternative embodiment of the present invention, step 101 comprises:
determining a second characteristic parameter value of the process of switching the grid scanning signal on the grid line from high voltage to low voltage;
step 102 comprises:
and if the second characteristic parameter value is larger than a preset descending parameter value, determining that the display panel has a panel crack.
In this embodiment, as shown in fig. 3, the process of switching the gate scan signal from the high voltage to the low voltage is used to determine whether a panel crack occurs on the display panel.
The preset droop parameter value may be derived from an estimated resistance of the gate line, for example: after a basic descending parameter value is determined through the estimated resistance value, a certain parameter range is reserved, and then a preset descending parameter is determined; or testing the products produced in the same batch and determined to have no panel cracks, reserving a certain parameter range after determining the descending parameter value of the normal display panel, and further determining the preset descending parameter.
After the preset falling parameter is determined, the parameter value generated by the time-dependent functional device in the process of switching the primary grid scanning signal from the high voltage to the low voltage is determined as the second characteristic parameter value. And comparing the second characteristic parameter value with a preset descending parameter value, and determining that the display panel has a panel crack when the second characteristic parameter value is larger than the preset descending parameter value.
Further, the driving integrated circuit of the display device includes an oscillator, which is a time-dependent counting device, so that the count value of the oscillator can be used as the second characteristic parameter value. Specifically, assuming that the frequency of the oscillator is F, the counting period of the oscillator can be determined to be T ═ 1/F, and then the normal voltage drop ramp process is performedThe duration may be n1F, on the basis of which n is set2As a preset value of the droop parameter, n2＞n1N corresponding to the process of switching the primary grid scanning signal from high voltage to low voltage3In F, n is3And n2Making comparison at n3Greater than n2And determining that the display panel has a panel crack.
For example: when the frequency of the oscillator is 100Mhz, the counting period T of the oscillator is 0.01us, and the duration of the normal voltage drop gradual change process is 6.4us, then n is determined1640. When it is detected that the count period of the oscillator exceeds 640 times during one switching of the gate scan signal from the high voltage to the low voltage, it is determined that the display panel has a panel crack.
An embodiment of the present invention further provides a panel crack detection apparatus 500, as shown in fig. 5, which is applied to a display panel, where the display panel includes a gate line extending along a first direction and a driving integrated circuit electrically connected to the gate line, and the driving integrated circuit provides a gate scanning signal to the gate line; the panel crack detecting apparatus 500 includes:
a first determining module 510, configured to determine a target characteristic parameter value of the gate scan signal on the gate line in a voltage variation phase, where the target characteristic parameter value is associated with a duration of the gate scan signal in the voltage variation phase;
a second determining module 520, configured to determine that a panel crack exists in the display panel if the target characteristic parameter value is greater than a preset parameter value.
Optionally, the first determining module 510 is further configured to determine a first characteristic parameter value of a process of switching the gate scanning signal on the gate line from a low voltage to a high voltage;
the second determining module 520 is further configured to determine that a panel crack exists in the display panel if the first characteristic parameter value is greater than a preset lifting parameter value.
Optionally, the first determining module 510 is further configured to determine a second characteristic parameter value of a process of switching the gate scanning signal on the gate line from a high voltage to a low voltage;
the second determining module 520 is further configured to determine that a panel crack exists in the display panel if the second characteristic parameter value is greater than a preset dropping parameter value.
The panel crack detection apparatus 500 according to the embodiment of the present invention can implement each process implemented by the panel crack detection method according to the method embodiments of fig. 1 to fig. 4, and for avoiding repetition, details are not described here again.
The embodiment of the invention also provides a display device, which comprises the panel crack detection device 500.
The display device includes but is not limited to: radio frequency unit, network module, audio output unit, input unit, sensor, display unit, user input unit, interface unit, memory, processor, and power supply. It will be appreciated by those skilled in the art that the above described configuration of the display device does not constitute a limitation of the display device, and that the display device may comprise more or less of the components described above, or some components may be combined, or a different arrangement of components. In the embodiment of the present invention, the display device includes, but is not limited to, a display, a mobile phone, a tablet computer, a television, a wearable electronic device, a navigation display device, virtual reality glasses, and the like.
Wherein the processor is configured to: determining a target characteristic parameter value of a grid scanning signal on the grid line in a primary voltage change stage, wherein the target characteristic parameter value is associated with the duration of the grid scanning signal in the primary voltage change stage;
and if the target characteristic parameter value is larger than a preset parameter value, determining that the display panel has a panel crack.
Optionally, the determining a target characteristic parameter value of the gate scanning signal on the gate line at a primary voltage variation stage includes:
determining a first characteristic parameter value of a process of switching a grid scanning signal on the grid line from a low voltage to a high voltage;
if the target characteristic parameter value is larger than a preset parameter value, determining that a panel crack exists in the display panel, including:
and if the first characteristic parameter value is larger than a preset lifting parameter value, determining that the display panel has a panel crack.
Optionally, the determining a first characteristic parameter value of a process of switching the gate scan signal on the gate line from a low voltage to a high voltage includes:
and counting a first count value of an oscillator in the driving integrated circuit in the process of switching the grid scanning signal on the grid line from low voltage to high voltage.
Optionally, the determining a target characteristic parameter value of the gate scanning signal on the gate line at a primary voltage variation stage includes:
determining a second characteristic parameter value of the process of switching the grid scanning signal on the grid line from high voltage to low voltage;
if the target characteristic parameter value is larger than a preset parameter value, determining that a panel crack exists in the display panel, including:
and if the second characteristic parameter value is larger than a preset descending parameter value, determining that the display panel has a panel crack.
Optionally, the determining a second characteristic parameter value of a process of switching the gate scan signal on the gate line from a high voltage to a low voltage includes:
and counting a second count value of an oscillator in the driving integrated circuit in the process of switching the grid scanning signal on the grid line from high voltage to low voltage.
The display device can implement each process implemented by the panel crack detection device in the foregoing embodiments, and is not described here again to avoid repetition.
The display device provided by the embodiment of the invention can reduce the cost of detecting the cracks of the panel.
Preferably, an embodiment of the present invention further provides a display device, including the processor, the memory, and a program stored in the memory and capable of running on the processor, where the program, when executed by the processor, implements the processes of the panel crack detection method embodiment, and can achieve the same technical effects, and details are not repeated here to avoid repetition.
The embodiment of the present invention further provides a readable storage medium, where a program is stored on the readable storage medium, and when the program is executed by a processor, the program implements each process of the above-mentioned panel crack detection method embodiment, and can achieve the same technical effect, and in order to avoid repetition, the detailed description is omitted here. The readable storage medium may be a Read-only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
While the present invention has been described with reference to the embodiments shown in the drawings, the present invention is not limited to the embodiments, which are illustrative and not restrictive, and it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (10)
1. A panel crack detection method is applied to a display panel, the display panel comprises a grid line extending along a direction and a drive integrated circuit electrically connected with the grid line, and the drive integrated circuit provides a grid scanning signal to the grid line, and the method is characterized by comprising the following steps:
determining a target characteristic parameter value of a grid scanning signal on the grid line in a primary voltage change stage, wherein the target characteristic parameter value is associated with the duration of the grid scanning signal in the primary voltage change stage;
and if the target characteristic parameter value is larger than a preset parameter value, determining that the display panel has a panel crack.
2. The method for detecting cracks of a panel according to claim 1, wherein the determining the target characteristic parameter value of the gate scanning signal on the gate line in a voltage change stage comprises:
determining a first characteristic parameter value of a process of switching a grid scanning signal on the grid line from a low voltage to a high voltage;
if the target characteristic parameter value is larger than a preset parameter value, determining that a panel crack exists in the display panel, including:
and if the first characteristic parameter value is larger than a preset lifting parameter value, determining that the display panel has a panel crack.
3. The panel crack detection method of claim 2, wherein the determining the first characteristic parameter value of the process of switching the gate scanning signal on the gate line from the low voltage to the high voltage comprises:
and counting a first count value of an oscillator in the driving integrated circuit in the process of switching the grid scanning signal on the grid line from low voltage to high voltage.
4. The method for detecting cracks of a panel according to claim 1, wherein the determining the target characteristic parameter value of the gate scanning signal on the gate line in a voltage change stage comprises:
determining a second characteristic parameter value of the process of switching the grid scanning signal on the grid line from high voltage to low voltage;
if the target characteristic parameter value is larger than a preset parameter value, determining that a panel crack exists in the display panel, including:
and if the second characteristic parameter value is larger than a preset descending parameter value, determining that the display panel has a panel crack.
5. The panel crack detection method of claim 4, wherein the determining the second characteristic parameter value of the process of switching the gate scanning signal on the gate line from the high voltage to the low voltage comprises:
and counting a second count value of an oscillator in the driving integrated circuit in the process of switching the grid scanning signal on the grid line from high voltage to low voltage.
6. A panel crack detection device is applied to a display panel, the display panel comprises a grid line extending along a first direction and a drive integrated circuit electrically connected with the grid line, the drive integrated circuit provides a grid scanning signal to the grid line, and the panel crack detection device is characterized by comprising:
a first determining module, configured to determine a target characteristic parameter value of the gate scan signal on the gate line in a voltage change phase, where the target characteristic parameter value is associated with a duration of the gate scan signal in the voltage change phase;
and the second determining module is used for determining that the display panel has a panel crack if the target characteristic parameter value is larger than a preset parameter value.
7. The panel crack detection device of claim 6, wherein the first determining module is further configured to determine a first characteristic parameter value of a process of switching the gate scanning signal on the gate line from a low voltage to a high voltage;
the second determining module is further configured to determine that a panel crack exists in the display panel if the first characteristic parameter value is greater than a preset lifting parameter value.
8. The panel crack detection device of claim 6, wherein the first determination module is further configured to determine a second characteristic parameter value of a process of switching the gate scan signal on the gate line from a high voltage to a low voltage;
and the second determining module is further used for determining that the display panel has a panel crack if the second characteristic parameter value is larger than a preset descending parameter value.
9. A display device comprising a processor, a memory and a program stored on the memory and executable on the processor, the program when executed by the processor implementing the steps of the panel crack detection method of any of claims 1 to 5.
10. A readable storage medium, characterized in that the readable storage medium has stored thereon a program which, when being executed by a processor, carries out the steps of the panel crack detection method according to any one of claims 1 to 5.
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Application publication date: 20200811 |