CN111506501A - Test instruction set generation method and device and electronic equipment - Google Patents
Test instruction set generation method and device and electronic equipment Download PDFInfo
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Abstract
The embodiment of the invention provides a method, a device and electronic equipment for generating a test instruction set, which can be used for constructing a command frame according to a frame format by using acquired data after acquiring the frame format and data contained in the command frame to be constructed; and after acquiring the execution logic between the constructed command frames, generating a test instruction set by combining the constructed command frames and the execution logic. By applying the scheme provided by the embodiment of the invention, the command frame can be constructed according to the acquired frame format and data, the test instruction set is customized by utilizing the execution logic and the command frame, and the test task is quickly completed; and the tester can modify the test instruction set in real time according to the test effect, gradually improve the test flow and finally form a set of test flow standards. After the test instruction set is determined, the multiplexing can be rapidly carried out, and the repeated labor is avoided, so that the working efficiency can be improved to the maximum extent, the test cost is reduced, and the equipment quality is ensured.
Description
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a method and an apparatus for generating a test instruction set, and an electronic device.
Background
The current serial port tool only has a universal function, namely after a test command is obtained, the test command is sent to the device to be tested through the serial port, and when a return result is received through the serial port, the device to be tested is determined to pass the test. In the existing scheme, the method is suitable for simple logic instruction testing, and for the condition that the logic is complex, such as a plurality of test commands are involved, and execution logic exists among the test commands, the market has almost no available serial port tool at present.
However, in practical applications, it is often necessary to execute a plurality of or a whole set of test commands according to a certain logic or condition to verify whether the device meets the design requirements. Corresponding to the requirement, in the first implementation manner, the execution logic needs to be set manually and the test commands need to be input one by one, which is time-consuming, labor-consuming and difficult to test, and the test method cannot be inherited, that is, when the same test task is faced next time, different testers need to reset the execution logic and input the test commands one by one;
in the second implementation manner, a set of dedicated serial port tools needs to be customized and developed according to the requirement, and the serial port tools have execution of a series of development processes such as development cycle, requirement docking and the like, so that the test cost is increased, the test progress is influenced, the modification cost needs to be increased along with continuous promotion of services and change of requirements, and the project group also needs to undertake maintenance of the customized software, and the maintenance cost is increased.
Disclosure of Invention
The embodiment of the invention aims to provide a method and a device for generating a test instruction set and electronic equipment, so that a set of test instruction sets can be formed aiming at a test task, the test instruction sets can be multiplexed, and repeated operation is avoided. The specific technical scheme is as follows:
in one aspect of the present invention, a method for generating a test instruction set is provided, which is applied to a serial port tool, and the method includes:
acquiring a frame format and data contained in a command frame to be constructed, wherein the frame format comprises: frame header, version, command word, data length and frame tail;
constructing a command frame according to the frame format by using the acquired data;
acquiring execution logic between the constructed command frames;
generating a set of test instructions in conjunction with the constructed command frame and the execution logic.
Optionally, the step of generating a test instruction set by combining the constructed command frame and the execution logic includes:
establishing connection with a test instruction set verification device through a serial port;
sending a command frame contained in the test instruction set to the test instruction set verification equipment through the serial port according to the execution logic;
and under the condition of receiving a test result fed back by the test instruction set verification device through the serial port, generating a test instruction set by combining the constructed command frame and the execution logic.
Optionally, the method further includes:
and sending a prompt message that the command frame contained in the test instruction set has errors to a tester under the condition that a test result fed back by the test instruction set verification device through the serial port is not received.
Optionally, the method further includes:
acquiring correction information for correcting the test instruction set;
updating the set of test instructions with the retrieved revision information.
Optionally, the method further includes:
according to execution logic contained in the updated test instruction set, sending a command frame contained in the updated test instruction set to the test instruction set verification equipment through the serial port;
and under the condition of receiving the test result fed back by the test instruction set verification equipment through the serial port, taking the updated test instruction set as a final test instruction set.
In another aspect of the present invention, there is provided a device for generating a test instruction set, applied to a serial port tool, the device including:
the first obtaining module is used for obtaining a frame format and data contained in a command frame to be constructed, wherein the frame format comprises: frame header, version, command word, data length and frame tail;
the building module is used for building a command frame according to the frame format by using the acquired data;
the second acquisition module is used for acquiring execution logic between the constructed command frames;
and the generating module is used for combining the constructed command frame with the execution logic to generate a test instruction set.
Optionally, the generating module is configured to
Establishing connection with a test instruction set verification device through a serial port;
sending a command frame contained in the test instruction set to the test instruction set verification equipment through the serial port according to the execution logic;
and under the condition of receiving a test result fed back by the test instruction set verification device through the serial port, generating a test instruction set by combining the constructed command frame and the execution logic.
Optionally, the apparatus further comprises:
and the sending module is used for sending a prompt message that the command frame contained in the test instruction set has errors to a tester under the condition that the test result fed back by the test instruction set verification device through the serial port is not received.
In an implementation manner of the embodiment of the present invention, the apparatus further includes:
the third acquisition module is used for acquiring correction information used for correcting the test instruction set;
and the correction module is used for updating the test instruction set by using the acquired correction information.
Optionally, the apparatus further comprises:
according to execution logic contained in the updated test instruction set, sending a command frame contained in the updated test instruction set to the test instruction set verification equipment through the serial port;
and the confirmation module is used for taking the updated test instruction set as a final test instruction set under the condition of receiving the test result fed back by the test instruction set verification device through the serial port.
In another aspect of the present invention, an electronic device is further provided, which includes a processor, a communication interface, a memory, and a communication bus, where the processor, the communication interface, and the memory complete communication with each other through the communication bus;
a memory for storing processor-executable instructions;
and the processor is used for realizing the generation method of the test instruction set when executing the instructions stored in the memory.
In yet another aspect of the present invention, there is also provided a computer-readable storage medium, in which a computer program is stored, and the computer program, when executed by a processor, implements the method for generating the test instruction set described in any one of the above.
In yet another aspect of the present invention, there is also provided a computer program product containing instructions which, when run on a computer, cause the computer to perform the method for generating a test instruction set as described in any one of the above embodiments.
According to the method, the device and the electronic equipment for generating the test instruction set, provided by the embodiment of the invention, after the frame format and the data contained in the command frame to be constructed are obtained, the command frame can be constructed according to the frame format by using the obtained data; and after acquiring the execution logic between the constructed command frames, generating a test instruction set by combining the constructed command frames and the execution logic.
By applying the scheme provided by the embodiment of the invention, the command frame can be constructed according to the acquired frame format and data on the basis of not increasing manpower and maintenance cost, and the test instruction set is customized by utilizing the execution logic and the command frame, so that the test task is rapidly completed; and the tester can modify the test instruction set in real time according to the test effect, gradually improve the test flow and finally form a set of test flow standards. After the test instruction set is determined, the multiplexing can be rapidly carried out, and the repeated labor is avoided, so that the working efficiency can be improved to the maximum extent, the test cost is reduced, and the equipment quality is ensured.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a flowchart illustrating a method for generating a test instruction set according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a test instruction set generating apparatus according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, a flow chart of a method for generating a test instruction set according to an embodiment of the present invention is shown, where the method includes:
s100, acquiring a frame format and data contained in a command frame to be constructed.
Wherein, the frame format comprises: frame header, version, command word, data length, and frame end.
In implementation, the frame header: the mark of the start of the frame, the number of bytes occupied.
Version: version number of data, number of bytes occupied.
Command word: coding of frame function type, number of bytes occupied.
Data length: the data length and the number of occupied bytes of the frame function content.
And (4) frame end: end of frame marker, number of bytes occupied.
And S110, constructing a command frame according to a frame format by using the acquired data.
In implementation, the serial tool can display each part defined by the frame format in the upper computer interface, a tester can input data corresponding to each part of each command frame through the upper computer interface, and correspondingly, after the serial tool acquires the data contained in the command frame to be constructed through the upper computer interface, the serial tool can sequentially fill the data according to the defined frame format to obtain the command frame.
And S120, acquiring execution logic between the constructed command frames.
In implementation, when entering the frame format through the upper computer interface, a tester may also input an execution logic of each command frame time, where the execution logic is a frame relationship between command frames, such as an inter-frame call relationship and an inter-frame execution sequence relationship.
And S130, generating a test instruction set by combining the constructed logical relationship between the command frames and the frames.
In implementation, in order to ensure the correctness of the generated test instruction set, the connection with the test instruction set verification device can be established through the serial port; and sending command frames contained in the test instruction set to the test instruction set verification equipment through the serial port according to the execution logic so as to verify the correctness of each command frame and the execution logic.
Specifically, when a test result fed back by the test instruction set verification device through the serial port is received, it is indicated that each command frame and the execution logic are correct, so that the constructed command frame and the execution logic can be combined to generate the test instruction set.
And under the condition that the test result fed back by the test instruction set verification equipment through the serial port is not received, prompt information that the command frame contained in the test instruction set has errors can be sent to the tester.
After receiving the prompt message, the tester may modify the command frame and the execution logic, and accordingly, after obtaining the modification information for modifying the test instruction set, update the test instruction set with the obtained modification information.
After the test instruction set is updated, testing can be performed again, namely according to execution logic contained in the updated test instruction set, a command frame contained in the updated test instruction set is sent to the test instruction set verification device through the serial port; and under the condition of receiving a test result fed back by the test instruction set verification device through the serial port, taking the updated test instruction set as a final test instruction set.
By applying the scheme provided by the embodiment of the invention, the command frame can be constructed according to the acquired frame format and data on the basis of not increasing manpower and maintenance cost, and the test instruction set is customized by utilizing the execution logic and the command frame, so that the test task is rapidly completed; and the tester can modify the test instruction set in real time according to the test effect, gradually improve the test flow and finally form a set of test flow standards. After the test instruction set is determined, the multiplexing can be rapidly carried out, and the repeated labor is avoided, so that the working efficiency can be improved to the maximum extent, the test cost is reduced, and the equipment quality is ensured.
Referring to fig. 2, a schematic structural diagram of a test instruction set generating device provided in an embodiment of the present invention is applied to a serial port tool, and the device includes:
a first obtaining module 200, configured to obtain a frame format and data included in a command frame to be constructed, where the frame format includes: frame header, version, command word, data length and frame tail;
a constructing module 210, configured to construct a command frame according to the frame format by using the acquired data;
a second obtaining module 220, configured to obtain execution logic between the constructed command frames;
a generating module 230 for generating a set of test instructions in conjunction with the constructed command frame and the execution logic.
In an implementation manner of the embodiment of the present invention, the generating module 230 is configured to generate the first reference signal
Establishing connection with a test instruction set verification device through a serial port;
sending a command frame contained in the test instruction set to the test instruction set verification equipment through the serial port according to the execution logic;
and under the condition of receiving a test result fed back by the test instruction set verification device through the serial port, generating a test instruction set by combining the constructed command frame and the execution logic.
In an implementation manner of the embodiment of the present invention, the apparatus further includes:
and the sending module is used for sending a prompt message that the command frame contained in the test instruction set has errors to a tester under the condition that the test result fed back by the test instruction set verification device through the serial port is not received.
In an implementation manner of the embodiment of the present invention, the apparatus further includes:
the third acquisition module is used for acquiring correction information used for correcting the test instruction set;
and the correction module is used for updating the test instruction set by using the acquired correction information.
In an implementation manner of the embodiment of the present invention, the apparatus further includes:
according to execution logic contained in the updated test instruction set, sending a command frame contained in the updated test instruction set to the test instruction set verification equipment through the serial port;
and the confirmation module is used for taking the updated test instruction set as a final test instruction set under the condition of receiving the test result fed back by the test instruction set verification device through the serial port.
By applying the scheme provided by the embodiment of the invention, the command frame can be constructed according to the acquired frame format and data on the basis of not increasing manpower and maintenance cost, and the test instruction set is customized by utilizing the execution logic and the command frame, so that the test task is rapidly completed; and the tester can modify the test instruction set in real time according to the test effect, gradually improve the test flow and finally form a set of test flow standards. After the test instruction set is determined, the multiplexing can be rapidly carried out, and the repeated labor is avoided, so that the working efficiency can be improved to the maximum extent, the test cost is reduced, and the equipment quality is ensured.
An embodiment of the present invention further provides an electronic device, as shown in fig. 3, including a processor 001, a communication interface 002, a memory 003 and a communication bus 004, where the processor 001, the communication interface 002 and the memory 003 complete mutual communication through the communication bus 004,
a memory 003 for storing processor-executable instructions;
the processor 001, when executing the instructions stored in the memory 003, is configured to implement the method for generating a test instruction set according to any one of the above embodiments, wherein the method includes:
acquiring a frame format and data contained in a command frame to be constructed, wherein the frame format comprises: frame header, version, command word, data length and frame tail;
constructing a command frame according to the frame format by using the acquired data;
acquiring execution logic between the constructed command frames;
generating a set of test instructions in conjunction with the constructed command frame and the execution logic.
By applying the scheme provided by the embodiment of the invention, the command frame can be constructed according to the acquired frame format and data on the basis of not increasing manpower and maintenance cost, and the test instruction set is customized by utilizing the execution logic and the command frame, so that the test task is rapidly completed; and the tester can modify the test instruction set in real time according to the test effect, gradually improve the test flow and finally form a set of test flow standards. After the test instruction set is determined, the multiplexing can be rapidly carried out, and the repeated labor is avoided, so that the working efficiency can be improved to the maximum extent, the test cost is reduced, and the equipment quality is ensured.
The communication bus mentioned in the electronic device may be a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like. The communication bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is shown, but this does not mean that there is only one bus or one type of bus.
The communication interface is used for communication between the electronic equipment and other equipment.
The Memory may include a Random Access Memory (RAM) or a Non-Volatile Memory (NVM), such as at least one disk Memory. Optionally, the memory may also be at least one memory device located remotely from the processor.
The Processor may be a general-purpose Processor, including a Central Processing Unit (CPU), a Network Processor (NP), and the like; but may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic device, discrete hardware component.
In another embodiment of the present invention, a computer-readable storage medium is further provided, in which a computer program is stored, and the computer program, when executed by a processor, implements a method for generating a test instruction set according to any one of the above methods, where the method includes:
acquiring a frame format and data contained in a command frame to be constructed, wherein the frame format comprises: frame header, version, command word, data length and frame tail;
constructing a command frame according to the frame format by using the acquired data;
acquiring execution logic between the constructed command frames;
generating a set of test instructions in conjunction with the constructed command frame and the execution logic.
By applying the scheme provided by the embodiment of the invention, the command frame can be constructed according to the acquired frame format and data on the basis of not increasing manpower and maintenance cost, and the test instruction set is customized by utilizing the execution logic and the command frame, so that the test task is rapidly completed; and the tester can modify the test instruction set in real time according to the test effect, gradually improve the test flow and finally form a set of test flow standards. After the test instruction set is determined, the multiplexing can be rapidly carried out, and the repeated labor is avoided, so that the working efficiency can be improved to the maximum extent, the test cost is reduced, and the equipment quality is ensured.
In another embodiment, the present invention further provides a computer program product containing instructions, which when run on a computer, causes the computer to execute the method for generating a test instruction set according to any one of the above embodiments, wherein the method includes:
acquiring a frame format and data contained in a command frame to be constructed, wherein the frame format comprises: frame header, version, command word, data length and frame tail;
constructing a command frame according to the frame format by using the acquired data;
acquiring execution logic between the constructed command frames;
generating a set of test instructions in conjunction with the constructed command frame and the execution logic.
By applying the scheme provided by the embodiment of the invention, the command frame can be constructed according to the acquired frame format and data on the basis of not increasing manpower and maintenance cost, and the test instruction set is customized by utilizing the execution logic and the command frame, so that the test task is rapidly completed; and the tester can modify the test instruction set in real time according to the test effect, gradually improve the test flow and finally form a set of test flow standards. After the test instruction set is determined, the multiplexing can be rapidly carried out, and the repeated labor is avoided, so that the working efficiency can be improved to the maximum extent, the test cost is reduced, and the equipment quality is ensured.
The computer instructions may be stored in or transmitted from one computer-readable storage medium to another computer-readable storage medium, e.g., from one website site, computer, server, or data center via a wired (e.g., coaxial cable, optical fiber, digital subscriber line (DS L)) or wireless (e.g., infrared, wireless, microwave, etc.) manner to another website site, computer, server, or data center.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
In this application, the terms "upper", "lower", "inner", "middle", "outer", "front", "rear", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings. These terms are used primarily to better describe the present application and its embodiments, and are not used to limit the indicated devices, elements or components to a particular orientation or to be constructed and operated in a particular orientation.
Moreover, some of the above terms may be used to indicate other meanings besides the orientation or positional relationship, for example, the term "on" may also be used to indicate some kind of attachment or connection relationship in some cases. The specific meaning of these terms in this application will be understood by those of ordinary skill in the art as appropriate.
Furthermore, the terms "disposed," "connected," "disposed," and "communicating" are to be construed broadly. For example, "connected" may be a fixed connection, a detachable connection, or a unitary construction; can be a mechanical connection, or an electrical connection; may be directly connected, or indirectly connected through intervening media, or may be in internal communication between two devices, elements or components. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.
All the embodiments in the present specification are described in a related manner, and the same and similar parts among the embodiments may be referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, as for the device and electronic apparatus embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference may be made to some descriptions of the method embodiments for relevant points.
The above description is only for the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention shall fall within the protection scope of the present invention.
Claims (10)
1. A method for generating a test instruction set is applied to a serial port tool, and comprises the following steps:
acquiring a frame format and data contained in a command frame to be constructed, wherein the frame format comprises: frame header, version, command word, data length and frame tail;
constructing a command frame according to the frame format by using the acquired data;
acquiring execution logic between the constructed command frames;
generating a set of test instructions in conjunction with the constructed command frame and the execution logic.
2. The generation method of claim 1, wherein the step of generating a set of test instructions in conjunction with the constructed command frame and the execution logic comprises:
establishing connection with a test instruction set verification device through a serial port;
sending a command frame contained in the test instruction set to the test instruction set verification equipment through the serial port according to the execution logic;
and under the condition of receiving a test result fed back by the test instruction set verification device through the serial port, generating a test instruction set by combining the constructed command frame and the execution logic.
3. The generation method of claim 2, wherein the method further comprises:
and sending a prompt message that the command frame contained in the test instruction set has errors to a tester under the condition that a test result fed back by the test instruction set verification device through the serial port is not received.
4. The generation method of claim 3, wherein the method further comprises:
acquiring correction information for correcting the test instruction set;
updating the set of test instructions with the retrieved revision information.
5. The generation method of claim 4, wherein the method further comprises:
according to execution logic contained in the updated test instruction set, sending a command frame contained in the updated test instruction set to the test instruction set verification equipment through the serial port;
and under the condition of receiving the test result fed back by the test instruction set verification equipment through the serial port, taking the updated test instruction set as a final test instruction set.
6. A generation device of a test instruction set is applied to a serial port tool, and comprises:
the first obtaining module is used for obtaining a frame format and data contained in a command frame to be constructed, wherein the frame format comprises: frame header, version, command word, data length and frame tail;
the building module is used for building a command frame according to the frame format by using the acquired data;
the second acquisition module is used for acquiring execution logic between the constructed command frames;
and the generating module is used for combining the constructed command frame with the execution logic to generate a test instruction set.
7. The apparatus of claim 6, wherein the generating means is to generate
Establishing connection with a test instruction set verification device through a serial port;
sending a command frame contained in the test instruction set to the test instruction set verification equipment through the serial port according to the execution logic;
and under the condition of receiving a test result fed back by the test instruction set verification device through the serial port, generating a test instruction set by combining the constructed command frame and the execution logic.
8. The apparatus of claim 7, wherein the apparatus further comprises:
and the sending module is used for sending a prompt message that the command frame contained in the test instruction set has errors to a tester under the condition that the test result fed back by the test instruction set verification device through the serial port is not received.
9. The apparatus of claim 8, wherein the apparatus further comprises:
the third acquisition module is used for acquiring correction information used for correcting the test instruction set;
and the correction module is used for updating the test instruction set by using the acquired correction information.
10. An electronic device is characterized by comprising a processor, a communication interface, a memory and a communication bus, wherein the processor and the communication interface are used for realizing mutual communication by the memory through the communication bus;
a memory for storing processor-executable instructions;
a processor for implementing the method of generating a test instruction set according to any one of claims 1 to 5 when executing instructions stored in a memory.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112559039A (en) * | 2020-12-03 | 2021-03-26 | 类人思维(山东)智慧科技有限公司 | Instruction set generation method and system for computer programming |
| CN114500350A (en) * | 2021-12-27 | 2022-05-13 | 中国航天空气动力技术研究院 | Ground station instruction verification system |
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