CN111506349A - Calculation board card with OODA (on-off-the-digital-analog) multiprocessor - Google Patents
Calculation board card with OODA (on-off-the-digital-analog) multiprocessor Download PDFInfo
- Publication number
- CN111506349A CN111506349A CN202010363731.8A CN202010363731A CN111506349A CN 111506349 A CN111506349 A CN 111506349A CN 202010363731 A CN202010363731 A CN 202010363731A CN 111506349 A CN111506349 A CN 111506349A
- Authority
- CN
- China
- Prior art keywords
- ooda
- processor
- processors
- multiprocessor
- algorithm
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004364 calculation method Methods 0.000 title claims abstract description 13
- 238000004422 calculation algorithm Methods 0.000 claims abstract description 32
- 230000006870 function Effects 0.000 claims abstract description 5
- 238000012545 processing Methods 0.000 claims description 24
- 238000010801 machine learning Methods 0.000 claims description 6
- 238000012549 training Methods 0.000 claims description 6
- 238000004891 communication Methods 0.000 claims description 3
- 238000005192 partition Methods 0.000 claims description 3
- 238000000034 method Methods 0.000 abstract description 4
- 238000004519 manufacturing process Methods 0.000 abstract description 2
- 238000013461 design Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 230000001133 acceleration Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- RZVHIXYEVGDQDX-UHFFFAOYSA-N 9,10-anthraquinone Chemical compound C1=CC=C2C(=O)C3=CC=CC=C3C(=O)C2=C1 RZVHIXYEVGDQDX-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000013144 data compression Methods 0.000 description 1
- 238000012417 linear regression Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/54—Interprogram communication
- G06F9/544—Buffers; Shared memory; Pipes
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N20/00—Machine learning
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2209/00—Indexing scheme relating to G06F9/00
- G06F2209/50—Indexing scheme relating to G06F9/50
- G06F2209/5011—Pool
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multimedia (AREA)
- Artificial Intelligence (AREA)
- Computer Vision & Pattern Recognition (AREA)
- Data Mining & Analysis (AREA)
- Evolutionary Computation (AREA)
- Medical Informatics (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- Multi Processors (AREA)
Abstract
The invention discloses a calculation board card with an OODA (on-off-the-shelf) multiprocessor, which comprises four OODA processors with different calculation functions, wherein the four processors distribute different workflow jobs through a scheduling controller; when a stream type operation is processed, the four processors are circularly called in turn according to a preset calculation sequence, and the stream type operation is executed. When the four processors process the OODA workflow loads, four types of calculation algorithms including observation, adjustment, scenario and action are respectively executed, and according to the characteristic that the OODA workload sequentially occupies different processors, a plurality of OODA workloads sequentially occupy different processors, so that the execution efficiency of a load production line is improved.
Description
Technical Field
The invention relates to a computing board card with an OODA (on-off optical data acquisition) multiprocessor.
Background
With the calculation task of the OODA Workflow (Workflow) with the front-back dependency relationship, the calculation task gradually becomes a main calculation load, and the structural design of the calculation board gradually extends to the design idea of processing the calculation load in a 'streaming mode'. However, it is difficult for existing board designs to guarantee that the compute board can efficiently perform OODA-like workload in a pipelined manner.
OODA Ring theory (OODA L oop), originally proposed by the United states air force school John Boyd in 1966, is the main model framework for describing the military command decision process.
Disclosure of Invention
The invention aims to provide a computing board with an OODA (on-off optical disk) multiprocessor, which is used for solving the problem that the design of the existing board is difficult to ensure that the OODA workflow load can be executed in an efficient pipeline mode by the computing board.
In order to solve the technical problem, the invention provides a computing board card with an OODA (on-off-the-digital-architecture) multiprocessor, which comprises four OODA processors with different computing functions, wherein the four processors distribute different workflow jobs through a scheduling controller; when a stream type operation is processed, the four processors are circularly called in turn according to a preset calculation sequence, and the stream type operation is executed.
Furthermore, each processor is directly connected with the same shared memory, and data transmission between partitions is performed through the shared memory.
Further, the four processors include a first processor, a second processor, a third processor, and a fourth processor; the first processor is matched with an observation algorithm and used for processing data matching type operation; the second processor is matched with an adjusting algorithm and used for processing training type operation of machine learning; the third processor is matched with a imagination class algorithm and is used for processing inference class operation of machine learning; and the fourth processor is matched with an action algorithm and used for processing control algorithm operation.
Further, the OODA class workload may be divided into a plurality of OODA processing flows, one OODA class workload includes a plurality of sub-jobs, and a single sub-job needs to occupy the first processor, the second processor, the third processor, and the fourth processor in sequence.
Further, when a plurality of OODA workloads occupy the same OODA multiprocessor computing card at the same time, different workflow jobs are caused to occupy the processors in sequence.
Furthermore, the shared memory of each computing board card is directly connected with three resource pool interconnection interfaces for accessing the communication interfaces of the processors of other computing board cards.
The invention has the beneficial effects that: the computer board card can process the workflow with OODA independent steps in a way of processing the workflow in a pipeline way by four processors and sharing board card memory, so that 'board card level' multi-workflow parallel execution is realized, the processing efficiency of processing the workflow is improved, and the parallel pipeline acceleration of the workflow task is realized.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:
fig. 1 is a schematic structural diagram of a computing board of an OODA multiprocessor according to an embodiment of the present invention;
FIG. 2 is an exemplary diagram of OODA workflow loads according to one embodiment of the invention;
FIG. 3 is an exemplary diagram of a single OODA workflow load comprising a plurality of sub-jobs, in accordance with an embodiment of the present invention.
Detailed Description
A computing board with an OODA multiprocessor as shown in fig. 1, the computing board includes four OODA processors with different computing functions, and the four processors distribute different workflow jobs through a scheduling controller; when a streaming operation is processed, the four processors are circularly called in turn according to a preset calculation sequence, and the streaming operation is executed (namely, the streaming operation is circularly executed according to the sequence of O1- > O2- > D3- > A4- > O1).
The computer board card can process the workflow with OODA independent steps in a way of processing the workflow in a pipeline way by four processors and sharing board card memory, so that 'board card level' multi-workflow parallel execution is realized, the processing efficiency of processing the workflow is improved, and the parallel pipeline acceleration of the workflow task is realized.
The shared memory of each computing board card is directly connected with three resource pool interconnection interfaces and is used for accessing the communication interfaces of other computing board card processors. Each processor is directly connected with the same shared memory, and data transmission between partitions is carried out through the shared memory.
The four processors comprise a first processor O1, a second processor O2, a third processor D3 and a fourth processor A4 which have mutually independent functions, and the four processors are respectively allocated to the following different workflow jobs:
as shown in fig. 2, the first processor O1 is matched with an observation-class algorithm for processing data matching-type jobs and setting labels for pictures by classification; the matching corresponding algorithms may include data compression algorithms, image tagging algorithms, and data cleansing algorithms.
The second processor O2 is matched with an adjustment algorithm, and is used for processing training jobs of machine learning and implementing training according to training data obtained by data classification; the matching corresponding algorithm can comprise a face (feature) training algorithm, a sensitive data (feature) algorithm and a linear regression algorithm.
The third processor D3 is matched with a thought algorithm and used for processing inference operation of machine learning and implementing inference according to the trained model; the matching corresponding algorithms may include data prediction algorithms, signal recognition algorithms, and image recognition algorithms.
The fourth processor A4 is matched with an action algorithm and used for processing control algorithm operation and implementing control according to the inference result; the corresponding algorithm matched with the unmanned aerial vehicle can comprise an unmanned aerial vehicle flight control algorithm, a mechanical arm control algorithm and a robot control algorithm.
In addition, the OODA class workflow load may be divided into multiple OODA processing flows.
As shown in fig. 3, an OODA-like workload includes a plurality of sub-jobs (Job), and a single sub-Job needs to occupy a first processor O1, a second processor O2, a third processor D3, and a fourth processor a4 in this order. When a plurality of OODA workloads occupy the same OODA multiprocessor computing card at the same time, different workflow jobs occupy each processor in sequence, and the pipeline processing efficiency is improved.
When the workflow operation with more than four steps is processed, the design that the shared memory is directly connected with the three resource pool interconnection interfaces is utilized, the operation steps except for processing the independent computing board card by using other computing board cards can be utilized, and a production line is formed in parallel, so that the task scale of the computing board card can be expanded.
Finally, the above embodiments are only for illustrating the technical solutions of the present invention and not for limiting, although the present invention has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that modifications or equivalent substitutions may be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all of them should be covered in the claims of the present invention.
Claims (6)
1. A computing board card with an OODA (on-off-optical disk) multiprocessor is characterized by comprising four OODA processors with different computing functions, wherein the four processors distribute different workflow jobs through a scheduling controller; when a stream type operation is processed, the four processors are circularly called in turn according to a preset calculation sequence, and the stream type operation is executed.
2. The computing board with OODA multiprocessors of claim 1, wherein each of the processors is directly connected to a same shared memory and performs inter-partition data transfer with each other through the shared memory.
3. The computing board with the OODA multiprocessor of claim 2, wherein the four processors include a first processor, a second processor, a third processor, and a fourth processor; the first processor is matched with an observation algorithm and used for processing data matching type operation; the second processor is matched with an adjusting algorithm and used for processing training type operation of machine learning; the third processor is matched with a imagination class algorithm and is used for processing inference class operation of machine learning; and the fourth processor is matched with an action algorithm and used for processing control algorithm operation.
4. The computing board with the OODA multiprocessor of claim 3, wherein the OODA class workload can be divided into multiple OODA processing flows, one OODA class workload comprises multiple sub-jobs, and a single sub-job needs to occupy the first processor, the second processor, the third processor, and the fourth processor in sequence.
5. The compute board with OODA multiprocessors of claim 4, wherein when multiple OODA class workloads concurrently occupy the same OODA multiprocessor compute board, different workflow jobs are caused to occupy each processor in turn.
6. The computing board with the OODA multiprocessor of claim 1, wherein the shared memory of each computing board is directly connected to three resource pool interconnect interfaces for accessing the communication interfaces of other computing board processors.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010363731.8A CN111506349A (en) | 2020-04-30 | 2020-04-30 | Calculation board card with OODA (on-off-the-digital-analog) multiprocessor |
| CN202010866776.7A CN111813453B (en) | 2020-04-30 | 2020-08-25 | Computing board card with OODA multiprocessor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010363731.8A CN111506349A (en) | 2020-04-30 | 2020-04-30 | Calculation board card with OODA (on-off-the-digital-analog) multiprocessor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111506349A true CN111506349A (en) | 2020-08-07 |
Family
ID=71869699
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010363731.8A Pending CN111506349A (en) | 2020-04-30 | 2020-04-30 | Calculation board card with OODA (on-off-the-digital-analog) multiprocessor |
| CN202010866776.7A Active CN111813453B (en) | 2020-04-30 | 2020-08-25 | Computing board card with OODA multiprocessor |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010866776.7A Active CN111813453B (en) | 2020-04-30 | 2020-08-25 | Computing board card with OODA multiprocessor |
Country Status (1)
| Country | Link |
|---|---|
| CN (2) | CN111506349A (en) |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20130088352A1 (en) * | 2011-10-06 | 2013-04-11 | David Amis | Systems and methods utilizing sensory overload to deter, delay, or disrupt a potential threat |
| WO2016153790A1 (en) * | 2015-03-23 | 2016-09-29 | Oracle International Corporation | Knowledge-intensive data processing system |
| CN105892480B (en) * | 2016-03-21 | 2018-12-11 | 南京航空航天大学 | Isomery multiple no-manned plane systematic collaboration, which is examined, beats task self-organizing method |
| CN107783839A (en) * | 2017-09-05 | 2018-03-09 | 中国科学院空间应用工程与技术中心 | A kind of multi-load data processing method and system |
| CN109542516A (en) * | 2018-11-13 | 2019-03-29 | 西安邮电大学 | A kind of acceleration arm processor concurrent working system and its working method |
| CN109901820B (en) * | 2019-01-17 | 2022-03-04 | 西北工业大学 | Optimization method of airborne software agile development process conforming to DO-178B/C |
| CN209512643U (en) * | 2019-02-02 | 2019-10-18 | 河南黄烨科技有限公司 | Sighting system based on wireless VR/AR/MR technology |
| CN110034961B (en) * | 2019-04-11 | 2022-02-15 | 重庆邮电大学 | Seepage rate calculation method taking OODA chain as element |
| CN111080258B (en) * | 2019-12-18 | 2020-11-17 | 中国人民解放军军事科学院国防科技创新研究院 | Group unmanned system cooperative task management subsystem based on role state machine |
-
2020
- 2020-04-30 CN CN202010363731.8A patent/CN111506349A/en active Pending
- 2020-08-25 CN CN202010866776.7A patent/CN111813453B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN111813453A (en) | 2020-10-23 |
| CN111813453B (en) | 2023-08-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11442785B2 (en) | Computation method and product thereof | |
| US9798551B2 (en) | Scalable compute fabric | |
| US9146777B2 (en) | Parallel processing with solidarity cells by proactively retrieving from a task pool a matching task for the solidarity cell to process | |
| JP2020537784A (en) | Machine learning runtime library for neural network acceleration | |
| CN105242954A (en) | Mapping method between virtual CPUs (Central Processing Unit) and physical CPUs, and electronic equipment | |
| US11366690B2 (en) | Scheduling commands in a virtual computing environment | |
| CN111506349A (en) | Calculation board card with OODA (on-off-the-digital-analog) multiprocessor | |
| WO2021179222A1 (en) | Scheduling device, scheduling method, accelerating system and unmanned aerial vehicle | |
| CN113837369A (en) | Dynamic reconfigurable visual computing method and device | |
| CN111813562B (en) | Server host with OODA multi-partition IO resource pool mechanism | |
| JP7347537B2 (en) | distributed processing system | |
| US20240231946A9 (en) | Process allocation control device, process allocation control method, and recording medium storing process allocation control program | |
| US20240134710A1 (en) | Process allocation control device, process allocation control method, and recording medium storing process allocation control program | |
| CN111984328B (en) | Streaming processor with OODA circular partitioning mechanism | |
| US20240184624A1 (en) | Method and system for sequencing artificial intelligence (ai) jobs for execution at ai accelerators | |
| US20120272045A1 (en) | Control method and system of multiprocessor | |
| CN117311941A (en) | Image processing method and related equipment | |
| WO2019188171A1 (en) | Code generation method and code generation device | |
| Yang et al. | An efficient parallel ISODATA algorithm based on Kepler GPUs | |
| Ahmed et al. | Distributed and configurable architecture for neuromorphic applications on heterogeneous cluster | |
| CN116643886A (en) | Task scheduling method, device, electronic equipment and storage medium | |
| CN111586144A (en) | Computer group construction method with OODA fractal mechanism |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20200807 |
|
| WD01 | Invention patent application deemed withdrawn after publication |