CN111475292B - Server system and frequency control device of internal processor thereof - Google Patents

Server system and frequency control device of internal processor thereof Download PDF

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Publication number
CN111475292B
CN111475292B CN202010229627.XA CN202010229627A CN111475292B CN 111475292 B CN111475292 B CN 111475292B CN 202010229627 A CN202010229627 A CN 202010229627A CN 111475292 B CN111475292 B CN 111475292B
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alarm
power supply
server system
processor
module
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CN111475292A (en
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滕学军
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Suzhou Inspur Intelligent Technology Co Ltd
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Suzhou Inspur Intelligent Technology Co Ltd
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Priority to PCT/CN2021/071210 priority patent/WO2021190093A1/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5094Allocation of resources, e.g. of the central processing unit [CPU] where the allocation takes into account power or heat criteria
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/28Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/30Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Power Sources (AREA)

Abstract

The invention discloses a frequency control device of a processor in a server system and the server system. The power supply detection module generates a first/second power-down signal when detecting that the first/second power supply is powered down or is in flashing; the power supply alarm module generates a first/second alarm signal when detecting that the first/second power supply is abnormal; the alarm processing module determines that the first/second alarm signal is valid when the first/second power-down signal is not received, and controls the processor to perform the frequency-down operation when both the received first alarm signal and second alarm signal are valid. Therefore, the power supply abnormality alarming condition caused by power failure or flashing can be eliminated, so that the processor does not start the frequency reducing operation under the power failure or flashing condition, and the conditions of serious reduction of the system processing performance and increase of the maintenance cost caused by the power failure or flashing are avoided.

Description

Server system and frequency control device of internal processor thereof
Technical Field
The present invention relates to the field of server control, and in particular, to a server system and a frequency control device for an internal processor thereof.
Background
The server system generally adopts a double-circuit power supply redundancy design of A-circuit commercial power and B-circuit high-voltage direct current. At present, in order to ensure the safety and reliability of power supply of a server system, machine room maintenance personnel usually reserve a certain time for carrying out untimely power failure maintenance on the A-path commercial power in each month. When the A-path commercial power is in power failure overhaul, the system is powered by the B-path high-voltage direct current due to the redundant power supply design of the server system, so that the server system cannot be down due to the power failure of the A-path commercial power.
However, in the process of power failure or flashing of the a-way mains supply, the following problems exist: 1) The server system always gives an alarm of 'failure'; 2) The CPU and the memory of the server system start the down-conversion operation (from a few Ghz to a few tens of Mhz), so that the processing performance of the system is seriously reduced; 3) When a machine room manager regularly patrols and examines the inside of the machine room, the machine room manager can find that the server powered by the A-path has alarm faults, and after the cause of the faults is found out, the machine room manager needs to eliminate the fault alarm of the server, so that the maintenance cost is higher.
Therefore, how to provide a solution to the above technical problem is a problem that a person skilled in the art needs to solve at present.
Disclosure of Invention
The invention aims to provide a server system and a frequency control device of a processor therein, which can eliminate the abnormal power supply alarming condition caused by power failure or flash, so that the processor can not start down-frequency operation under the power failure or flash condition, thereby avoiding the serious reduction of the system processing performance and the increase of the maintenance cost caused by the power failure or flash.
In order to solve the above technical problem, the present invention provides a frequency control device for a processor in a server system, which is applied to a server system including a first power supply and a second power supply, and includes:
the power supply detection module is respectively connected with the first power supply and the second power supply and is used for generating a first power-down signal when the first power supply is detected to be powered down or flash; generating a second power-down signal when the second power supply is detected to be powered down or flashed off;
the power supply alarm module is respectively connected with the first power supply and the second power supply and is used for generating a first alarm signal when the first power supply is detected to be abnormal; generating a second alarm signal when the second power supply abnormality is detected;
and the alarm processing module is respectively connected with the power supply detection module and the power supply alarm module, and is used for determining that the first alarm signal is effective when the first power-down signal is not received, determining that the second alarm signal is effective when the second power-down signal is not received, and controlling a processor in the server system to execute the frequency-reducing operation when the received first alarm signal and the received second alarm signal are both effective.
Preferably, the alarm processing module comprises:
the alarm triggering module is respectively connected with the power supply detection module and the power supply alarm module, and is used for determining that the first alarm signal is valid when the first power-down signal is not received, determining that the second alarm signal is valid when the second power-down signal is not received, and generating an alarm triggering signal when the received first alarm signal and second alarm signal are both valid;
and the frequency control module is connected with the alarm triggering module and is used for controlling the processor to execute the frequency reduction operation when the alarm triggering signal is received.
Preferably, the alarm triggering module is further configured to perform software and hardware multi-layer filtering processing on the received signal, so as to generate an alarm triggering signal when the first alarm signal and the second alarm signal after the filtering processing are both valid.
Preferably, the frequency control device further includes:
the temperature sensor is arranged on the processor and connected with the frequency control module and is used for detecting the temperature of the processor;
correspondingly, the frequency control module is further used for controlling the processor to execute the frequency reduction operation when the temperature is greater than a preset temperature threshold.
Preferably, the frequency control device further includes:
a heat sink;
and the temperature control module is respectively connected with the temperature sensor and the heat dissipation device and is used for controlling the temperature within a preset temperature range by controlling the operation condition of the heat dissipation device.
Preferably, the heat dissipation device is specifically a fan in the server system;
the temperature control module includes:
a PCH connected with the temperature sensor for acquiring the temperature of the processor and other hardware in the server system;
and the BMC is respectively connected with the PCH, the heat dissipation device and a main board temperature sensor in the server system and is used for controlling the temperature balance of each device in the server system by controlling the operation condition of the heat dissipation device.
Preferably, the frequency control device further includes:
and the frequency monitoring module is connected with the frequency control module and is used for recording the frequency reducing information of the processor when the frequency control module controls the processor to execute the frequency reducing operation.
Preferably, the alarm triggering module is specifically a PCH in the server system; the frequency control module is specifically a CPLD in the server system; the frequency monitoring module is specifically a BMC in the server system.
In order to solve the technical problem, the invention also provides a server system which comprises a first power supply, a second power supply and a frequency control device of a processor in any one of the server systems.
The invention provides a frequency control device of a processor in a server system, which comprises a power detection module, a power alarm module and an alarm processing module. The power supply detection module generates a first/second power-down signal when detecting that the first/second power supply is powered down or is in flashing; the power supply alarm module generates a first/second alarm signal when detecting that the first/second power supply is abnormal; the alarm processing module determines that the first/second alarm signal is valid when the first/second power-down signal is not received, and controls the processor to perform the frequency-down operation when both the received first alarm signal and second alarm signal are valid. Therefore, the power supply abnormality alarming condition caused by power failure or flashing can be eliminated, so that the processor does not start the frequency reducing operation under the power failure or flashing condition, and the conditions of serious reduction of the system processing performance and increase of the maintenance cost caused by the power failure or flashing are avoided.
The invention also provides a server system which has the same beneficial effects as the frequency control device.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required in the prior art and the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a frequency control device of a processor in a server system according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a specific structure of a frequency control device of a processor in a server system according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a temperature control module according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a specific device of a frequency control apparatus of a processor in a server system according to an embodiment of the present invention.
Detailed Description
The core of the invention is to provide a server system and a frequency control device of a processor therein, which can eliminate the abnormal power supply alarming condition caused by power failure or flash, so that the processor can not start down-frequency operation under the power failure or flash condition, thereby avoiding the serious decrease of the system processing performance and the increase of the maintenance cost caused by the power failure or flash.
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a frequency control device of a processor in a server system according to an embodiment of the present invention.
The frequency control device of the processor in the server system is applied to the server system comprising a first power supply and a second power supply, and comprises the following components:
the power supply detection module 1 is respectively connected with the first power supply and the second power supply and is used for generating a first power-down signal when detecting that the first power supply is powered down or flashes; generating a second power-down signal when the second power supply is detected to be powered down or flash;
the power supply alarm module 2 is respectively connected with the first power supply and the second power supply and is used for generating a first alarm signal when the first power supply is detected to be abnormal; generating a second alarm signal when the second power supply abnormality is detected;
and the alarm processing module 3 is respectively connected with the power detection module 1 and the power alarm module 2, and is used for determining that the first alarm signal is valid when the first power-down signal is not received, determining that the second alarm signal is valid when the second power-down signal is not received, and controlling a processor in the server system to execute the frequency-reducing operation when the received first alarm signal and the received second alarm signal are both valid.
Specifically, the frequency control device of the processor in the server system of the present application includes a power detection module 1, a power alarm module 2 and an alarm processing module 3, and the working principle thereof is as follows:
the server system comprises a two-way power supply PSU (Power Supply Unit, power supply) formed by a first power supply and a second power supply. The power supply alarm module 2 comprises a first power supply alarm module and a second power supply alarm module, wherein the first power supply alarm module is used for detecting the working condition of a first power supply and generating a first alarm signal when detecting the abnormality of the first power supply (such as power failure, flashover or other abnormal conditions); the second power supply alarm module is used for detecting the working condition of the second power supply and generating a second alarm signal when detecting the abnormality of the second power supply.
Considering that the power alarm module 2 also always gives an alarm of 'failure' when the first power supply or the second power supply is not in power failure maintenance, so as to increase the inspection task of management personnel, the power detection module 1 is further arranged on the basis of the power alarm module 2, and the power detection module 1 comprises a first power detection module and a second power detection module, wherein the first power detection module is used for detecting the power failure or the flash failure of the first power supply and generating a first power failure signal when the power failure or the flash failure of the first power supply is detected; the second power supply detection module is used for detecting the power-down or flash-off condition of the second power supply and generating a second power-down signal when the power-down or flash-off condition of the second power supply is detected.
The alarm processing module 3 is interacted with the power supply alarm module 2 and the power supply detection module 1 at the same time, if a first power-down signal is received while the first alarm signal is received, which indicates that the first power supply is abnormal alarm caused by power down or flash, the first alarm signal is determined to be invalid, and the processing of the first power supply abnormal alarm is not executed; if the first power-down signal is not received when the first alarm signal is received, and the first power supply is not abnormal alarm caused by power down or flash, the first alarm signal is determined to be valid, and processing related to the first power supply abnormal alarm is executed. Similarly, if the alarm processing module 3 receives the second alarm signal and the second power-down signal at the same time, which indicates that the second power supply is abnormal due to power-down or flash, the alarm processing module determines that the second alarm signal is invalid and does not execute the processing of the second power supply abnormal alarm; if the second power-down signal is not received when the second alarm signal is received, and the second power supply is not abnormal alarm caused by power down or flash, the second alarm signal is determined to be valid, and processing related to the second power supply abnormal alarm is executed. Moreover, the alarm processing module 3 controls the processor (such as a CPU) in the server system to perform the frequency-reducing operation only when the received first alarm signal and the received second alarm signal are both valid, so as to ensure the processing performance of the system.
The invention provides a frequency control device of a processor in a server system, which comprises a power detection module, a power alarm module and an alarm processing module. The power supply detection module generates a first/second power-down signal when detecting that the first/second power supply is powered down or is in flashing; the power supply alarm module generates a first/second alarm signal when detecting that the first/second power supply is abnormal; the alarm processing module determines that the first/second alarm signal is valid when the first/second power-down signal is not received, and controls the processor to perform the frequency-down operation when both the received first alarm signal and second alarm signal are valid. Therefore, the power supply abnormality alarming condition caused by power failure or flashing can be eliminated, so that the processor does not start the frequency reducing operation under the power failure or flashing condition, and the conditions of serious reduction of the system processing performance and increase of the maintenance cost caused by the power failure or flashing are avoided.
Based on the above embodiments:
referring to fig. 2, fig. 2 is a schematic diagram of a specific structure of a frequency control device of a processor in a server system according to an embodiment of the invention.
As an alternative embodiment, the alarm processing module 3 comprises:
the alarm triggering module 31 is respectively connected with the power detection module 1 and the power alarm module 2, and is used for determining that the first alarm signal is valid when the first power-down signal is not received, determining that the second alarm signal is valid when the second power-down signal is not received, and generating an alarm triggering signal when the received first alarm signal and second alarm signal are both valid;
and the frequency control module 32 is connected with the alarm triggering module 31 and is used for controlling the processor to execute the frequency reducing operation when the alarm triggering signal is received.
Specifically, the alarm processing module 3 of the present application includes an alarm triggering module 31 and a frequency control module 32, and its working principle is:
the alarm triggering module 31 is interacted with the power supply alarm module 2 and the power supply detection module 1 at the same time, and if a first power-down signal is received at the same time as the first alarm signal is received, the first alarm signal is determined to be invalid; and if the first power-down signal is not received when the first alarm signal is received, determining that the first alarm signal is valid. Similarly, if the alarm triggering module 31 receives the second alarm signal and the second power-down signal, it determines that the second alarm signal is invalid; and if the second power-down signal is not received when the second alarm signal is received, determining that the second alarm signal is valid. The alarm triggering module 31 generates an alarm triggering signal to the frequency control module 32 when the received first alarm signal and the received second alarm signal are both valid, so that the frequency control module 32 controls the processor in the system to execute the frequency reducing operation after receiving the alarm triggering signal.
For example, when the first alarm signal Alert0 and the second alarm signal Alert1 are both active with a "low level" and inactive with a "high level", the alarm trigger module 31 specifically performs an or operation on the first alarm signal and the second alarm signal, and generates an alarm trigger signal only when the first alarm signal and the second alarm signal are both low.
As an alternative embodiment, the alarm triggering module 31 is further configured to perform a software-hardware multi-layer filtering process on the received signal, so as to generate the alarm triggering signal when the first alarm signal and the second alarm signal after the filtering process are both valid.
Further, considering that an interference signal exists in a signal input to the alarm triggering module 31, the alarm triggering module 31 may trigger by mistake, so the alarm triggering module 31 of the present application performs software and hardware multi-layer filtering processing on a received signal, and then performs alarm triggering judgment based on the signal after the filtering processing, thereby improving the accuracy of alarm triggering.
Similarly, the frequency control module 32 is further configured to perform software and hardware multi-layer filtering processing on the received alarm trigger signal, so as to control the processor in the system to perform the frequency-reducing operation after the filtered alarm trigger signal is valid, thereby further improving the accuracy of alarm triggering.
In addition, the first power supply alarm module comprises a first operational amplifier for generating a first alarm signal, the power supply voltage of the first operational amplifier is provided by the first power supply, and if the power supply voltage of the first operational amplifier is higher than the input voltage of the first operational amplifier, the first operational amplifier may malfunction due to the discharge speed difference of the two voltages under the power failure condition of the first power supply, so the power supply voltage of the first operational amplifier is designed to be lower than the input voltage of the first operational amplifier so as to avoid that the first alarm signal is pulled down by mistake to alarm.
Similarly, the second power supply alarm module includes a second operational amplifier for generating a second alarm signal, the power supply voltage of the second operational amplifier is provided by the second power supply, if the power supply voltage of the second operational amplifier is higher than the input voltage of the second operational amplifier, the second operational amplifier may malfunction due to the discharge speed difference of the two voltages under the power failure condition of the second power supply, so the power supply voltage of the second operational amplifier is designed to be lower than the input voltage of the second operational amplifier, so as to avoid the false pull-down alarm of the second alarm signal.
As an alternative embodiment, the frequency control device further includes:
a temperature sensor 4 provided on the processor and connected to the frequency control module 32 for detecting the temperature of the processor;
accordingly, the frequency control module 32 is further configured to control the processor to perform a frequency down operation when the temperature is greater than a preset temperature threshold.
Further, the frequency control device of the present application further includes a temperature sensor 4 disposed on the processor in the system, where the temperature sensor 4 is configured to detect the temperature of the processor and send the temperature of the processor to the frequency control module 32. The frequency control module 32 compares the processor temperature with a preset temperature threshold after receiving the processor temperature, and controls the processor to perform the frequency reducing operation when the processor temperature is greater than the preset temperature threshold so as to ensure the safety of the processor.
As an alternative embodiment, the frequency control device further includes:
a heat sink;
and the temperature control module is respectively connected with the temperature sensor 4 and the heat dissipation device and is used for controlling the temperature within a preset temperature range by controlling the operation condition of the heat dissipation device.
Further, the frequency control device of the application further comprises a heat dissipation device and a temperature control module, and the working principle is as follows:
the temperature sensor 4 on the processor also sends the processor temperature to the temperature control module. After the temperature control module receives the temperature of the processor, the temperature of the processor is controlled within a preset temperature range by controlling the operation condition of the heat radiating device, so that the safety of the processor is ensured.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a temperature control module according to an embodiment of the invention.
As an alternative embodiment, the heat sink is in particular a fan within the server system;
and the temperature control module includes:
a PCH connected to the temperature sensor 4 for acquiring the temperature of the processor and other hardware in the server system;
and the BMC is respectively connected with the PCH, the heat dissipation device and a main board temperature sensor in the server system and is used for controlling the temperature balance of each device in the server system by controlling the operation condition of the heat dissipation device.
Specifically, the heat dissipation device of the application selects a fan in the server system; the temperature control module of the application comprises PCH (Platform Controller Hub, integrated south bridge chip) and BMC (Baseboard Management Controller ) in a server system, and the working principle is as follows:
the PCH may take the processor temperature from a temperature sensor 4 on the processor and may also take the temperature of other hardware from temperature sensing elements on other hardware within the server system. The BMC can obtain the temperature of the processor and the temperature of other hardware in the server system from the PCH, can also obtain the temperature of the server main board from a main board temperature sensor in the server system, and controls the temperature balance of all devices in the server system by controlling the operation condition of a fan in the server system so as to ensure the overall safety of the system.
As an alternative embodiment, the frequency control device further includes:
the frequency monitoring module 5 is connected with the frequency control module 32, and is used for recording the frequency reducing information of the processor when the frequency control module 32 controls the processor to execute the frequency reducing operation.
Further, the frequency control device of the present application further includes a frequency monitoring module 5, where the frequency monitoring module 5 may interact with the frequency control module 32 to record the frequency-reducing information of the processor for a manager to check when the frequency control module 32 controls the processor to perform the frequency-reducing operation.
Referring to fig. 4, fig. 4 is a schematic diagram of a specific device of a frequency control apparatus of a processor in a server system according to an embodiment of the present invention.
As an alternative embodiment, the alarm triggering module 31 is embodied as a PCH within a server system; the frequency control module 32 is specifically a CPLD within the server system; the frequency monitoring module 5 is specifically a BMC within the server system.
Specifically, the alarm triggering module 31 of the present application may select a PCH in a server system, the frequency control module 32 may select a CPLD (Complex Programmable Logic Device ) in the server system, and the frequency monitoring module 5 may select a BMC in the server system, so that no additional circuit module is required, and cost is saved.
The application also provides a server system, which comprises a first power supply and a second power supply, and further comprises a frequency control device of a processor in any one of the server systems.
The description of the server system provided in the present application refers to the embodiment of the frequency control device, and is not repeated herein.
It should also be noted that in this specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (9)

1. A frequency control apparatus for a processor within a server system, for use in a server system comprising a first power source and a second power source, comprising:
the power supply detection module is respectively connected with the first power supply and the second power supply and is used for generating a first power-down signal when the first power supply is detected to be powered down or flash; generating a second power-down signal when the second power supply is detected to be powered down or flashed off;
the power supply alarm module is respectively connected with the first power supply and the second power supply and is used for generating a first alarm signal when the first power supply is detected to be abnormal; generating a second alarm signal when the second power supply abnormality is detected;
and the alarm processing module is respectively connected with the power supply detection module and the power supply alarm module, and is used for determining that the first alarm signal is effective when the first power-down signal is not received, determining that the second alarm signal is effective when the second power-down signal is not received, and controlling a processor in the server system to execute the frequency-reducing operation when the received first alarm signal and the received second alarm signal are both effective.
2. The frequency control device of a processor within a server system as recited in claim 1, wherein said alarm processing module comprises:
the alarm triggering module is respectively connected with the power supply detection module and the power supply alarm module, and is used for determining that the first alarm signal is valid when the first power-down signal is not received, determining that the second alarm signal is valid when the second power-down signal is not received, and generating an alarm triggering signal when the received first alarm signal and second alarm signal are both valid;
and the frequency control module is connected with the alarm triggering module and is used for controlling the processor to execute the frequency reduction operation when the alarm triggering signal is received.
3. The frequency control device of a processor in a server system according to claim 2, wherein the alarm triggering module is further configured to perform a software-hardware multi-layer filtering process on the received signal, so as to generate the alarm triggering signal when the first alarm signal and the second alarm signal after the filtering process are both valid.
4. The frequency control device of a processor in a server system according to claim 2, wherein the frequency control device further comprises:
the temperature sensor is arranged on the processor and connected with the frequency control module and is used for detecting the temperature of the processor;
correspondingly, the frequency control module is further used for controlling the processor to execute the frequency reduction operation when the temperature is greater than a preset temperature threshold.
5. The frequency control device of a processor within a server system as recited in claim 4, wherein said frequency control device further comprises:
a heat sink;
and the temperature control module is respectively connected with the temperature sensor and the heat dissipation device and is used for controlling the temperature within a preset temperature range by controlling the operation condition of the heat dissipation device.
6. The device for controlling the frequency of a processor in a server system according to claim 5, wherein said heat sink is a fan in said server system;
the temperature control module includes:
a PCH connected with the temperature sensor for acquiring the temperature of the processor and other hardware in the server system;
and the BMC is respectively connected with the PCH, the heat dissipation device and a main board temperature sensor in the server system and is used for controlling the temperature balance of each device in the server system by controlling the operation condition of the heat dissipation device.
7. The frequency control device of a processor in a server system according to claim 2, wherein the frequency control device further comprises:
and the frequency monitoring module is connected with the frequency control module and is used for recording the frequency reducing information of the processor when the frequency control module controls the processor to execute the frequency reducing operation.
8. The frequency control device of a processor within a server system according to claim 7, wherein said alarm triggering module is embodied as a PCH within said server system; the frequency control module is specifically a CPLD in the server system; the frequency monitoring module is specifically a BMC in the server system.
9. A server system comprising a first power source and a second power source, and further comprising a frequency control device for a processor in the server system according to any of claims 1-8.
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CN202010229627.XA CN111475292B (en) 2020-03-27 2020-03-27 Server system and frequency control device of internal processor thereof
PCT/CN2021/071210 WO2021190093A1 (en) 2020-03-27 2021-01-12 Server system, and frequency control device for processor therein

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