CN111474828B - OPC correction method for increasing graphic process window of hole layer - Google Patents

OPC correction method for increasing graphic process window of hole layer Download PDF

Info

Publication number
CN111474828B
CN111474828B CN202010336926.3A CN202010336926A CN111474828B CN 111474828 B CN111474828 B CN 111474828B CN 202010336926 A CN202010336926 A CN 202010336926A CN 111474828 B CN111474828 B CN 111474828B
Authority
CN
China
Prior art keywords
layer
graph
adjacent
risk
sraf
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202010336926.3A
Other languages
Chinese (zh)
Other versions
CN111474828A (en
Inventor
邓国贵
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Original Assignee
Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Huali Integrated Circuit Manufacturing Co Ltd filed Critical Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Priority to CN202010336926.3A priority Critical patent/CN111474828B/en
Publication of CN111474828A publication Critical patent/CN111474828A/en
Application granted granted Critical
Publication of CN111474828B publication Critical patent/CN111474828B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70433Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
    • G03F7/70441Optical proximity correction [OPC]
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/36Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electron Beam Exposure (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)

Abstract

The invention provides an OPC correction method for increasing a process window of a hole layer graph, which provides the hole layer graph and sets the minimum value of the distance allowing SRAF insertion between two adjacent hole layer graphs; screening out the adjacent hole layer graphs with the distance smaller than the minimum value; setting different risk values for evaluating risks brought by moving the screened adjacent hole layer graphs to the direction of increasing the distance between the screened adjacent hole layer graphs; summing the different risk values to calculate a total risk value; setting a threshold value, comparing the total risk value with the threshold value, and if the total risk value is smaller than the threshold value, inserting an SRAF between the screened adjacent pore layer graphs; if the total risk value is larger than the threshold value, inserting the SRAF after reducing the size of the screened adjacent pore layer graph. The OPC correction method for increasing the process window of the hole layer graph can more fully add the SRAF in the OPC correction of the hole layer graph, thereby increasing the whole process window of the hole layer graph.

Description

OPC correction method for increasing graphic process window of hole layer
Technical Field
The invention relates to the technical field of semiconductors, in particular to an OPC (optical proximity correction) method for increasing a hole layer graphic process window.
Background
The process window-depth of field (DOF) is critical to successful volume production in semiconductors, especially for aperture layer patterning. In the prior art, the addition of sub-resolution auxiliary patterns (SRAFs) is mainly based on a rule addition method, and different numbers of SRAFs can be inserted when the distance from the edge of a certain orifice layer to the edge of another orifice layer pattern is larger than a certain value, and the SRAFs are generally added aiming at semi-dense to isolated patterns.
The existing OPC correction on the hole layer is performed after the OPC correction is performed from the original layer to the target layer, and the pattern of the target layer is fixed, so that a sub-resolution auxiliary pattern (SRAF) cannot be sufficiently added in some cases, and a process window (DOF) of a part of the pattern is insufficient, thereby bringing great challenges and risks to mass production.
Therefore, it is desirable to provide a new OPC correction method for increasing the process window of the hole layer pattern to solve the above problems.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide an OPC correction method for increasing a process window of an aperture layer pattern, which is used to solve the problem that in the prior art, a sub-resolution auxiliary pattern cannot be sufficiently added, so that the process window of a part of the pattern is not sufficient, thereby bringing great challenges and risks to mass production.
To achieve the above and other related objects, the present invention provides an OPC correction method for increasing a process window of a hole layer pattern, the method at least comprising the steps of:
step one, providing an orifice layer graph, and setting the minimum value of the distance allowing SRAF insertion between two adjacent orifice layer graphs; screening out the adjacent hole layer graphs with the distance smaller than the minimum value;
setting different risk values for evaluating risks brought by moving the screened adjacent hole layer graphs towards the direction of increasing the distance between the screened adjacent hole layer graphs;
step three, summing the different risk values to calculate a total risk value;
step four, setting a threshold value, comparing the total risk value with the threshold value, and if the total risk value is smaller than the threshold value, inserting SRAF between the screened adjacent pore layer graphs; and if the total risk value is larger than the threshold value, inserting the SRAF after reducing the size of the screened adjacent pore layer graph.
Preferably, in step one, the hole layer patterns are screened for distances from each other that are 1 to 3nm less than the minimum value.
Preferably, the different risk values in the second step include a risk value for evaluating a risk of moving the aperture layer pattern to cause coverage of the metal layer on which the aperture layer pattern is located, a risk value for evaluating a risk of moving the aperture layer pattern to cause short circuit with a metal layer adjacent to the aperture layer pattern, a risk value for evaluating a risk of moving the aperture layer pattern to cause short circuit with a main pattern adjacent to the aperture layer pattern, and a risk value for evaluating a risk of moving the aperture layer pattern to affect SRAF insertion on the other side of the aperture layer pattern.
Preferably, the aperture layer pattern in the first step is a target pattern, the target pattern is located on a target layer, and before the first step is performed, the method further includes a step a of forming the target layer, and inserting SRAFs between the target patterns of the target layer to form an SRAF layer.
Preferably, the method further comprises a fifth step of performing OPC correction on the hole layer pattern and the inserted SRAF ensemble.
Preferably, the method further comprises a sixth step of forming the OPC corrected pattern into a mask pattern layer.
Preferably, the number of SRAFs inserted between the screened aperture layer patterns in step four is 1.
Preferably, the number of SRAFs inserted between the screened aperture layer patterns in step four is greater than 1.
Preferably, the method for reducing the size of the screened aperture layer pattern in the fourth step is as follows: moving each side of two adjacent hole layer patterns to increase the distance between the two hole layer patterns by reducing the area of each side.
As described above, the OPC correction method for the process window of the pattern with the added hole layer of the present invention has the following beneficial effects: the OPC correction method for increasing the process window of the hole layer graph can more fully add the SRAF in the OPC correction of the hole layer graph, thereby increasing the whole process window of the hole layer graph.
Drawings
FIG. 1 is a schematic flow chart of an OPC correction method for a pattern process window of an orifice layer according to the present invention;
FIG. 2 shows a schematic diagram of the layout of the hole layer pattern after inserting the SRAF in the present invention.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Please refer to fig. 1-2. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
The invention provides an OPC correction method for a process window with an added hole layer graph, as shown in FIG. 1, FIG. 1 shows a flow diagram of the OPC correction method for the process window with the added hole layer graph. The method comprises the following steps in the embodiment:
step one, providing an orifice layer graph, and setting the minimum value of the distance allowing SRAF insertion between two adjacent orifice layer graphs; and screening out the adjacent pore layer graphs with the distance less than the minimum value. As shown in fig. 2, fig. 2 is a schematic diagram of the layout of the hole layer graph after inserting the SRAF in the present invention. In this step, the aperture layer patterns 01 are provided, more than one of the aperture layer patterns is provided in the layout, as shown in fig. 2, and the minimum value is represented as a distance between two adjacent aperture layer patterns, which satisfies a minimum distance when SRAFs (sub-resolution auxiliary patterns) are allowed to be inserted. And the minimum value of the distance when the number of SRAFs (sub-resolution auxiliary patterns) allowed to be inserted is 1.
This step screens out the pore layer patterns whose distance between adjacent ones of the pore layer patterns is less than the minimum value, and further, in step one, screens out the pore layer patterns whose distance between each other is 1 to 3nm less than the minimum value. That is, if the distance between two adjacent orifice layer patterns is 1nm to 3nm smaller than the minimum value, the two orifice layer patterns adjacent to each other are screened out.
Furthermore, the aperture layer graph in the first step is a target graph, the target graph is positioned on a target layer, the first step also comprises a step a of forming the target layer before the first step, and inserting SRAF between the target graphs of the target layer to form an SRAF layer. As shown in fig. 2, the SRAF layer is composed of SRAF patterns 02 inserted in the target layer. That is, SRAF pattern 02 has been formed between the target patterns of the target layer before performing step one of the present invention.
Setting different risk values for evaluating risks brought by moving the screened adjacent hole layer graphs towards the direction of increasing the distance between the screened adjacent hole layer graphs; further, the different risk values in the second step include a risk value for evaluating the risk of the cover of the metal layer where the hole layer pattern is located caused by moving the hole layer pattern, a risk value for evaluating the risk of the metal layer adjacent to the hole layer pattern caused by moving the hole layer pattern, a risk value for evaluating the risk of the main pattern adjacent to the hole layer pattern caused by moving the hole layer pattern, and a risk value for evaluating the risk of the SRAF insertion on the other side of the hole layer pattern caused by moving the hole layer pattern. Wherein, for example, the risk of covering the metal layer where the hole layer pattern is located, caused by moving the hole layer pattern, is represented by moving the hole layer pattern until the hole layer pattern cannot be completely covered by the metal layer, in a normal situation, as shown in fig. 2, the hole layer pattern 01 is completely covered by the metal layer 03, if any one or two of the hole layer patterns are moved away from each other (in a direction indicated by a large arrow in fig. 2) in order to increase the distance between the two adjacent hole layer patterns, it may cause that the hole layer pattern 01 cannot be completely covered by the metal layer 03, and the present invention sets a risk value for evaluating such a risk; and for example, to assess the risk of moving the aperture layer pattern causing a short to its neighboring main pattern, which refers to other aperture layer patterns, the invention moving two adjacent aperture layer patterns for SARF insertion may cause a short of the moved aperture layer pattern to other aperture layer patterns in the layout, and the invention sets the risk value for this risk. As another example, the risk of SRAF insertion beyond the aperture layer pattern being affected by moving the aperture layer pattern refers to three aperture layer patterns as shown in fig. 2, wherein if SARFs need to be inserted between two aperture layer patterns after counting from left to right, and SARFs need to be inserted between the first two aperture layer patterns from left to right, then the insertion of SRAFs between the first and second aperture layer patterns may be affected as a result of moving the second aperture layer pattern to the left.
And the risk values in the step two are obtained from historical data of an actual process according to the risk probability result obtained by carrying out the moving operation of the hole layer graph for multiple times in the past.
Step three, summing the different risk values to calculate a total risk value; in this embodiment, the different risk values in step two include: the risk value for evaluating the covering risk of the metal layer where the pore layer graph is located caused by moving the pore layer graph, the risk value for evaluating the short risk of the metal layer adjacent to the pore layer graph caused by moving the pore layer graph, the risk value for evaluating the short risk of the main graph adjacent to the pore layer graph caused by moving the pore layer graph, and the risk value for evaluating the risk of influencing the SRAF insertion risk on the other side of the pore layer graph caused by moving the pore layer graph are summed to calculate the total risk value in the third step.
Step four, setting a threshold value, comparing the total risk value with the threshold value, and if the total risk value is smaller than the threshold value, inserting an SRAF between the screened adjacent pore layer graphs; and if the total risk value is larger than the threshold value, inserting the SRAF after reducing the size of the screened adjacent pore layer graph. This step includes two optional implementations of the scheme, wherein if the total risk value is smaller than the threshold value, inserting SRAFs between two adjacent screened aperture layer patterns, and further, in step four, the number of SRAFs inserted between the screened aperture layer patterns is 1. In other embodiments, the number of SRAFs inserted between the screened aperture layer patterns in step four may also be greater than 1, that is, a plurality of SRAFs may be inserted.
If the total risk value is greater than the threshold value in the fourth step, inserting the SRAF after reducing the size of the screened adjacent pore layer graph, further, the method for reducing the size of the screened pore layer graph in the fourth step of the present invention is: moving each side of two adjacent hole layer patterns to increase the distance between the two hole layer patterns by reducing the area of each side. As shown in fig. 2, the direction of the smaller arrow identified on the aperture layer patterns in fig. 2 is to move one edge of the two aperture layer patterns to the left and right, respectively, which movement results in a reduction in the area of the two aperture layer patterns and at the same time an increase in the distance between the two for the addition of more SARFs.
The method also includes a fifth step of performing OPC correction on the hole layer pattern and the inserted SRAF ensemble.
The method also comprises a sixth step of forming the OPC corrected graph into a mask graph layer.
Generally, the main purpose of inserting SARFs is to improve the exposure uniformity and contrast of the main pattern (including the aperture layer pattern in the present invention), and to increase DOF (depth of field). So that SARFs are always inserted as much as possible. However, the distance from the SARF to the main pattern is limited, and when the distance from the edge of the main pattern to the edge is less than a certain value, the SARF cannot be inserted any more, which has a great influence on the situation that the distance is slightly less than the certain value, and the two main patterns are not close enough to obtain the exposure uniformity and contrast to increase the depth of field, and the SARF cannot be inserted to achieve the purpose. Therefore, the OPC correction method for increasing the hole layer pattern process window can more fully add SRAF in the OPC correction of the hole layer pattern, thereby increasing the whole process window of the hole layer pattern.
In summary, the OPC correction method for increasing the process window of the hole layer pattern of the present invention can more fully add SRAFs in the OPC correction of the hole layer pattern, thereby increasing the overall process window of the hole layer pattern. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which may be made by those skilled in the art without departing from the spirit and scope of the present invention as defined in the appended claims.

Claims (9)

1. An OPC correction method for increasing the graphic process window of a hole layer is characterized by at least comprising the following steps:
step one, providing an orifice layer graph, and setting the minimum value of the distance allowing the SRAF to be inserted between two adjacent orifice layer graphs; screening out the adjacent pore layer graph with the distance smaller than the minimum value;
setting different risk values for evaluating risks brought by moving the screened adjacent hole layer graphs towards the direction of increasing the distance between the screened adjacent hole layer graphs;
step three, summing the different risk values to calculate a total risk value;
step four, setting a threshold value, comparing the total risk value with the threshold value, and if the total risk value is smaller than the threshold value, inserting SRAF between the screened adjacent pore layer graphs; if the total risk value is larger than the threshold value, inserting the SRAF after reducing the size of the screened adjacent pore layer graph.
2. The method of claim 1, wherein the OPC correction method for the process window of the pattern with the hole layer comprises: in step one, the hole layer patterns with the distance between each other being 1 to 3nm smaller than the minimum value are screened out.
3. The method of claim 1, wherein the OPC correction method for the process window of the pattern with the hole layer comprises: and in the second step, the different risk values comprise a risk value for evaluating the risk of covering the metal layer where the pore layer graph is located due to the movement of the pore layer graph, a risk value for evaluating the risk of short circuit between the metal layer adjacent to the moving of the pore layer graph, a risk value for evaluating the risk of short circuit between the main graph adjacent to the moving of the pore layer graph and the moving of the pore layer graph, and a risk value for evaluating the risk of SRAF insertion on the other side of the pore layer graph influenced by the movement of the pore layer graph.
4. The method of OPC correction of an enhanced via layer graphic process window of claim 1, wherein: the first step comprises a step a of forming the target layer, and inserting SRAF between the target patterns of the target layer to form an SRAF layer.
5. The method of claim 4, wherein the OPC correction method comprises the steps of: the method also includes a fifth step of performing OPC correction on the hole layer pattern and the inserted SRAF ensemble.
6. The method of claim 5, wherein the OPC correction method comprises the steps of: the method also comprises a sixth step of forming the OPC corrected graph into a mask graph layer.
7. The method of claim 1, wherein the OPC correction method for the process window of the pattern with the hole layer comprises: in the fourth step, the number of SRAFs inserted between the screened adjacent pore layer graphs is 1.
8. The method of OPC correction of an enhanced via layer graphic process window of claim 1, wherein: in the fourth step, the number of SRAFs inserted between the screened adjacent pore layer graphs is more than 1.
9. The method of OPC correction of an enhanced via layer graphic process window of claim 1, wherein: the method for reducing the size of the screened adjacent pore layer graph in the fourth step comprises the following steps: moving each side of two adjacent hole layer patterns to increase the distance between the two hole layer patterns by reducing the area of each side.
CN202010336926.3A 2020-04-26 2020-04-26 OPC correction method for increasing graphic process window of hole layer Active CN111474828B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010336926.3A CN111474828B (en) 2020-04-26 2020-04-26 OPC correction method for increasing graphic process window of hole layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010336926.3A CN111474828B (en) 2020-04-26 2020-04-26 OPC correction method for increasing graphic process window of hole layer

Publications (2)

Publication Number Publication Date
CN111474828A CN111474828A (en) 2020-07-31
CN111474828B true CN111474828B (en) 2023-02-03

Family

ID=71755679

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010336926.3A Active CN111474828B (en) 2020-04-26 2020-04-26 OPC correction method for increasing graphic process window of hole layer

Country Status (1)

Country Link
CN (1) CN111474828B (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10083833B1 (en) * 2017-06-21 2018-09-25 Arm Limited Integration fill technique
CN110579938A (en) * 2019-09-30 2019-12-17 上海华力集成电路制造有限公司 OPC correction method for improving contact hole process hot spot through sub-resolution auxiliary graph

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6964032B2 (en) * 2003-02-28 2005-11-08 International Business Machines Corporation Pitch-based subresolution assist feature design
US10274817B2 (en) * 2017-03-31 2019-04-30 Taiwan Semiconductor Manufacturing Co., Ltd. Mask and photolithography system
KR20200044524A (en) * 2018-10-19 2020-04-29 삼성전자주식회사 Optical proximity correction method and manufacturing method of lithography mask using the same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10083833B1 (en) * 2017-06-21 2018-09-25 Arm Limited Integration fill technique
CN110579938A (en) * 2019-09-30 2019-12-17 上海华力集成电路制造有限公司 OPC correction method for improving contact hole process hot spot through sub-resolution auxiliary graph

Also Published As

Publication number Publication date
CN111474828A (en) 2020-07-31

Similar Documents

Publication Publication Date Title
US7614030B2 (en) Scattering bar OPC application method for mask ESD prevention
US7424699B2 (en) Modifying sub-resolution assist features according to rule-based and model-based techniques
US8788983B2 (en) Method for correcting layout pattern and mask thereof
CN104950568B (en) Optical proximity correction method and double pattern exposure method
US8234596B2 (en) Pattern data creating method, pattern data creating program, and semiconductor device manufacturing method
US6622296B2 (en) Exposure mask pattern correction method, pattern formation method, and a program product for operating a computer
CN111474819B (en) Optical proximity correction method for optimizing MEEF
CN108009316B (en) OPC correction method
KR101705445B1 (en) Method for integrated circuit manufacturing
US20220128899A1 (en) Methods and systems to determine shapes for semiconductor or flat panel display fabrication
US7537864B2 (en) Hole pattern design method and photomask
US20230266659A1 (en) OPC Method
US8839169B2 (en) Pattern determining method, pattern determining apparatus and storage medium
US6350977B2 (en) Pattern distortion detecting method and apparatus and recording medium for pattern distortion detection
JP3977544B2 (en) Circuit design method for semiconductor device and program storage medium
JP5071785B2 (en) Mask pattern forming method
CN111474828B (en) OPC correction method for increasing graphic process window of hole layer
CN108107670B (en) Method for improving OPC precision of through hole layer
CN110929470A (en) Layout optimization method
CN115457350A (en) Optical proximity correction etching model training method and optical proximity correction method
CN111308852B (en) Method for screening auxiliary graph of photomask
KR101096979B1 (en) Method for forming photomask pattern to control critical Demension of semiconductor device
EP3153926B1 (en) A method of reducing shot count in direct writing by a particle or photon beam
CN117454831B (en) Mask pattern optimization method and system and electronic equipment
Lai et al. Phenomena and OPC solution of ripple patterns for 65-nm node

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant