CN111459851A - Cache storage space adjusting method and device, electronic equipment and storage medium - Google Patents
Cache storage space adjusting method and device, electronic equipment and storage medium Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
- G06F12/0871—Allocation or management of cache space
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- G—PHYSICS
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
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Abstract
The application discloses a cache storage space adjusting method and device, electronic equipment and a storage medium, and relates to the technical field of storage. The specific implementation scheme is as follows: when the cache storage space in the storage device is adjusted, the current storage space of the cache is obtained, the processing time length required for writing all cache data in the cache into the nonvolatile memory is determined in response to the fact that the current storage space is full, and the current storage space of the cache is adjusted in combination with the comparison result between the processing time length and the current power supply time length of the standby power supply. Therefore, in the using process of the storage device, the self-adaptive dynamic adjustment of the cache storage space is realized by combining the power supply duration of the standby power supply, the data in the cache can be completely written into the nonvolatile memory when the storage device is powered off, the data cache is prevented from losing the data due to the short standby power supply time, and the reliability of the stored data is ensured.
Description
Technical Field
The present application relates to the field of computer technologies, and in particular, to a method and an apparatus for adjusting a cache storage space, an electronic device, and a storage medium.
Background
In order to prevent the cache contents of the storage device from being lost due to abnormal power failure, the storage device is generally configured with a standby power supply. When the main power supply for supplying power to the storage equipment fails, the standby power supply can supply power immediately, so that the storage equipment is ensured to write the data cached by the system into a disk. However, since the power supply time of the standby power supply is usually very short, how to prevent the data loss of the storage device due to the short standby power supply time is an urgent technical problem to be solved.
Disclosure of Invention
The application provides a method and a device for adjusting a cache storage space, electronic equipment and a storage medium, wherein in the using process of the storage equipment, the power supply duration of a standby power supply is combined, the self-adaptive dynamic adjustment of the cache storage space is realized, the data in the cache can be completely written into a nonvolatile memory when the storage equipment is powered down, the data loss caused by the short time of the standby power supply in the data cache is prevented, and the reliability of the stored data is ensured.
An embodiment of a first aspect of the present application provides a method for adjusting a cache storage space, including: the method is applied to a storage device, wherein the storage device comprises a standby power supply, a cache and a nonvolatile memory, and the method comprises the following steps: obtaining the current storage space of the cache; in response to determining that the current storage space is full, determining a processing duration required for writing all cache data in the cache into the non-volatile memory; acquiring the current power supply time of the standby power supply; and adjusting the current storage space of the cache according to the comparison result of the power supply duration and the processing duration.
In an embodiment of the application, the determining, in response to determining that the current storage space is full, a processing time required to write all cached data in the cache to the non-volatile memory includes: in response to determining that the current storage space is full, obtaining a first time point at which the cache receives first cache data; acquiring a second time point for writing the last cache data in the cache into the nonvolatile memory; and determining the processing time length according to the first time point and the second time point.
In an embodiment of the present application, the adjusting the current storage space of the cache according to the comparison result between the power supply duration and the processing duration includes: if the processing time length is longer than the power supply time length, adding a first adjusting value to the current storage space of the cache; and if the processing time length is less than the power supply time length, adding a second adjusting value to the current storage space of the cache, wherein the second adjusting value is less than the first adjusting value.
In an embodiment of the present application, the cache includes a first cache pool and a second cache pool, a sum of a first storage space of the first cache pool and a second storage space of the second cache pool is equal to the current storage space, and the method further includes: when the data to be cached is cached in the cache, the data to be cached is received through the first cache pool, when the first storage space of the first cache pool is identified to be full, new data to be cached is continuously received through the second cache pool, the cache data in the first cache pool is processed, and the processed cache data is written into the nonvolatile memory; when the second storage space of the second cache pool is identified to be full, if all cache data in the first cache pool are written into the nonvolatile memory, processing the cache data in the second cache pool, and writing the processed cache data into the nonvolatile memory; the obtaining a first time point when the first cache data is received by the cache includes: acquiring a first time point when the first cache pool receives first cache data; the obtaining a second point in time for writing last cached data in the cache to the non-volatile memory comprises: obtaining a second point in time at which the last cache data in the second cache pool is written to the non-volatile memory.
In an embodiment of the present application, when the storage device is used for the first time, the obtaining the current storage space of the cache includes: and determining the current storage space of the cache according to the rated power supply duration of the standby power supply.
In an embodiment of the present application, the determining, according to a rated power supply duration of the standby power supply, a current storage space of the cache includes: determining the data volume which can be written into the nonvolatile memory by the cache according to the power supply duration of the reserve power supply; and determining the current storage space of the cache according to the data volume.
According to the method for adjusting the cache storage space, when the cache storage space in the storage device is adjusted, the current storage space of the cache is obtained, the processing time required for writing all cache data in the cache into the nonvolatile memory is determined in response to the fact that the current storage space is full, and the current storage space of the cache is adjusted according to the comparison result between the processing time and the current power supply time of the standby power supply. Therefore, in the using process of the storage device, the self-adaptive dynamic adjustment of the cache storage space is realized by combining the power supply duration of the standby power supply, the data in the cache can be completely written into the nonvolatile memory when the storage device is powered off, the data cache is prevented from losing the data due to the short standby power supply time, and the reliability of the stored data is ensured.
An embodiment of a second aspect of the present application provides a device for adjusting a cache storage space, including: the device is applied to a storage device, wherein the storage device comprises a standby power supply, a cache and a nonvolatile memory, and the device comprises: the first acquisition module is used for acquiring the current storage space of the cache; the determining module is used for responding to the determination that the current storage space is full, and determining the processing time required for writing all the cache data in the cache into the nonvolatile memory; the second acquisition module is used for acquiring the current power supply duration of the standby power supply; and the adjusting module is used for adjusting the current storage space of the cache according to the comparison result of the power supply duration and the processing duration.
In one embodiment of the present application, the determining module includes: the first obtaining unit is used for responding to the fact that the current storage space is full, and obtaining a first time point when the first cache data is received by the cache; a second obtaining unit, configured to obtain a second time point when last cache data in the cache is written into the nonvolatile memory; and the determining unit is used for determining the processing time length according to the first time point and the second time point.
In an embodiment of the present application, the adjusting module is specifically configured to: if the processing time length is longer than the power supply time length, adding a first adjusting value to the current storage space of the cache; and if the processing time length is less than the power supply time length, adding a second adjusting value to the current storage space of the cache, wherein the second adjusting value is less than the first adjusting value.
In an embodiment of the present application, the cache includes a first cache pool and a second cache pool, a sum of a first storage space of the first cache pool and a second storage space of the second cache pool is equal to the current storage space, and the apparatus further includes: the control module is used for firstly receiving the data to be cached through the first cache pool when the data to be cached is cached in the cache, identifying that a first storage space of the first cache pool is full, then continuously receiving new data to be cached through the second cache pool, processing the cache data in the first cache pool, and writing the processed cache data into the nonvolatile memory; when the second storage space of the second cache pool is identified to be full, if all cache data in the first cache pool are written into the nonvolatile memory, processing the cache data in the second cache pool, and writing the processed cache data into the nonvolatile memory; the first obtaining unit is specifically configured to: acquiring a first time point when the first cache pool receives first cache data; the second obtaining unit is specifically configured to: obtaining a second point in time at which the last cache data in the second cache pool is written to the non-volatile memory.
In an embodiment of the application, when the storage device is used for the first time, the first obtaining module is specifically configured to: and determining the current storage space of the cache according to the rated power supply duration of the standby power supply.
In an embodiment of the application, the first obtaining module is specifically configured to: determining the data volume which can be written into the nonvolatile memory by the cache according to the power supply duration of the reserve power supply; and determining the current storage space of the cache according to the data volume.
When the cache storage space in the storage device is adjusted, the current storage space of the cache is obtained, the processing time length required for writing all cache data in the cache into the nonvolatile memory is determined in response to the fact that the current storage space is full, and the current storage space of the cache is adjusted in combination with the comparison result between the processing time length and the current power supply time length of the standby power supply. Therefore, in the using process of the storage device, the self-adaptive dynamic adjustment of the cache storage space is realized by combining the power supply duration of the standby power supply, the data in the cache can be completely written into the nonvolatile memory when the storage device is powered off, the data cache is prevented from losing the data due to the short standby power supply time, and the reliability of the stored data is ensured.
An embodiment of a third aspect of the present application provides an electronic device, including: a processor; a standby power supply; caching; a non-volatile memory; the processor is in communication connection with the nonvolatile memory, and the nonvolatile memory stores instructions executable by the processor, and the instructions are executed by the processor, so that the processor can execute the cache memory space adjusting method of the embodiment of the application.
A fourth aspect of the present application provides a non-transitory computer-readable storage medium storing computer instructions for causing a computer to execute the cache storage space adjusting method disclosed in the embodiments of the present application.
One embodiment in the above application has the following advantages or benefits: in the using process of the storage device, the self-adaptive dynamic adjustment of the cache storage space is realized by combining the power supply duration of the standby power supply, the data in the cache can be completely written into the nonvolatile memory when the storage device is powered off, the data cache is prevented from losing the data due to the fact that the standby power supply time is too short, and the reliability of the stored data is guaranteed. The technical means of adjusting the current storage space of the cache is combined with the comparison result between the processing time and the current power supply time of the standby power supply, so that the technical problem of data loss caused by the fact that the time of the standby power supply is too short in the related technology is solved, the data in the cache can be completely written into the nonvolatile memory when the storage device is powered off, the data loss caused by the fact that the time of the standby power supply is too short in the data cache is prevented, and the reliability of the stored data is guaranteed.
Other effects of the above-described alternative will be described below with reference to specific embodiments.
Drawings
The drawings are included to provide a better understanding of the present solution and are not intended to limit the present application. Wherein:
FIG. 1 is a schematic diagram according to a first embodiment of the present application;
FIG. 2 is a schematic diagram according to a second embodiment of the present application;
FIG. 3 is a schematic illustration according to a third embodiment of the present application;
FIG. 4 is a schematic illustration according to a fourth embodiment of the present application;
FIG. 5 is a block diagram of an electronic device used to implement embodiments of the present application.
Detailed Description
The following description of the exemplary embodiments of the present application, taken in conjunction with the accompanying drawings, includes various details of the embodiments of the application for the understanding of the same, which are to be considered exemplary only. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the present application. Also, descriptions of well-known functions and constructions are omitted in the following description for clarity and conciseness.
The following describes a cache storage space adjustment method, apparatus, electronic device, and storage medium according to an embodiment of the present application with reference to the drawings.
Fig. 1 is a schematic diagram according to a first embodiment of the present application. It should be noted that an execution main body of the cache storage space adjustment method of this embodiment is a cache storage space adjustment device, where the cache storage space adjustment device may be implemented in a software and/or hardware manner, the cache storage space adjustment device is applied to a storage device, the storage device may include, but is not limited to, a standby power supply, a cache, and a nonvolatile memory, the storage device may be an electronic device having, but not limited to, a standby power supply, a cache, a nonvolatile memory, and the like, the electronic device may include, but is not limited to, a terminal, a server, and the like, and the implementation is not limited thereto.
As shown in fig. 1, the cache storage space adjusting method may include:
Specifically, in the running process of the storage device, in order to enable all cache data in the cache to be written into the nonvolatile memory when abnormal power failure occurs, the present embodiment obtains the current storage space of the cache. I.e. the memory space currently used by the cache is obtained.
The nonvolatile memory may include, but is not limited to, a hard disk, a magnetic disk, and the like, and the present embodiment is described with the nonvolatile memory being a magnetic disk.
And 103, acquiring the current power supply time of the standby power supply.
In this embodiment, the power storage amount of the fully charged backup power source can be obtained, and the current power supply duration of the backup power source is determined according to the power storage amount of the fully charged backup power source.
The current power supply time length refers to the time length during which the standby power supply can stably supply power by discharging with the fully charged current power storage amount.
It can be understood that, as time goes by, the discharge performance of the backup power supply changes, and therefore, after the backup power supply is used for a period of time, the power supply duration of the backup power supply changes, and therefore, in order to prevent the data loss of the storage device due to the too short backup power supply time, the duration of the current power supply that can be provided after the backup power supply is fully charged is used in this embodiment.
It can be understood that the standby power supply in this embodiment is in a full power state until the storage device is not powered down.
And 104, adjusting the current storage space of the cache according to the comparison result of the power supply duration and the processing duration.
In this embodiment, after the power supply duration and the processing duration are obtained, the power supply duration and the processing duration may be compared, and if the processing duration is greater than the power supply duration, the current storage space of the cache is decreased by a first adjustment value.
And if the processing time length is less than the power supply time length, adding a second adjusting value to the current cache storage space.
Wherein the second adjustment value is smaller than the first adjustment value.
Wherein, the first adjustment value and the second adjustment value are preset.
According to the method for adjusting the cache storage space, when the cache storage space in the storage device is adjusted, the current storage space of the cache is obtained, the processing time required for writing all cache data in the cache into the nonvolatile memory is determined in response to the fact that the current storage space is full, and the current storage space of the cache is adjusted according to the comparison result between the processing time and the current power supply time of the standby power supply. Therefore, in the using process of the storage device, the self-adaptive dynamic adjustment of the cache storage space is realized by combining the power supply duration of the standby power supply, the data in the cache can be completely written into the nonvolatile memory when the storage device is powered off, the data cache is prevented from losing the data due to the short standby power supply time, and the reliability of the stored data is ensured.
In an embodiment of the present application, as shown in fig. 2, a specific implementation process of step 102 in this embodiment may include:
step 210, in response to determining that the current storage space is full, obtaining a first time point at which the first cache data is received by the cache.
It can be understood that, in this embodiment, the first cache data refers to the first data cached when the cache uses the current storage space.
In step 220, a second time point for writing the last cached data in the cache to the non-volatile memory is obtained.
It can be understood that, in this embodiment, the last cached data refers to the last data cached when the cache uses the current storage space.
Step 230, determining a processing duration according to the first time point and the second time point.
Specifically, after the first time point and the second time point are acquired, a time interval between the first time point and the second time point may be calculated, and the calculated time interval is taken as the processing time length.
In an embodiment of the present application, the cache in this embodiment may use a dual cache pool policy, and the cache includes a first cache pool and a second cache pool, which is further described below with reference to fig. 3.
As shown in fig. 3, the method may include:
And step 304, when the second storage space of the second cache pool is identified to be full, if all the cache data in the first cache pool is written into the nonvolatile memory, processing the cache data in the second cache pool, and writing the processed cache data into the nonvolatile memory.
And step 306, acquiring the current power supply time of the standby power supply.
And 307, adjusting the current storage space of the cache according to the comparison result of the power supply time length and the processing time length.
Based on any of the above embodiments, when the storage device is used for the first time, a specific implementation manner of obtaining the current storage space of the cache may be as follows: and determining the current storage space of the cache according to the rated power supply duration of the standby power supply.
In an embodiment of the present application, according to a rated power supply duration of the standby power supply, a specific implementation manner of determining a current storage space of the cache is as follows: and determining the data volume which can be written into the nonvolatile memory by the cache according to the power supply duration of the limit of the standby power supply, and then determining the current storage space of the cache according to the data volume.
In order to make the present application more clear to those skilled in the art, the method of the present embodiment is described below with reference to the following examples.
For example, the nonvolatile memory is a disk, it is assumed that M-sized data can be normally guaranteed to be processed and stored within the standby power supply time, the data cache uses a double-cache pool policy, and it is assumed that the current storage space of the cache is M. One cache pool is named as a receiving cache pool and one is named as a storing cache pool. When the receiving thread of the system always puts the initial received data into the receiving cache pool and records the time point T1 when the receiving cache pool receives the first cache data, when the receiving cache pool is full, the receiving cache pool and the storage cache pool exchange identities, and the receiving thread continues to write data into the new receiving cache pool. And after the receiving cache pool and the storage cache pool exchange identities, the processing thread is responsible for processing the data of the full storage cache pool and writing the data into a disk. When the processing thread has finished processing the memory cache pool, time T2 is recorded at this point. When T2-T1 > Tm, M — n1 (wherein n1 represents a first adjustment value); when T2-T1 < Tm, M is M + n2 (wherein n2 represents a second adjustment value), so that the dynamic adjustment of the storage space of the cache is realized, and the cached data can be written into a disk within the power supply time of the standby power supply.
In order to implement the foregoing embodiments, an apparatus for adjusting a cache storage space is further provided in the embodiments of the present application.
Fig. 4 is a schematic diagram according to a fourth embodiment of the present application. As shown in fig. 4, the cache memory space adjusting apparatus 100 is applied in a storage device, the storage device includes a standby power supply, a cache, and a non-volatile memory, and the cache memory space adjusting apparatus 100 may include: a first obtaining module 110, a determining module 120, a second obtaining module 130, and an adjusting module 140, wherein:
the first obtaining module 110 is configured to obtain a current storage space of the cache.
The determining module 120 is configured to determine, in response to determining that the current storage space is full, a processing time required to write all the cached data in the cache to the nonvolatile memory.
And a second obtaining module 130, configured to obtain a current power supply duration of the standby power supply.
And the adjusting module 140 is configured to adjust the current storage space of the cache according to the comparison result between the power supply duration and the processing duration.
In one embodiment of the present application, the determining module 120 includes:
the first obtaining unit is used for responding to the fact that the current storage space is full, and obtaining a first time point when the first cache data is received by the cache.
And the second acquisition unit is used for acquiring a second time point of writing the last cache data in the cache into the nonvolatile memory.
And the determining unit is used for determining the processing time length according to the first time point and the second time point.
In an embodiment of the present application, the adjusting module is specifically configured to:
if the processing time length is longer than the power supply time length, a first adjustment value is added to the current cache space; and if the processing time length is less than the power supply time length, adding a second adjusting value to the current storage space of the cache, wherein the second adjusting value is less than the first adjusting value.
In an embodiment of the present application, the cache includes a first cache pool and a second cache pool, a sum of a first storage space of the first cache pool and a second storage space of the second cache pool is equal to the current storage space, and the apparatus further includes:
a control module (not shown in the figure), configured to, when caching data to be cached in a cache, receive the data to be cached through a first cache pool, recognize that a first storage space of the first cache pool is full, continue to receive new data to be cached through a second cache pool, process the cache data in the first cache pool, and write the processed cache data into a nonvolatile memory; and when the second storage space of the second cache pool is identified to be full, if all the cache data in the first cache pool is written into the nonvolatile memory, processing the cache data in the second cache pool, and writing the processed cache data into the nonvolatile memory.
The first obtaining unit is specifically configured to: and acquiring a first time point when the first cache pool receives the first cache data.
The second obtaining unit is specifically configured to: a second point in time at which the last cache data in the second cache pool is written to the non-volatile memory is obtained.
In an embodiment of the present application, when the storage device is used for the first time, the first obtaining module 110 is specifically configured to: and determining the current storage space of the cache according to the rated power supply duration of the standby power supply.
In an embodiment of the present application, the first obtaining module 110 is specifically configured to: determining the data volume which can be written into the nonvolatile memory by cache according to the power supply duration of the limit of the standby power supply; and determining the current storage space of the cache according to the data volume.
It should be noted that the explanation of the foregoing method for adjusting the cache memory space is also applicable to the apparatus for adjusting the cache memory space of this embodiment, and is not repeated here.
When the cache storage space in the storage device is adjusted, the current storage space of the cache is obtained, the processing time length required for writing all cache data in the cache into the nonvolatile memory is determined in response to the fact that the current storage space is full, and the current storage space of the cache is adjusted in combination with the comparison result between the processing time length and the current power supply time length of the standby power supply. Therefore, in the using process of the storage device, the self-adaptive dynamic adjustment of the cache storage space is realized by combining the power supply duration of the standby power supply, the data in the cache can be completely written into the nonvolatile memory when the storage device is powered off, the data cache is prevented from losing the data due to the short standby power supply time, and the reliability of the stored data is ensured.
The embodiment of the application also provides electronic equipment, which comprises a standby power supply and a cache. Non-volatile memory, and the cache memory space device of any of the embodiments described above.
It should be noted that the foregoing explanation of the cache memory space adjusting apparatus is also applicable to the asset management system of this embodiment, and is not repeated here.
According to an embodiment of the present application, an electronic device and a readable storage medium are also provided.
As shown in fig. 5, is a block diagram of an electronic device according to an embodiment of the application. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be examples only, and are not meant to limit implementations of the present application that are described and/or claimed herein.
As shown in fig. 5, the electronic apparatus includes: a processor 501, a backup power supply 502, a cache 503, and a non-volatile memory 504, wherein the processor 501 is communicatively coupled to the non-volatile memory 504, and the non-volatile memory 504 stores instructions executable by the processor, the instructions being executable by the processor 501 to enable the processor 501 to execute. The processor 501 may process instructions for execution within the electronic device, including instructions stored in the non-volatile memory 504 or on the non-volatile memory 504 to display graphical information of a GUI on an external input/output apparatus (such as a display device coupled to an interface). In other embodiments, multiple processors and/or multiple buses may be used, along with multiple non-volatile memories and multiple non-volatile memories, as desired. Also, multiple electronic devices may be connected, with each device providing portions of the necessary operations (e.g., as a server array, a group of blade servers, or a multi-processor system). In fig. 5, one processor 501 is taken as an example.
The non-volatile memory 504, which is a non-transitory computer readable storage medium, may be used to store non-transitory software programs, non-transitory computer executable programs, and modules, such as program instructions/modules corresponding to the cache memory space adjusting method in the embodiments of the present application. The processor 501 executes various functional applications of the server and data processing by running the non-transitory software programs, instructions, and modules stored in the non-volatile memory 504, that is, implements the cache memory space adjustment method in the above method embodiment.
The non-volatile memory 504 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created according to use of the electronic device, and the like. In addition, the non-volatile memory 504 may include high speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device. In some embodiments, the non-volatile memory 504 optionally includes memory located remotely from the processor 501, which may be connected to the electronic device via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The electronic device may further include: an input device 505 and an output device 506. The processor 501, the nonvolatile memory 504, the input device 505, and the output device 506 may be connected by a bus or other means, and the bus connection is exemplified in fig. 5.
Various implementations of the systems and techniques described here can be realized in digital electronic circuitry, integrated circuitry, application specific ASICs (application specific integrated circuits), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs that are executable and/or interpretable on a programmable system including at least one programmable processor, which may be special or general purpose, receiving data and instructions from, and transmitting data and instructions to, a storage system, at least one input device, and at least one output device.
As used herein, the terms "machine-readable medium" and "computer-readable medium" refer to any computer program product, apparatus, and/or device (e.g., magnetic discs, optical disks, memory, programmable logic devices (P L D)) used to provide machine instructions and/or data to a programmable processor, including a machine-readable medium that receives machine instructions as a machine-readable signal.
The systems and techniques described here can be implemented on a computer having a display device (e.g., a CRT (cathode ray tube) or L CD (liquid crystal display) monitor) for displaying information to the user and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the computer for providing interaction with the user.
The systems and techniques described here can be implemented in a computing system that includes a back-end component (e.g., as a data server), or that includes a middleware component (e.g., AN application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with AN implementation of the systems and techniques described here), or any combination of such back-end, middleware, or front-end components.
The computer system may include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other.
It should be understood that various forms of the flows shown above may be used, with steps reordered, added, or deleted. For example, the steps described in the present application may be executed in parallel, sequentially, or in different orders, as long as the desired results of the technical solutions disclosed in the present application can be achieved, and the present invention is not limited herein.
The above-described embodiments should not be construed as limiting the scope of the present application. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions may be made in accordance with design requirements and other factors. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (14)
1. A cache memory space adjusting method is applied to a storage device, wherein the storage device comprises a standby power supply, a cache and a nonvolatile memory, and the method comprises the following steps:
obtaining the current storage space of the cache;
in response to determining that the current storage space is full, determining a processing duration required for writing all cache data in the cache into the non-volatile memory;
acquiring the current power supply time of the standby power supply;
and adjusting the current storage space of the cache according to the comparison result of the power supply duration and the processing duration.
2. The method of claim 1, wherein determining a processing duration required to write all cached data in the cache to the non-volatile memory in response to determining that the current storage space is full comprises:
in response to determining that the current storage space is full, obtaining a first time point at which the cache receives first cache data;
acquiring a second time point for writing the last cache data in the cache into the nonvolatile memory;
and determining the processing time length according to the first time point and the second time point.
3. The method of claim 1, wherein the adjusting the current storage space of the cache according to the comparison result of the power supply duration and the processing duration comprises:
if the processing time length is longer than the power supply time length, adding a first adjusting value to the current storage space of the cache;
and if the processing time length is less than the power supply time length, adding a second adjusting value to the current storage space of the cache, wherein the second adjusting value is less than the first adjusting value.
4. The method of claim 2, wherein the cache comprises a first cache pool and a second cache pool, and wherein a sum of a first storage space of the first cache pool and a second storage space of the second cache pool is equal to the current storage space, the method further comprising:
when the data to be cached is cached in the cache, the data to be cached is received through the first cache pool, when the first storage space of the first cache pool is identified to be full, new data to be cached is continuously received through the second cache pool, the cache data in the first cache pool is processed, and the processed cache data is written into the nonvolatile memory;
when the second storage space of the second cache pool is identified to be full, if all cache data in the first cache pool are written into the nonvolatile memory, processing the cache data in the second cache pool, and writing the processed cache data into the nonvolatile memory;
the obtaining a first time point when the first cache data is received by the cache includes:
acquiring a first time point when the first cache pool receives first cache data;
the obtaining a second point in time for writing last cached data in the cache to the non-volatile memory comprises:
obtaining a second point in time at which the last cache data in the second cache pool is written to the non-volatile memory.
5. The method according to any one of claims 1-4, wherein the obtaining the current storage space of the cache when the storage device is used for the first time comprises:
and determining the current storage space of the cache according to the rated power supply duration of the standby power supply.
6. The method of claim 5, wherein determining the current storage space of the cache according to the rated power supply duration of the backup power supply comprises:
determining the data volume which can be written into the nonvolatile memory by the cache according to the power supply duration of the reserve power supply;
and determining the current storage space of the cache according to the data volume.
7. A buffer memory space adjusting device is applied to a memory device, wherein the memory device comprises a standby power supply, a buffer memory and a nonvolatile memory, and the device comprises:
the first acquisition module is used for acquiring the current storage space of the cache;
the determining module is used for responding to the determination that the current storage space is full, and determining the processing time required for writing all the cache data in the cache into the nonvolatile memory;
the second acquisition module is used for acquiring the current power supply duration of the standby power supply;
and the adjusting module is used for adjusting the current storage space of the cache according to the comparison result of the power supply duration and the processing duration.
8. The apparatus of claim 7, wherein the determining module comprises:
the first obtaining unit is used for responding to the fact that the current storage space is full, and obtaining a first time point when the first cache data is received by the cache;
a second obtaining unit, configured to obtain a second time point when last cache data in the cache is written into the nonvolatile memory;
and the determining unit is used for determining the processing time length according to the first time point and the second time point.
9. The apparatus of claim 7, wherein the adjustment module is specifically configured to:
if the processing time length is longer than the power supply time length, adding a first adjusting value to the current storage space of the cache;
and if the processing time length is less than the power supply time length, adding a second adjusting value to the current storage space of the cache, wherein the second adjusting value is less than the first adjusting value.
10. The apparatus of claim 8, wherein the cache comprises a first cache pool and a second cache pool, and wherein a sum of a first storage space of the first cache pool and a second storage space of the second cache pool is equal to the current storage space, the apparatus further comprising:
the control module is used for firstly receiving the data to be cached through the first cache pool when the data to be cached is cached in the cache, identifying that a first storage space of the first cache pool is full, then continuously receiving new data to be cached through the second cache pool, processing the cache data in the first cache pool, and writing the processed cache data into the nonvolatile memory; when the second storage space of the second cache pool is identified to be full, if all cache data in the first cache pool are written into the nonvolatile memory, processing the cache data in the second cache pool, and writing the processed cache data into the nonvolatile memory;
the first obtaining unit is specifically configured to:
acquiring a first time point when the first cache pool receives first cache data;
the second obtaining unit is specifically configured to:
obtaining a second point in time at which the last cache data in the second cache pool is written to the non-volatile memory.
11. The apparatus according to any one of claims 7 to 10, wherein, when the storage device is used for the first time, the first obtaining module is specifically configured to:
and determining the current storage space of the cache according to the rated power supply duration of the standby power supply.
12. The apparatus according to claim 11, wherein the first obtaining module is specifically configured to:
determining the data volume which can be written into the nonvolatile memory by the cache according to the power supply duration of the reserve power supply;
and determining the current storage space of the cache according to the data volume.
13. An electronic device, comprising:
a processor;
a standby power supply;
caching;
a non-volatile memory;
wherein the processor is communicatively coupled to the non-volatile memory that stores instructions executable by the processor to enable the processor to perform the method of any of claims 1-6.
14. A non-transitory computer readable storage medium having stored thereon computer instructions for causing the computer to perform the method of any one of claims 1-6.
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