CN111459544A - Method, medium and device for voting multi-pair thread data in secure computer board card - Google Patents
Method, medium and device for voting multi-pair thread data in secure computer board card Download PDFInfo
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- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
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Abstract
A method, a storage medium and a device for voting multiple pairs of thread data in a secure computer board card are provided, wherein the method comprises the following steps: arranging N independent voting channels between a first Central Processing Unit (CPU) and a second CPU of a secure computer board card, wherein N is a positive integer and is not less than 2; and simultaneously mutually transmitting data for at most N pairs of threads through the N voting channels so as to vote the data among the multiple pairs of threads, wherein each pair of threads comprises two corresponding threads which are respectively operated on the first CPU and the second CPU and need to vote for two-out-of-two data among the threads. The method and the device can improve voting efficiency of multiple pairs of thread data.
Description
Technical Field
The present disclosure relates to data voting technologies, and in particular, to a method, a storage medium, and an apparatus for voting data on multiple pairs of threads in a secure computer board.
Background
The computer train control system usually comprises a board card for logical operation, the board card is composed of A, B two parts of circuits which are electrically isolated, each part of circuits is provided with an independent central processing unit CPU for respectively processing and calculating data, any input data and output data which relate to train control and driving safety need to be subjected to two-out-of-two voting by the two CPUs, the data which pass through the voting can be used, the data which do not pass through the voting cannot be credible, and the whole train control system can reach the SI L4 safety integrity level by safety protection measures such as a two-out-of-two voting mechanism and the like.
In the related art, two-out-of-two voting in a train control system mainly includes two modes:
one is that a voter of a third party votes according to input and output data of a CPU A and a CPU B in a board card, and respectively feeds back a voting result to the CPU A and the CPU B, as shown in FIG. 1;
the other is a circuit A and a circuit B with voting modules, as shown in FIG. 2, the CPU A and the CPU B carry out data mutual transmission through isolated communication interfaces, and realize voting on the data of the two CPUs through a voter of the CPU A and the CPU B.
The first voting mode uses a voter circuit of a third party in the board card, so that the area and the implementation complexity of the board card circuit are increased, and the cost is also increased; the second voting method eliminates the use of a voting module by a third-party voter circuit, but cannot meet the requirement of simultaneously requesting voting for multiple pairs of thread data in a multi-thread system.
Disclosure of Invention
The application provides a method, a storage medium and a device for voting multiple pairs of thread data in a secure computer board card, which can improve the voting efficiency of the multiple pairs of thread data.
The method for voting the multiple pairs of thread data in the secure computer board card comprises the following steps:
arranging N independent voting channels between a first Central Processing Unit (CPU) and a second CPU of a secure computer board card, wherein N is a positive integer and is not less than 2;
and simultaneously mutually transmitting data for at most N pairs of threads through the N voting channels so as to vote the data among the multiple pairs of threads, wherein each pair of threads comprises two corresponding threads which are respectively operated on the first CPU and the second CPU and need to vote for two-out-of-two data among the threads.
In an exemplary embodiment, the mutually transferring data for at most N pairs of threads through N voting channels to vote data among multiple pairs of threads, includes:
sorting a plurality of pairs of threads needing to be subjected to inter-thread two-out-of-two data voting from high to low according to priority;
and selecting at most N pairs of threads from the sequenced multiple pairs of threads at one time to perform mutual transmission of thread data through the N voting channels until the sequenced pairs of threads all complete mutual transmission of data.
In an exemplary embodiment, the mutually transferring data for at most N pairs of threads through N voting channels to vote data among multiple pairs of threads, includes:
the method comprises the steps that thread pairs needing to be subjected to two-out-of-thread two-data voting on a first CPU and a second CPU are divided into N groups at most according to a set thread grouping principle, each group corresponds to one voting channel, and a pair of thread pairs are selected from each group to be mutually transmitted through the corresponding voting channels of the group until all the thread pairs needing to be subjected to two-out-of-thread two-data voting are mutually transmitted.
In an exemplary embodiment, the thread grouping principle includes:
the priority of the threads is divided into N levels, and the threads with the same priority are divided into the same group.
In an exemplary embodiment, after selecting a pair of threads from each group to mutually transmit through the voting channels corresponding to the group, the method further includes:
when the thread pairs in the high-level group need to be mutually transmitted and no thread pair in the adjacent low-level group needs to be mutually transmitted, selecting one pair of threads from the high-level group to be mutually transmitted through the voting channels corresponding to the low-level group until all the thread pairs which need to be subjected to two-out-of-thread data voting are mutually transmitted.
As an exemplary embodiment, N equals 3;
the number of thread pairs which run on the first CPU and the second CPU and need to vote for two-out-of-threads data is more than or equal to 3.
The computer-readable and writable storage medium provided in the embodiment of the present application stores computer-executable instructions, and when the computer-executable instructions are executed by a processor, the steps of the method for voting multiple pairs of thread data in a secure computer board card according to the foregoing embodiment are implemented.
The control device that this application embodiment provided includes:
a memory for storing computer executable instructions;
a processor configured to execute the computer-executable instructions to implement the steps of the method for voting on a plurality of pairs of thread data in the secure computer board according to the foregoing embodiment.
Compared with the related art, the method comprises the following steps: arranging N independent voting channels between a first Central Processing Unit (CPU) and a second CPU of a secure computer board card, wherein N is a positive integer and is not less than 2; and simultaneously mutually transmitting data for at most N pairs of threads through the N voting channels so as to vote the data among the multiple pairs of threads, wherein each pair of threads comprises two corresponding threads which are respectively operated on the first CPU and the second CPU and need to vote for two-out-of-two data among the threads. The method and the device can improve voting efficiency of multiple pairs of thread data.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the application. Other advantages of the present application may be realized and attained by the instrumentalities and combinations particularly pointed out in the specification and the drawings.
Drawings
The accompanying drawings are included to provide an understanding of the present disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the examples serve to explain the principles of the disclosure and not to limit the disclosure.
FIG. 1 is a diagram illustrating a two-out-of-two data voting implemented by a train control system in the related art;
FIG. 2 is a diagram illustrating voting of two-out-of-two data implemented by another train control system in the related art;
fig. 3 is a flowchart of a method for voting on a plurality of pairs of thread data in a secure computer board card according to an embodiment of the present application;
FIG. 4 is a schematic diagram illustrating a plurality of voting channels disposed between a first CPU and a second CPU according to an embodiment of the present disclosure;
FIG. 5 is a schematic diagram illustrating the first CPU and the second CPU being divided into 3 groups after the threads are prioritized according to the embodiment of the present application;
fig. 6 is a thread correspondence relationship for voting two-out-of-two data between threads on the first CPU and the second CPU according to the embodiment of the present application.
Detailed Description
The present application describes embodiments, but the description is illustrative rather than limiting and it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible within the scope of the embodiments described herein. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are possible. Any feature or element of any embodiment may be used in combination with or instead of any other feature or element in any other embodiment, unless expressly limited otherwise.
The present application includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The embodiments, features and elements disclosed in this application may also be combined with any conventional features or elements to form a unique inventive concept as defined by the claims. Any feature or element of any embodiment may also be combined with features or elements from other inventive aspects to form yet another unique inventive aspect, as defined by the claims. Thus, it should be understood that any of the features shown and/or discussed in this application may be implemented alone or in any suitable combination. Accordingly, the embodiments are not limited except as by the appended claims and their equivalents. Furthermore, various modifications and changes may be made within the scope of the appended claims.
Further, in describing representative embodiments, the specification may have presented the method and/or process as a particular sequence of steps. However, to the extent that the method or process does not rely on the particular order of steps set forth herein, the method or process should not be limited to the particular sequence of steps described. Other orders of steps are possible as will be understood by those of ordinary skill in the art. Therefore, the particular order of the steps set forth in the specification should not be construed as limitations on the claims. Further, the claims directed to the method and/or process should not be limited to the performance of their steps in the order written, and one skilled in the art can readily appreciate that the sequences may be varied and still remain within the spirit and scope of the embodiments of the present application.
In the related art, although the second voting method eliminates the use of the voting module of the third-party voter circuit, the requirement that multiple pairs of thread data need to be voted simultaneously in the multi-thread system cannot be met because only one communication interface is arranged between the voting module a and the voting module B. In the train control system realized based on the operating system, each CPU program may include a plurality of threads, each thread realizes different functions, and a plurality of pairs of processes which need to perform two-out-of-process data voting on two CPUs all need to call a communication interface for voting to perform data voting. If the second voting mode is adopted in the multi-thread train control system, congestion of multiple pairs of threads needing to vote two-out-of-two data is easily caused, the overall voting efficiency is further influenced, and the scheduling efficiency of the threads is also reduced.
The embodiment of the application provides a method for voting multiple pairs of thread data in a secure computer board card, as shown in fig. 3, the method includes:
step S301, N independent voting channels are arranged between a first Central Processing Unit (CPU) and a second CPU of a secure computer board card, wherein N is a positive integer and is not less than 2;
step S302 is to mutually transmit data for at most N pairs of threads through the N voting channels so as to vote the data among the multiple pairs of threads, wherein each pair of threads comprises two corresponding threads which need to vote two-out-of-two data among the threads and respectively run on the first CPU and the second CPU.
According to the embodiment of the application, the voting channel between the first CPU and the second CPU is added, so that the possibility of carrying out data voting as soon as possible on multiple pairs of threads which need to carry out two-out-of-threads data voting and run on the first CPU and the second CPU is increased, and the data voting efficiency of multiple threads is further improved.
The number of voting channels in the embodiment of the present application may be equal to 3, as shown in fig. 4; the number of thread pairs running on the first CPU and the second CPU and needing to vote on two-out-of-thread data can be equal to 3 or more than 3.
In an exemplary embodiment, the mutually transferring data for at most N pairs of threads through N voting channels simultaneously to vote data among multiple pairs of threads includes:
sorting a plurality of pairs of threads needing to be subjected to inter-thread two-out-of-two data voting from high to low according to priority; and selecting at most N pairs of threads from the sequenced multiple pairs of threads at one time to perform mutual transmission of thread data through the N voting channels until the sequenced pairs of threads all complete mutual transmission of data. If the number of the multiple pairs of threads is M1, and M1 is less than or equal to N, all the sequenced multiple pairs of threads can be selected at one time, and the mutual transmission of thread data is carried out through the M1 voting channels; if the number of the multiple pairs of threads is M2, and M2 is greater than N, selecting N pairs of threads from the sorted multiple pairs of data to perform mutual transmission of thread data through N voting channels, and when an idle voting channel exists, selecting the thread pairs with the number equal to the number of the idle voting channels from the remaining thread pairs to be voted by data, and performing mutual transmission of the thread data through the idle voting channels.
In another exemplary embodiment, the mutually transferring data for at most N pairs of threads through N voting channels simultaneously to vote data among multiple pairs of threads includes:
the method comprises the steps that thread pairs needing to be subjected to two-out-of-thread two-data voting on a first CPU and a second CPU are divided into N groups at most according to a set thread grouping principle, each group corresponds to one voting channel, and a pair of thread pairs are selected from each group to be mutually transmitted through the corresponding voting channels of the group until all the thread pairs needing to be subjected to two-out-of-thread two-data voting are mutually transmitted.
The thread grouping principle comprises:
the priority of the threads is divided into N levels, and the threads with the same priority are divided into the same group. The priority level of the thread can be determined according to the data size of the vote and/or the response time of the thread. If the thread priority can support the range of 1-255 (the smaller the priority number is, the higher the corresponding priority is), the system has 255 thread priorities at most, and each priority corresponds to one thread. Dividing the priority level 1-10 into a level 1, wherein the thread scheduling priority level of the level has high requirement, the voting data volume is small, the response time requirement is high, and data voting needs to be performed in time; dividing the priority levels 11-50 into a level 2, wherein the voting data volume of the threads of the level is medium, and the requirement on response time is medium; dividing the priority 51-255 into a3 rd level, wherein the voting data volume of the threads of the level is large, and the requirement on response time is low; or the lower-level thread votes a small amount of data and has a low response time requirement. Threads with large voting data volume and high response time requirements are generally not allowed to appear in design, and such threads need to compress the voting data volume first to prevent the large data volume high-priority table from blocking the normal order of other threads. As shown in FIG. 5, the thread data IDs are defined as T1-T255 according to the thread priority, wherein the thread IDs in the first CPU are defined as Ta1, Ta2, Ta3, … …, Ta 255; the thread IDs in the second CPU are defined as Tb1, Tb2, Tb3, … … and Tb 255; in the system operation process, data voting is performed on the Ta1 thread of the first CPU and the Tb1 thread of the second CPU, data voting is performed on the Ta2 thread of the first CPU and the Tb2 thread of the second CPU, data voting is performed on the Ta3 thread of the first CPU and the Tb3 thread of the second CPU, … … data voting is performed on the Ta255 thread of the first CPU and the Tb255 thread of the second CPU, and the threads performing data voting are divided into three groups according to the priority of the threads as shown in fig. 6.
In another exemplary embodiment, after selecting a pair of threads from each group to mutually transmit through the voting channels corresponding to the group, the method further includes:
when the thread pairs in the high-level group need to be mutually transmitted and no thread pair in the adjacent low-level group needs to be mutually transmitted, selecting one pair of threads from the high-level group to be mutually transmitted through the voting channels corresponding to the low-level group until all the thread pairs which need to be subjected to two-out-of-thread data voting are mutually transmitted.
In the present application, a data packet of thread data that is mutually transmitted may be as shown in table 1, and the data packet may include a packet header, a packet length, a packet end, a thread number, a sequence number, data, and CRC. The thread number is used for distinguishing threads, and the data subjected to subsequent voting is guaranteed to be voting data mutually transmitted by the same thread of the first CPU and the second CPU.
TABLE 1
The embodiment of the present application further provides a computer readable and writable storage medium, where the medium stores computer executable instructions, and the computer executable instructions, when executed by a processor, implement the steps of the method for voting the multithread data in the two-out-of-two board card according to the foregoing embodiment.
An embodiment of the present application further provides a control apparatus, including
A memory for storing computer executable instructions;
and the processor is used for executing the computer-executable instructions to realize the steps of the method for voting the multithread data in the two-out-of-two structure board card in the embodiment.
It will be understood by those of ordinary skill in the art that all or some of the steps of the methods, systems, functional modules/units in the devices disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. In a hardware implementation, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed by several physical components in cooperation. Some or all of the components may be implemented as software executed by a processor, such as a digital signal processor or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as is well known to those of ordinary skill in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, Digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can accessed by a computer. In addition, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media as known to those skilled in the art.
Claims (8)
1. A method for voting on a plurality of pairs of thread data in a secure computer board card is characterized by comprising the following steps:
arranging N independent voting channels between a first Central Processing Unit (CPU) and a second CPU of a secure computer board card, wherein N is a positive integer and is not less than 2;
and simultaneously mutually transmitting data for at most N pairs of threads through the N voting channels so as to vote the data among the multiple pairs of threads, wherein each pair of threads comprises two corresponding threads which are respectively operated on the first CPU and the second CPU and need to vote for two-out-of-two data among the threads.
2. A method for voting on a plurality of pairs of thread data in a secure computer board card according to claim 1,
the data are mutually transmitted for at most N pairs of threads through the N voting channels so as to vote the data among the multiple pairs of threads, and the method comprises the following steps:
sorting a plurality of pairs of threads needing to be subjected to inter-thread two-out-of-two data voting from high to low according to priority;
and selecting at most N pairs of threads from the sequenced multiple pairs of threads at one time to perform mutual transmission of thread data through the N voting channels until the sequenced pairs of threads all complete mutual transmission of data.
3. A method for voting on a plurality of pairs of thread data in a secure computer board card according to claim 1,
the data are mutually transmitted for at most N pairs of threads through the N voting channels so as to vote the data among the multiple pairs of threads, and the method comprises the following steps:
the method comprises the steps that thread pairs needing to be subjected to two-out-of-thread two-data voting on a first CPU and a second CPU are divided into N groups at most according to a set thread grouping principle, each group corresponds to one voting channel, and a pair of thread pairs are selected from each group to be mutually transmitted through the corresponding voting channels of the group until all the thread pairs needing to be subjected to two-out-of-thread two-data voting are mutually transmitted.
4. A method for voting on a plurality of pairs of thread data in a secure computer board card according to claim 3,
the thread grouping principle comprises:
the priority of the threads is divided into N levels, and the threads with the same priority are divided into the same group.
5. A method for voting on a plurality of pairs of thread data in a secure computer board card according to claim 4,
after a pair of threads is selected from each group and mutually transmitted through the voting channels corresponding to the group, the method further comprises the following steps:
when the thread pairs in the high-level group need to be mutually transmitted and no thread pair in the adjacent low-level group needs to be mutually transmitted, selecting one pair of threads from the high-level group to be mutually transmitted through the voting channels corresponding to the low-level group until all the thread pairs which need to be subjected to two-out-of-thread data voting are mutually transmitted.
6. A method for voting on a plurality of pairs of thread data in a secure computer board card according to any one of claims 1 to 5,
n is equal to 3;
the number of thread pairs which run on the first CPU and the second CPU and need to vote for two-out-of-threads data is more than or equal to 3.
7. A computer readable and writable storage medium storing computer executable instructions which, when executed by a processor, implement the steps of a method of voting on a plurality of pairs of thread data in a secure computer board according to any one of claims 1 to 6.
8. A control device is characterized by comprising
A memory for storing computer executable instructions;
a processor for executing the computer-executable instructions to perform the steps of the method of voting on a plurality of pairs of thread data in a secure computer board according to any one of claims 1 to 6.
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