CN111446229A - Double-coil eddy current sensor - Google Patents
Double-coil eddy current sensor Download PDFInfo
- Publication number
- CN111446229A CN111446229A CN202010303120.4A CN202010303120A CN111446229A CN 111446229 A CN111446229 A CN 111446229A CN 202010303120 A CN202010303120 A CN 202010303120A CN 111446229 A CN111446229 A CN 111446229A
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- Prior art keywords
- eddy current
- electrode
- coil
- hole
- chip
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/645—Inductive arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The invention provides a double-coil eddy current sensor, which realizes double collection of small signals by using double eddy current coils, and prevents crosstalk of chips by using a shielding layer to integrate chips; in the second embodiment, the upper and lower through holes of the double coils are interconnected, so that the eddy current signal is directly transmitted, the loss of the eddy current signal is reduced, the coils are gradually thinned from inside to outside, and the loss is reduced to the greatest extent under the condition that the coverage area of the coils is larger.
Description
Technical Field
The invention relates to the field of semiconductor packaging, belongs to the classification number H01L 23/00 and particularly relates to a double-coil eddy current sensor.
Background
For the existing eddy current type sensor, the eddy current loss of the spiral coil is large, and for smaller signals, accurate signals are difficult to detect. And the extra amplifier can increase crosstalk signals in the integrated circuit, and further influence the normal operation of the sensor.
Disclosure of Invention
In order to solve the above problems, the present invention provides a double-coil eddy current sensor, including:
the shielding base layer is provided with a first surface and a second surface, and a first through hole and a second through hole which penetrate in the vertical direction and a shielding metal layer which extends in the horizontal direction are formed in the shielding base layer;
the first chip is arranged on the first surface and at least provided with a first electrode and a second electrode;
a first eddy current coil disposed on the first surface and surrounding the first chip, the first eddy current coil having a third electrode and a fourth electrode;
the first medium layer covers the first chip and the first eddy current coil, and a third through hole and a fourth through hole are formed in the first medium layer;
the second eddy current coil is arranged on the first medium layer and is provided with a fifth electrode and a sixth electrode;
the second medium layer covers the first medium layer and the second eddy current coil;
the second eddy current coil comprises a central part and an edge part, the edge part and the first eddy current coil are aligned in the vertical direction and are consistent in graph, the central part and the first chip are overlapped in the vertical direction, the third electrode and the fifth electrode are electrically connected through a third through hole, and the fourth electrode and the sixth electrode are electrically connected through a fourth through hole.
According to an embodiment of the invention, the second electrode is welded to the third electrode.
According to the embodiment of the present invention, a rewiring layer is further included on the second surface, the first electrode is electrically connected to the rewiring layer through a first via, and the fourth electrode is electrically connected to the rewiring layer through the second via.
According to the embodiment of the invention, a second chip is welded on the lower surface of the rewiring layer, and a plastic packaging layer covers the second chip.
The present invention also provides another dual coil eddy current sensor, comprising:
a circuit board having a first surface and a second surface;
the first chip is arranged on the first surface and at least provided with a first electrode and a second electrode;
the first medium layer covers the first chip, and a first through hole and a second through hole are formed in the first medium layer;
a first eddy current spiral coil disposed on the first dielectric layer, the first eddy current spiral coil having a third electrode and a fourth electrode;
the second medium layer covers the first eddy current spiral coil, and is internally provided with a third through hole, a fourth through hole and a plurality of fifth through holes;
the second eddy current spiral coil is arranged on the second medium layer and is provided with a fifth electrode and a sixth electrode;
the third medium layer covers the second medium layer and the second eddy current spiral coil;
the third electrode is electrically connected with the fifth electrode through a third through hole, the fourth electrode is electrically connected with the sixth electrode through a fourth through hole, and the fifth through holes are uniformly distributed and interconnect the spiral lines of the first eddy current spiral coil and the second eddy current spiral coil up and down; and the first eddy current spiral coil and the second eddy current spiral coil are aligned in the vertical direction and have consistent patterns, and the coil density of the first eddy current spiral coil and the second eddy current spiral coil is gradually thinned from inside to outside.
According to an embodiment of the invention, the second electrode is electrically connected to the third electrode.
According to an embodiment of the present invention, the first electrode is soldered on the circuit board.
According to the embodiment of the invention, a second chip is welded on the second surface, and a plastic package layer covers the second chip.
According to an embodiment of the present invention, an aperture of the fifth through hole is smaller than apertures of the third and fourth through holes.
According to the embodiment of the invention, a shielding pattern is arranged in the first dielectric layer, and the shielding pattern is positioned above the first chip.
The invention has the following advantages: (1) double collection of small signals is achieved by using the double eddy current coils, and chips are integrated by using the shielding layer, so that crosstalk of the chips is prevented; (2) in the second embodiment, the upper and lower through holes of the double coils are interconnected, so that the eddy current signal is directly transmitted, the loss of the eddy current signal is reduced, the coils are gradually thinned from inside to outside, and the loss is reduced to the greatest extent under the condition that the coverage area of the coils is larger.
Drawings
FIG. 1 is a cross-sectional view of a first embodiment of a dual coil eddy current sensor;
FIG. 2 is a top view of the first coil of the first embodiment;
FIG. 3 is a top view of the second coil of the first embodiment;
FIG. 4 is a cross-sectional view of a second embodiment dual coil eddy current sensor;
figure 5 is a top view of the eddy current spiral coil of the second embodiment.
Detailed Description
The invention relates to a double-coil eddy current sensor which is simple in manufacturing method and good in effect.
First embodiment
Referring to fig. 1, the present invention provides a dual coil eddy current sensor, in which two coils are connected in parallel and are integrated together in a package, including:
the shield base layer 1 has a first surface and a second surface, the shield base layer 1 has a first through hole 19 and a second through hole 18 penetrating in a vertical direction and a shield metal layer 1 extending in a horizontal direction, and the shield base layer 1 may be a laminate of a ceramic substrate, an L TCC substrate and a multilayer dielectric layer.
A first chip 5 disposed on the first surface and having at least a first electrode and a second electrode (not shown); the first chip 5 is a passive device, a switching element, or the like.
A first eddy current coil 3 disposed on the first surface and surrounding the first chip 5 (see fig. 2), the first eddy current coil 3 having a third electrode 2 and a fourth electrode 4.
A first medium layer 7 covering the first chip 5 and the first eddy current coil 3, wherein a third through hole 16 and a fourth through hole 17 are arranged in the first medium layer 7;
a second eddy current coil 10 disposed on the first dielectric layer 7 and having a fifth electrode 8 and a sixth electrode 9; the first and second eddy current coils are both helical coils having a metal wire structure of the same thickness.
And a second dielectric layer 11 covering the first dielectric layer 7 and the second eddy current coil 10.
Referring to fig. 2 and 3, the second eddy current coil 10 includes a center portion aligned in a vertical direction and in a pattern corresponding to the first eddy current line 3, and an edge portion overlapping the first chip in the vertical direction, and the third electrode 2 and the fifth electrode 8 are electrically connected through a third via hole 16, and the fourth electrode 4 and the sixth electrode 9 are electrically connected through a fourth via hole 17.
The second electrode is welded to the third electrode 2. Of course, the third electrode 2 has an area such that a plurality of welding points can be arranged side by side.
According to the embodiment of the present invention, the rewiring layer 12 is further included on the second surface, the first electrode is electrically connected to the rewiring layer 12 through the first via hole 19 via the solder 6, and the fourth electrode 4 is electrically connected to the rewiring layer 12 through the second via hole 18. A second chip 15 is further soldered to the lower surface of the redistribution layer 12, and the second chip 15 is covered with a plastic package layer 14. The second chip 15 may be a data processor, a rectifier, an amplifier, etc.
Second embodiment
Referring to fig. 4, the present invention also provides another dual coil eddy current sensor, comprising:
a circuit board 20 having a first surface and a second surface;
a first chip 21 disposed on the first surface and having at least a first electrode and a second electrode (not shown);
a first dielectric layer 23 covering the first chip 21, and a first through hole 28 and a second through hole (not shown) are provided in the first dielectric layer 21;
a first eddy current spiral coil 25 disposed on the first medium layer 21, the first eddy current spiral coil 25 having a third electrode 26 and a fourth electrode 27;
a second medium layer 34 covering the first eddy current spiral coil 25, wherein a third through hole 32, a fourth through hole 29 and a plurality of fifth through holes 33 are arranged in the second medium layer 34;
a second eddy current spiral coil 30 disposed on the second dielectric layer 34 and having a fifth electrode 21 and a sixth electrode 36;
a third dielectric layer 35 covering the second dielectric layer 34 and the second eddy current spiral coil 30;
wherein the third electrode 26 is electrically connected to the fifth electrode 21 through a third via 32, the fourth electrode 29 is electrically connected to the sixth electrode 36 through a fourth via 29, and the fifth vias 33 are uniformly distributed and interconnect the spiral lines of the first and second eddy current spiral coils up and down (see fig. 5); and the first eddy current spiral coil 25 and the second eddy current spiral coil 30 are aligned in the vertical direction and have the same pattern, and the coil density of the first eddy current spiral coil 25 and the second eddy current spiral coil 30 is gradually thinned from the inside to the outside. And the second electrode is electrically connected to the third electrode 26.
According to an embodiment of the present invention, the first electrode is soldered on the circuit board 20. A second chip 22 is further welded on the second surface, and a plastic package layer 24 covers the second chip 22. The aperture of the fifth through hole 33 is smaller than the apertures of the third and fourth through holes 32/36. A shielding pattern (not shown) is disposed in the first dielectric layer 21, and the shielding pattern is located above the first chip 21.
The first chip 21 is a passive device, a switching element, or the like, and the second chip 22 may be a data processor, a rectifier, an amplifier, or the like.
Finally, it should be noted that: it should be understood that the above examples are only for clearly illustrating the present invention and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of the invention may be made without departing from the scope of the invention.
Claims (10)
1. A dual coil eddy current sensor, comprising:
the shielding base layer is provided with a first surface and a second surface, and a first through hole and a second through hole which penetrate in the vertical direction and a shielding metal layer which extends in the horizontal direction are formed in the shielding base layer;
the first chip is arranged on the first surface and at least provided with a first electrode and a second electrode;
a first eddy current coil disposed on the first surface and surrounding the first chip, the first eddy current coil having a third electrode and a fourth electrode;
the first medium layer covers the first chip and the first eddy current coil, and a third through hole and a fourth through hole are formed in the first medium layer;
the second eddy current coil is arranged on the first medium layer and is provided with a fifth electrode and a sixth electrode;
the second medium layer covers the first medium layer and the second eddy current coil;
the second eddy current coil comprises a central part and an edge part, the edge part and the first eddy current coil are aligned in the vertical direction and are consistent in graph, the central part and the first chip are overlapped in the vertical direction, the third electrode and the fifth electrode are electrically connected through a third through hole, and the fourth electrode and the sixth electrode are electrically connected through a fourth through hole.
2. The dual coil eddy current sensor as set forth in claim 1, wherein: the second electrode is welded on the third electrode.
3. The dual coil eddy current sensor as set forth in claim 2, wherein: the first electrode is electrically connected with the rewiring layer through a first through hole, and the fourth electrode is electrically connected with the rewiring layer through a second through hole.
4. The dual coil eddy current sensor as set forth in claim 2, wherein: and a second chip is welded on the lower surface of the rewiring layer, and a plastic packaging layer covers the second chip.
5. A dual coil eddy current sensor, comprising:
a circuit board having a first surface and a second surface;
the first chip is arranged on the first surface and at least provided with a first electrode and a second electrode;
the first medium layer covers the first chip, and a first through hole and a second through hole are formed in the first medium layer;
a first eddy current spiral coil disposed on the first dielectric layer, the first eddy current spiral coil having a third electrode and a fourth electrode;
the second medium layer covers the first eddy current spiral coil, and is internally provided with a third through hole, a fourth through hole and a plurality of fifth through holes;
the second eddy current spiral coil is arranged on the second medium layer and is provided with a fifth electrode and a sixth electrode;
the third medium layer covers the second medium layer and the second eddy current spiral coil;
the third electrode is electrically connected with the fifth electrode through a third through hole, the fourth electrode is electrically connected with the sixth electrode through a fourth through hole, and the fifth through holes are uniformly distributed and interconnect the spiral lines of the first eddy current spiral coil and the second eddy current spiral coil up and down; and the first eddy current spiral coil and the second eddy current spiral coil are aligned in the vertical direction and have consistent patterns, and the coil density of the first eddy current spiral coil and the second eddy current spiral coil is gradually thinned from inside to outside.
6. The dual coil eddy current sensor as set forth in claim 5, wherein: the second electrode is electrically connected to the third electrode.
7. A dual coil eddy current sensor according to claims 5-6, wherein: the first electrode is welded on the circuit board.
8. A dual coil eddy current sensor according to claims 5-7, wherein: and a second chip is welded on the second surface, and a plastic packaging layer covers the second chip.
9. A dual coil eddy current sensor according to claims 5-8, wherein: the aperture of the fifth through hole is smaller than the apertures of the third and fourth through holes.
10. A dual coil eddy current sensor according to claims 5-9, wherein: and a shielding pattern is arranged in the first medium layer and is positioned above the first chip.
Priority Applications (1)
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CN202010303120.4A CN111446229A (en) | 2020-04-17 | 2020-04-17 | Double-coil eddy current sensor |
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CN202010303120.4A CN111446229A (en) | 2020-04-17 | 2020-04-17 | Double-coil eddy current sensor |
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CN202010303120.4A Withdrawn CN111446229A (en) | 2020-04-17 | 2020-04-17 | Double-coil eddy current sensor |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112914772A (en) * | 2020-12-04 | 2021-06-08 | 长沙微笑美齿智能科技有限公司 | Anti-interference tooth implant detection method and detection device thereof |
CN113702488A (en) * | 2021-09-09 | 2021-11-26 | 国家石油天然气管网集团有限公司华南分公司 | Coaxial circular rectangular double-coil eddy current probe |
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CN1988069A (en) * | 2006-11-24 | 2007-06-27 | 南京航空航天大学 | Process for producing inductive coil by printed circuit board |
CN101408404A (en) * | 2008-11-28 | 2009-04-15 | 清华大学 | Method for preparing complaisance type double-layer electric vortex flow sensor for testing curved surface clearance |
CN101975591A (en) * | 2010-09-27 | 2011-02-16 | 上海交通大学 | Integrated magnetic elasticity sensor |
CN102721738A (en) * | 2012-06-12 | 2012-10-10 | 大连理工大学 | Miniature eddy current sensor with structure consisting of silicon substrate and multilayer coils |
CN105526854A (en) * | 2016-01-19 | 2016-04-27 | 上海交通大学 | A miniature eddy current sensor based on double coils |
CN106949920A (en) * | 2017-03-15 | 2017-07-14 | 重庆大学 | A kind of magnetoelastic sensor detection means |
CN109270162A (en) * | 2018-11-28 | 2019-01-25 | 四川沐迪圣科技有限公司 | Multilayer is electromagnetically shielded pulse precursor in far field sensor |
-
2020
- 2020-04-17 CN CN202010303120.4A patent/CN111446229A/en not_active Withdrawn
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1988069A (en) * | 2006-11-24 | 2007-06-27 | 南京航空航天大学 | Process for producing inductive coil by printed circuit board |
CN101408404A (en) * | 2008-11-28 | 2009-04-15 | 清华大学 | Method for preparing complaisance type double-layer electric vortex flow sensor for testing curved surface clearance |
CN101975591A (en) * | 2010-09-27 | 2011-02-16 | 上海交通大学 | Integrated magnetic elasticity sensor |
CN102721738A (en) * | 2012-06-12 | 2012-10-10 | 大连理工大学 | Miniature eddy current sensor with structure consisting of silicon substrate and multilayer coils |
CN105526854A (en) * | 2016-01-19 | 2016-04-27 | 上海交通大学 | A miniature eddy current sensor based on double coils |
CN106949920A (en) * | 2017-03-15 | 2017-07-14 | 重庆大学 | A kind of magnetoelastic sensor detection means |
CN109270162A (en) * | 2018-11-28 | 2019-01-25 | 四川沐迪圣科技有限公司 | Multilayer is electromagnetically shielded pulse precursor in far field sensor |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112914772A (en) * | 2020-12-04 | 2021-06-08 | 长沙微笑美齿智能科技有限公司 | Anti-interference tooth implant detection method and detection device thereof |
CN113702488A (en) * | 2021-09-09 | 2021-11-26 | 国家石油天然气管网集团有限公司华南分公司 | Coaxial circular rectangular double-coil eddy current probe |
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Application publication date: 20200724 |