CN111445381A - RGA (graphics processing architecture) graphics acceleration method based on EXA (extensible markup language) and storage device - Google Patents
RGA (graphics processing architecture) graphics acceleration method based on EXA (extensible markup language) and storage device Download PDFInfo
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- CN111445381A CN111445381A CN202010201816.6A CN202010201816A CN111445381A CN 111445381 A CN111445381 A CN 111445381A CN 202010201816 A CN202010201816 A CN 202010201816A CN 111445381 A CN111445381 A CN 111445381A
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T11/00—2D [Two Dimensional] image generation
- G06T11/40—Filling a planar surface by adding surface attributes, e.g. colour or texture
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T3/00—Geometric image transformations in the plane of the image
- G06T3/60—Rotation of whole images or parts thereof
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Abstract
The invention relates to the technical field of image processing, in particular to an RGA (graphics processing architecture) image acceleration method and storage equipment based on an EXA (extensible markup language). The RGA image acceleration method based on the EXA comprises the following steps: modifying an EXA part interface function; when the graphics are accelerated, the two-dimensional graphics acceleration function of the chip is directly called to accelerate through the modified interface function. By the method, the hardware of the chip is directly called for acceleration, so that zero overhead of the GPU is realized, the utilization rate of the GPU of the system is reduced, and the effect of reducing the cost of the system is achieved.
Description
Technical Field
The invention relates to the technical field of image processing, in particular to an RGA (graphics processing architecture) image acceleration method and storage equipment based on an EXA (extensible markup language).
Background
In the existing scheme for accelerating the Xserver graph, the conventional method is as follows: the Xserver calls the GPU for acceleration through Glamro drive, buffer area allocation operation and memory copy operation can be carried out when the GPU is called for acceleration every time, the whole acceleration process not only occupies the GPU but also consumes the use of the CPU, so that the occupancy rates of the GPU and the CPU are increased, extra overhead is added for the GPU and the CPU, and the utilization rates of the GPU and the CPU are reduced.
In the prior art, the utilization rate of the GPU is reduced by some technical means, but none of the technical means can achieve zero overhead of the GPU in the process of graphics acceleration.
Disclosure of Invention
Therefore, an RGA graphics acceleration method based on EXA is needed to be provided to solve the problems that the existing graphics acceleration calls a GPU for acceleration, the GPU occupancy rate is high, and a CPU is consumed due to the need of performing buffer allocation operation and memory copy operation. The specific technical scheme is as follows:
an RGA image acceleration method based on EXA comprises the following steps:
modifying an EXA part interface function;
when the graphics are accelerated, the two-dimensional graphics acceleration function of the chip is directly called to accelerate through the modified interface function.
Further, the step of directly calling the two-dimensional graph acceleration function of the chip for acceleration through the modified interface function further includes the steps of:
calling an ExaDriverInit interface function of the chip through an ExaDriverAlloc interface function of the EXA;
and accelerating the graph through an ExaDriverInit interface function.
Further, the "accelerating operation" includes: region filling operation, region copying operation and figure rotating synthesis operation.
Further, the step of performing an acceleration operation on the graph through an ExaDriverInit interface function further includes the steps of:
performing a region filling operation through a c _ RkRgaColorFill interface function;
performing a region copy operation through a c _ rkrgacocopy interface function;
the graph rotation synthesis operation is performed by the c _ RkRgaBlit interface function.
In order to solve the technical problem, the storage device is further provided, and the specific technical scheme is as follows:
a storage device having stored therein a set of instructions for performing:
modifying an EXA part interface function;
when the graphics are accelerated, the two-dimensional graphics acceleration function of the chip is directly called to accelerate through the modified interface function.
Further, the set of instructions is further for performing:
the step of directly calling the two-dimensional graph acceleration function of the chip for acceleration through the modified interface function further comprises the following steps:
calling an ExaDriverInit interface function of the chip through an ExaDriverAlloc interface function of the EXA;
and accelerating the graph through an ExaDriverInit interface function.
Further, the set of instructions is further for performing:
the "acceleration operation" includes: region filling operation, region copying operation and figure rotating synthesis operation.
Further, the set of instructions is further for performing: the method for accelerating the graph through the ExaDriverInit interface function further comprises the following steps:
performing a region filling operation through a c _ RkRgaColorFill interface function;
performing a region copy operation through a c _ rkrgacocopy interface function;
the graph rotation synthesis operation is performed by the c _ RkRgaBlit interface function.
The invention has the beneficial effects that: by modifying the EXA partial interface function; when the graphics are accelerated, the two-dimensional graphics acceleration function of the chip is directly called to accelerate through the modified interface function. The hardware of the chip is directly called for acceleration, so that zero overhead of the GPU is realized, the utilization rate of the GPU of the system is reduced, and the effect of reducing the cost of the system is achieved. In an actual use scene, the dragging window and the rotation of the graph realize the acceleration of a hardware unit of a chip, the problem that the residual shadow or the rotating graph is torn due to low efficiency of the dragging window is solved, and meanwhile, the two-dimensional graph acceleration unit is used for replacing the hardware acceleration of the GPU in the Xserver, so that the effect of zero overhead of the GPU in the scene is achieved, the utilization rate of the GPU of the system is reduced, and the effect of reducing the system cost is achieved.
Drawings
FIG. 1 is a flow chart of an EXA-based RGA graphics acceleration method according to an embodiment;
FIG. 2 is a schematic diagram of an implementation of RGA in the EXA in accordance with an embodiment;
fig. 3 is a schematic block diagram of a storage device according to an embodiment.
Description of reference numerals:
300. a storage device.
Detailed Description
To explain technical contents, structural features, and objects and effects of the technical solutions in detail, the following detailed description is given with reference to the accompanying drawings in conjunction with the embodiments.
Referring to fig. 1 to 2, in this embodiment, an EXA-based rga (kernel graphic acceleration) graphics acceleration method may be applied to a storage device, including but not limited to a personal computer, a server, a general-purpose computer, a special-purpose computer, a network device, an embedded device, a programmable device, an intelligent mobile terminal, etc., which is provided with an L inux graphics system, and a chip which is provided with a hardware unit with a two-dimensional graphics acceleration function, and the specific technical solution is as follows:
step S101: the EXA part interface function is modified.
Step S102: when the graphics are accelerated, the two-dimensional graphics acceleration function of the chip is directly called to accelerate through the modified interface function.
When the graphics are accelerated, the two-dimensional graphics acceleration function of the chip is directly called to accelerate through the modified interface function. The hardware of the chip is directly called for acceleration, so that zero overhead of the GPU is realized, the utilization rate of the GPU of the system is reduced, and the effect of reducing the cost of the system is achieved.
In this embodiment, the step of "directly calling the two-dimensional graphics acceleration function of the chip for acceleration through the modified interface function" further includes the steps of:
calling an ExaDriverInit interface function of the chip through an ExaDriverAlloc interface function of the EXA;
and accelerating the graph through an ExaDriverInit interface function.
In other embodiments, other idle interface functions may be used to rewrite and invoke the two-dimensional graphics acceleration function of the chip itself to accelerate the graphics, without limitation.
Further, the "accelerating operation" includes: region filling operation, region copying operation and figure rotating synthesis operation.
As shown in fig. 2, further, the "accelerating the graph through the ExaDriverInit interface function" further includes the steps of:
the region fill operation is performed through the c _ rkrgacocollall interface function. The method specifically comprises the following steps: there is prepareSolid- > DoneSolid.
The region copy operation is performed through the c _ rkrgacocopy interface function. The method specifically comprises the following steps: PrepareCopy- > Copy- > DoneCopy.
The graph rotation synthesis operation is performed by the c _ RkRgaBlit interface function. The method specifically comprises the following steps: PrepareComposite- > Composite- > DoneComosite.
In an actual use scene, the dragging window and the rotation of the graph realize the acceleration of a hardware unit of a chip by the method, the problem that the ghost is broken or the graph is torn when the graph is rotated due to low efficiency of the dragging window is solved, and meanwhile, the two-dimensional graph acceleration unit is used for replacing the hardware acceleration of the GPU in the Xserver, so that the effect of zero overhead of the GPU in the scene is achieved, the utilization rate of the GPU of the system is reduced, and the effect of reducing the cost of the system is achieved.
Referring to fig. 3, a memory device 300 according to the present embodiment is implemented as follows:
the storage device 300 includes but is not limited to a personal computer, a server, a general-purpose computer, a special-purpose computer, a network device, an embedded device, a programmable device, an intelligent mobile terminal, etc., which is provided with an L inux graphic system and a two-dimensional graphic acceleration function hardware unit on a chip.
A storage device 300 having stored therein a set of instructions for performing:
modifying an EXA part interface function;
when the graphics are accelerated, the two-dimensional graphics acceleration function of the chip is directly called to accelerate through the modified interface function.
When the graphics are accelerated, the two-dimensional graphics acceleration function of the chip is directly called to accelerate through the modified interface function. The hardware of the chip is directly called for acceleration, so that zero overhead of the GPU is realized, the utilization rate of the GPU of the system is reduced, and the effect of reducing the cost of the system is achieved.
Further, the set of instructions is further for performing:
the step of directly calling the two-dimensional graph acceleration function of the chip for acceleration through the modified interface function further comprises the following steps:
calling an ExaDriverInit interface function of the chip through an ExaDriverAlloc interface function of the EXA;
and accelerating the graph through an ExaDriverInit interface function.
In other embodiments, other idle interface functions may be used to rewrite and invoke the two-dimensional graphics acceleration function of the chip itself to accelerate the graphics, without limitation.
Further, the set of instructions is further for performing:
the "acceleration operation" includes: region filling operation, region copying operation and figure rotating synthesis operation.
Further, as shown in FIG. 2, the set of instructions is also for performing: the method for accelerating the graph through the ExaDriverInit interface function further comprises the following steps:
the region fill operation is performed through the c _ rkrgacocollall interface function. The method specifically comprises the following steps: there is prepareSolid- > DoneSolid.
The region copy operation is performed through the c _ rkrgacocopy interface function. The method specifically comprises the following steps: PrepareCopy- > Copy- > DoneCopy.
The graph rotation synthesis operation is performed by the c _ RkRgaBlit interface function. The method specifically comprises the following steps: PrepareComposite- > Composite- > DoneComosite.
In an actual use scene, the dragging window and the rotation of the graph realize the acceleration of a hardware unit of a chip by the method, the problem that the ghost is broken or the graph is torn when the graph is rotated due to low efficiency of the dragging window is solved, and meanwhile, the two-dimensional graph acceleration unit is used for replacing the hardware acceleration of the GPU in the Xserver, so that the effect of zero overhead of the GPU in the scene is achieved, the utilization rate of the GPU of the system is reduced, and the effect of reducing the cost of the system is achieved.
It should be noted that, although the above embodiments have been described herein, the invention is not limited thereto. Therefore, based on the innovative concepts of the present invention, the technical solutions of the present invention can be directly or indirectly applied to other related technical fields by making changes and modifications to the embodiments described herein, or by using equivalent structures or equivalent processes performed in the content of the present specification and the attached drawings, which are included in the scope of the present invention.
Claims (8)
1. An RGA image acceleration method based on EXA is characterized by comprising the following steps:
modifying an EXA part interface function;
when the graphics are accelerated, the two-dimensional graphics acceleration function of the chip is directly called to accelerate through the modified interface function.
2. The method of claim 1, wherein the step of directly invoking the two-dimensional graphics acceleration function of the chip for acceleration by the modified interface function further comprises the steps of:
calling an ExaDriverInit interface function of the chip through an ExaDriverAlloc interface function of the EXA;
and accelerating the graph through an ExaDriverInit interface function.
3. The method of claim 2, wherein the RGA graphics acceleration method based on EXA is performed,
the "acceleration operation" includes: region filling operation, region copying operation and figure rotating synthesis operation.
4. An EXA-based RGA graphics acceleration method according to claim 2, wherein said "accelerating graphics through ExaDriverInit interface function" further comprises the steps of:
performing a region filling operation through a c _ RkRgaColorFill interface function;
performing a region copy operation through a c _ rkrgacocopy interface function;
the graph rotation synthesis operation is performed by the c _ RkRgaBlit interface function.
5. A storage device having a set of instructions stored therein, the set of instructions being operable to perform:
modifying an EXA part interface function;
when the graphics are accelerated, the two-dimensional graphics acceleration function of the chip is directly called to accelerate through the modified interface function.
6. The storage device of claim 5, wherein the set of instructions is further configured to perform:
the step of directly calling the two-dimensional graph acceleration function of the chip for acceleration through the modified interface function further comprises the following steps:
calling an ExaDriverInit interface function of the chip through an ExaDriverAlloc interface function of the EXA;
and accelerating the graph through an ExaDriverInit interface function.
7. The storage device of claim 6, wherein the set of instructions is further configured to perform:
the "acceleration operation" includes: region filling operation, region copying operation and figure rotating synthesis operation.
8. The storage device of claim 6, wherein the set of instructions is further configured to perform: the method for accelerating the graph through the ExaDriverInit interface function further comprises the following steps:
performing a region filling operation through a c _ RkRgaColorFill interface function;
performing a region copy operation through a c _ rkrgacocopy interface function;
the graph rotation synthesis operation is performed by the c _ RkRgaBlit interface function.
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Address after: 350003 building 18, No.89, software Avenue, Gulou District, Fuzhou City, Fujian Province Applicant after: Ruixin Microelectronics Co.,Ltd. Address before: 350003 building 18, No.89, software Avenue, Gulou District, Fuzhou City, Fujian Province Applicant before: FUZHOU ROCKCHIP ELECTRONICS Co.,Ltd. |
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Application publication date: 20200724 |