CN111431606A - Bus type networking system for bidirectional optical fiber communication - Google Patents

Bus type networking system for bidirectional optical fiber communication Download PDF

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Publication number
CN111431606A
CN111431606A CN202010294308.7A CN202010294308A CN111431606A CN 111431606 A CN111431606 A CN 111431606A CN 202010294308 A CN202010294308 A CN 202010294308A CN 111431606 A CN111431606 A CN 111431606A
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arbitration
data
bus
optical fiber
circuit
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不公告发明人
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United Huaxin Electronics Co Ltd
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United Huaxin Electronics Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40006Architecture of a communication node
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/4013Management of data rate on the bus
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40169Flexible bus arrangements
    • H04L12/40176Flexible bus arrangements involving redundancy
    • H04L12/40182Flexible bus arrangements involving redundancy by using a plurality of communication lines

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Quality & Reliability (AREA)
  • Small-Scale Networks (AREA)
  • Optical Communication System (AREA)

Abstract

The invention discloses a bus type networking system for bidirectional optical fiber communication, which comprises an electricity-based arbitration system and an optical fiber-based data transmission system; the electricity-based arbitration system arbitrates the sequence of data transmission of each node device of the next time slice in the optical fiber data bus through the arbitration control module on the arbitration bus, and the optical fiber-based transmission system converts data to be transmitted in the cache of the node device and the control module into optical signals in sequence according to the arbitration result through the data transmission module and transmits the optical signals on the optical fiber data bus. The invention solves the problem of multi-point communication shared medium conflict in the optical fiber bus on the premise of not reducing the efficiency of data transmission by separating the electricity-based arbitration bus from the optical fiber data transmission bus and using the electricity-based arbitration system to stipulate the sequence of sending data on the optical fiber data bus by the next time slice of each node device; and meanwhile, time slots are further divided for the time slices, and the arbitration efficiency of the bus can be improved by distinguishing the fast arbitration bus from the slow arbitration bus, so that the data transmission rate of the bus is improved.

Description

Bus type networking system for bidirectional optical fiber communication
Technical Field
The invention relates to the field of optical fiber network communication, in particular to a bus type networking system for bidirectional optical fiber communication.
Background
Fiber optic communication is the primary means of transmission in modern communication networks and plays a very important role in modern communications. The most common communication method in fiber optic communication networks is currently point-to-point communication. The networking mode is simple and the problems of access medium sharing and conflict do not exist between communication endpoints.
As is known, the basic topology of network communication, in addition to the most basic point-to-point direct connection, includes: the three types of the star shape, the ring shape and the bus shape can be further combined to form a tree shape, a double ring shape, a grid shape and other composite topological structures. In different application occasions, different networking topologies need to be selected.
At present, in an optical fiber networking topology structure, a plurality of optical fiber transmission media can be connected together by adopting a coupling device, optical signals in the optical fiber transmission media can be communicated to form a bus structure, and an optical splitter can collect the optical signals in the plurality of optical fiber transmission media at an optical port for data communication to form a star structure. The bus formed by the coupling device comprises a U-shaped bus and an S-shaped bus, but the buses of the two structures need to be additionally processed at two ends of the bus, or optical paths are looped back or optical power is completely absorbed, if the bus is long, fault detection is difficult to perform, and bus expansion is also difficult. The bidirectional T-shaped optical coupler solves the problem that optical power can be transmitted in an optical cable medium, so that an optical fiber bus structure formed by connecting a plurality of bidirectional T-shaped optical couplers in series can be used, and each node hung on a passive optical fiber transmission bus can send optical signals at any time, so that the problem that a plurality of communication nodes share medium conflict exists.
Currently, the mainstream methods for avoiding collision include: the carrier sense multiplexing/collision detection protocol of ethernet, and various multiplexing techniques. When the length of the bus is long and the data to be transmitted is short, the utilization rate of the bus is very low due to time delay, and the carrier sense multiplexing/collision detection protocol of the ethernet is performing collision detection or waiting for response in most of the time.
The multiplexing technique comprises: a time division multiplexing passive optical network and a frequency division multiplexing network. In order to prevent the collision of the uplink user optical network terminal, the time division multiplexing optical network needs to allocate different time slots to different user network terminal devices, for example, as disclosed in the chinese patent publication with an authorization publication number of CN 103563303B, an authorization publication date of 2017, 26/04/2017, and a patent name of "a silencing method and apparatus for an optical network unit", first, a silencing identifier is implanted in maintenance management information and sent to the optical network unit; secondly, the optical network unit executes corresponding silent action according to the silent identification. The process effectively avoids the problem that a plurality of network terminal devices are on-line simultaneously to generate conflict, and simultaneously allocates different time slots to different user network terminal devices; the above process performs time slot allocation through the network management unit, but has a problem of low real-time performance.
Frequency division multiplexing technology: the total bandwidth of the transmission channel is divided into a plurality of sub-frequency bands (or called sub-channels), each sub-channel transmits 1 path of signals, the frequency division multiplexing requires that the total frequency width is larger than the sum of the frequencies of the sub-channels, and meanwhile, in order to ensure that the signals transmitted in the sub-channels do not interfere with each other, an isolation band is arranged between the sub-channels, so that the signals of each path do not interfere with each other (one of conditions); wavelength division multiplexing technology: essentially a frequency division multiplexing, FDM, technique on optical frequencies, with each wavelength path being achieved by division in the frequency domain.
The frequency division multiplexing technology and the wavelength division multiplexing technology are essentially to collect and transmit data to be transmitted, and are also essentially to ensure point-to-point communication in optical fiber communication, which is not suitable for multipoint communication in optical fiber bus communication.
Disclosure of Invention
The invention aims to solve the problems of optical funnel effect and shared medium access conflict of multi-point communication in optical fiber transmission and realize high-reliability optical passive direct connection transmission of an optical fiber data bus by using a simple and low-cost method.
The invention discloses a bus type networking system for bidirectional optical fiber communication, which adopts the technical scheme that:
the conflict problem of the shared optical transmission medium is separated from the optical fiber data transmission, and a special electricity-based arbitration bus is additionally arranged to solve the conflict problem of the shared medium of multi-point communication in the optical fiber transmission.
A bus type networking system for bidirectional optical fiber communication comprises an electricity-based arbitration system and an optical fiber-based transmission system, wherein the electricity-based arbitration system comprises an electricity-based arbitration bus, a trunk interface and an arbitration control module of node equipment, the optical fiber-based transmission system comprises a plurality of groups of optical fiber-based data buses, the trunk interface, a T-shaped optical coupler, a data transmission module of the node equipment and a cache and control module of the node equipment, the arbitration control module of the node equipment and the data transmission module of the node equipment are simultaneously connected with the cache and control module of the node equipment, the arbitration control module of the node equipment is connected with the arbitration bus through the trunk interface, and the data transmission module of the node equipment couples the node equipment to the optical fiber data bus through the trunk interface and the T-shaped optical coupler;
the electricity-based arbitration system arbitrates the sequence of data transmission of each node device of the next time slice in the optical fiber data bus on the arbitration bus through the arbitration control module, wherein the time slice is the duration time required by the optical fiber data bus for transmitting a data frame;
the transmission system based on the optical fiber converts data to be sent in the cache and control of the node equipment into optical signals in sequence according to the arbitration result through the data transmission module for data transmission on the optical fiber data bus.
The data frame structure includes: a target device identifier for identifying a node device that is to receive data; a source device identifier for identifying a node device to which data is to be transmitted; a data length for specifying a length of valid data; data indicating contents to be transmitted by the valid data;
the arbitration bus comprises a pair of copper twisted pairs, and a multilevel symbol string is transmitted in an arbitration time slot of the time slice through an arbitration frame, the arbitration time slot is the duration required by the arbitration bus to transmit one arbitration frame, the multilevel symbol is represented by multilevel, the multilevel comprises different voltage amplitude states separated by a plurality of thresholds, and the higher the voltage amplitude is, the higher the priority is; the arbitration frame structure comprises: the priority code is used for representing the priority of the node equipment of the data to be sent; a source device identifier for identifying a node device to send data.
The electric-based arbitration system works as follows: the arbitration control module compares the multilevel symbol with the voltage on an arbitration bus, if the priority of the multilevel symbol is higher than the voltage priority on the arbitration bus, the multilevel symbol is successfully sent, the multilevel symbol is output to the arbitration bus, if the priority of the multilevel symbol is lower than the priority of the voltage on the arbitration bus, the sending is failed, the arbitration control module stops the competition of the rest multilevel symbols in the current time slot, and waits for the next time slot to carry out bus competition. And the node equipment which sends the complete arbitration frame in the arbitration time slot sends the data to be sent to the optical fiber data buses in the next time slice in sequence until all the optical fiber data buses are distributed.
The arbitration control module controls whether the multi-system symbols corresponding to the node equipment of the data to be transmitted can be transmitted to the arbitration bus, and meanwhile, the node equipment which successfully transmits the complete arbitration frame in the arbitration time slot in one time slice sequentially transmits data on the optical fiber according to the sequence, so that the problem of shared medium conflict on the optical fiber bus is solved.
Preferably, the multilevel symbol string of the arbitration frame includes a data quantity identifier, the data quantity identifier is used to indicate a data quantity of data to be transmitted, the voltage amplitude of the multilevel symbol with more data to be transmitted is higher than the voltage amplitude of the multilevel symbol with less data to be transmitted, when the node device does not successfully transmit the multilevel symbol string, the data to be transmitted is buffered, and the quantity identifier can prevent the risk of overflow of the data to be transmitted in the buffer and control module.
Preferably, the data transmission module includes an identity recognition module, and when the identity recognition module detects identity information matching with the node device, the identity recognition module stores the arriving data in the local cache and control module, and when the identity information matching with the node device is not detected, the data transmission module directly discards the data received from the optical fiber data bus.
Preferably, the arbitration buses comprise a group of fast arbitration buses and a group of slow arbitration buses, and the arbitration efficiency and the data transmission rate are dynamically adjusted according to the correctness of the transmission of the multilevel symbol strings which are finished by the two groups of arbitration buses in the first arbitration time slot in the time slice.
As a preferred scheme, the arbitration control module includes an arbitration circuit, the arbitration circuit includes a logic line or circuit, the logic line or circuit includes a field effect transistor and a first comparator, a drain of the field effect transistor serves as an input end of the logic line or circuit, a gate of the field effect transistor is connected to an output end of the first comparator, a source of the field effect transistor serves as an output end of the logic line or circuit, an inverting input end of the first comparator is connected to a source of the field effect transistor, a non-inverting input end of the first comparator is connected to a drain of the field effect transistor, if a drain voltage of the field effect transistor is higher than a source voltage of the field effect transistor, the first comparator outputs a high level to drive the field effect transistor to be turned on, the field effect transistor outputs an input multilevel symbol, otherwise, the first comparator outputs a low level, and the field effect transistor is turned off.
Preferably, the arbitration circuit further includes an error elimination circuit, an input terminal of the error elimination circuit is connected to the logical line or circuit output terminal, an output terminal of the error elimination circuit is connected to a device at the logical line or circuit input terminal, and the error elimination circuit includes:
a threshold circuit for providing a plurality of threshold voltages corresponding to the multilevel symbols, the threshold voltages being used to distinguish the different voltage amplitude states;
the regenerative circuit comprises a plurality of second comparators corresponding to the threshold voltage and a plurality of divider resistors, wherein the in-phase input end of each second comparator is connected with the logic line or the output end of the logic line, the reverse phase input end of each second comparator is used for inputting different threshold voltages, the output end of each second comparator is connected with one divider resistor in series, the divider resistors are connected in parallel, the second comparators compare the multilevel symbols with the threshold voltages to generate logic levels, and all the logic levels are divided by the divider resistors to generate standard voltages corresponding to the multilevel symbols;
the equipment compares the standard voltage output by the error elimination circuit with the multilevel symbol output by the error elimination circuit, and if the standard voltage and the multilevel symbol are consistent, the equipment successfully sends the multilevel symbol.
As a preferred scheme, the logic line or circuit further includes a clearing circuit, the clearing circuit includes a pull-down resistor and a switch tube, one end of the pull-down resistor is connected with the logic line or the output end, the other end of the pull-down resistor is connected with the input end of the switch tube, the output end of the switch tube is grounded, the control end of the switch tube is connected with the device of the logic line or the input end, and the device controls the switch tube to be turned on when the time slot is over.
The bus type networking system for bidirectional optical fiber communication strips the arbitration bus from the optical fiber transmission system, and utilizes the electricity-based arbitration system to arbitrate the sequence of data transmission on the optical fiber data bus by each node device in the next time slice, thereby solving the problem of data transmission conflict of the same optical fiber multi-point access. In order to further increase the speed of optical fiber communication, a plurality of pairs of optical fibers may be used for parallel data transmission, time slice division to form data time slots, or a plurality of groups of arbitration buses may be used for parallel arbitration, which is described below.
In a first mode, as shown in fig. 1, the optical fiber data bus at least includes 2 pairs of uplink and downlink optical fibers, and a group of arbitration buses, and the number of backbone interfaces connected to the data transmission module of the node device, the number of T-type optical couplers, and the number of optical fibers are the same. The number of time slots on the arbitration bus is not less than the number of optical fibers in a time slice.
When the node equipment has data to be sent, the interface control module repeatedly sends a multilevel symbol string to the arbitration bus at the beginning of an arbitration time slot, the arbitration control module compares the multilevel symbol string with the voltage on the arbitration bus bit by bit, if the priority of the multilevel symbol is higher than the voltage priority on the arbitration bus, the sending is successful, and the multilevel symbol is output to the arbitration bus; if the priority of the multilevel system symbol is lower than the voltage priority on the arbitration bus, stopping sending, stopping competition of the rest multilevel system symbols in the current time slot by the arbitration control module, and caching the data to be sent when the interface control module does not successfully send the multilevel system symbol string; the node equipment which successfully sends the complete arbitration frame in the first arbitration time slot becomes a winner, the data to be sent is sent to one pair of uplink and downlink optical fibers through the T-shaped optical coupler at the beginning of the next time slot, the subsequent multi-system symbol strings are stopped to be sent, the node equipment which successfully sends the complete arbitration frame in the second arbitration time slot is sent to the other group of uplink and downlink optical fibers through the T-shaped optical coupler at the beginning of the next time slot, and the like until all the optical fibers are distributed, the interface control module stops sending the subsequent multi-system symbol strings until the time slot is finished. And the data received by the node equipment from the bus is compared with the own equipment identifier according to the destination equipment identifier in the data frame, if the data is consistent with the destination equipment identifier in the data frame, the data is stored in the cache module, and if the data is inconsistent with the destination equipment identifier in the data frame, the data is directly discarded.
In a second mode, as shown in fig. 1, the optical fiber data bus at least includes 2 pairs of uplink and downlink optical fibers, and the number of trunk interfaces connected to the data transmission module of the node device, the number of T-type optical couplers, and the number of optical fibers are the same. As the length of the data to be sent of the node equipment is determined, the lengths of the time slices on the arbitration bus and the optical fiber data bus are specified to be consistent, one time slice of the arbitration bus is divided into at least three arbitration time slots, one time slice of the optical fiber data bus can be divided into at least two data time slots, and the number of the arbitration time slots is not less than the number of the data time slots of one optical fiber data bus and the number of the remaining optical fiber data buses.
When the node device has data to send, the interface control module repeatedly sends a multilevel symbol string for a contention data slot or a data slot to the arbitration bus at the beginning of each arbitration slot of a slot until the contention wins or the optical fiber data bus is completely allocated, and the contention mechanism and the contention mode in the first mode are the same, which is not described herein again.
If the data to be sent needs to be transmitted by a complete time slice, the data to be sent is sent to one pair of uplink and downlink optical fibers by the data transmission module through the T-shaped optical coupler at the beginning of the next time slice, and the subsequent multilevel symbol string is stopped being sent;
if the data to be transmitted in the second data time slot of the next time slice needs to be transmitted by a complete time slice, the data to be transmitted is transmitted to the other pair of idle uplink and downlink optical fibers by the data transmission module through the T-shaped optical coupler at the beginning of the next time slice, and the subsequent multilevel symbol string is stopped being transmitted;
if the data to be sent only needs to be transmitted in one data time slot and the optical fiber data bus time slot comprises three data time slots, the node equipment which becomes a winner in the third arbitration time slot starts to send the data to be sent to the pair of uplink and downlink optical fibers in the third data time slot of the next time slice and stops sending subsequent multi-system symbol strings; if the data to be transmitted only needs to be transmitted in one time slot and one optical fiber data bus time slice only comprises two data time slots, the data to be transmitted is transmitted to another pair of uplink and downlink optical fibers through the T-shaped optical coupler at the first time slot of the next time slice by the data transmission module, and the subsequent multi-system symbol strings are stopped being transmitted; if the data to be transmitted needs a complete time slice to be transmitted and another pair of idle uplink and downlink optical fibers is available, the data to be transmitted is transmitted to the other pair of idle uplink and downlink optical fibers through the T-shaped optical coupler at the beginning of the next time slice by the data transmission module, the subsequent multilevel symbol string is stopped being transmitted, and the like, until all the optical fibers are distributed, the interface control module stops transmitting the subsequent multilevel symbol string until the time slice is finished.
The priority of the multilevel symbol string for the contention data slot is higher than the priority of the multilevel symbol string for the contention data slot, which is embodied in the priority code in the arbitration frame.
The priority of the contention time slot and the time slot is defined, so that in the same time slot, after all the data to be transmitted of the node devices of all the contention time slots are allocated with the transmission optical fiber and the corresponding time slot, the data to be transmitted of the node devices of the contention time slot are allocated with the optical fiber when the system still has the idle optical fiber, and the process only needs to scan the occupation situation of the data line sub-time slots in sequence in a single time slot and select the optical fiber and the time slot to transmit according to the sequence. The above process is suitable for the case that most of the data to be sent of the node device is short data. If the node device sends data longer and has higher requirement on time delay, the priority of a competition time slot or a time slice can not be identified in the multi-system symbol string, the remaining condition of each optical fiber and the data time slot on each upper optical fiber can be monitored in real time in one time slice, and a transmission bus and a transmission time slot occupied by the data to be sent are dynamically adjusted, and the specific implementation mode is as follows:
if the data to be transmitted in the first data time slot of the next time slice needs to be transmitted by a complete time slice, the data to be transmitted in the next time slice is transmitted to one pair of uplink and downlink optical fibers by the T-shaped optical coupler and the subsequent multilevel symbol string is stopped.
If the data to be sent needs a complete time slice to be transmitted, the data to be sent is sent to the other pair of idle uplink and downlink optical fibers by the data transmission module through the T-shaped optical coupler at the beginning of the next time slice, and the subsequent multilevel symbol string is stopped being sent; if the whole time slice of one pair of uplink and downlink optical fibers is occupied, if the data to be sent only needs to be transmitted in one data time slot, the data to be sent is sent to the other pair of uplink and downlink optical fibers through the T-shaped optical coupler by the data transmission module at the first data time slot of the next time slice, and the sending of the subsequent multilevel system symbol string is stopped.
If the first and second time slots of a pair of uplink and downlink optical fibers of the optical fiber data bus are occupied in the third arbitration time slot, if the data to be sent only needs to be transmitted in one data time slot and the optical fiber data bus time slot comprises three data time slots, starting to send the data to be sent to the pair of uplink and downlink optical fibers through the T-shaped optical coupler by the data transmission module in the third data time slot of the next time slice, and stopping sending the subsequent multi-system symbol string, if the data to be transmitted only needs to be transmitted in one time slot and one optical fiber data bus time slice only comprises two data time slots, the data to be transmitted is transmitted to another pair of uplink and downlink optical fibers through the T-shaped optical coupler at the first time slot of the next time slice by the data transmission module, and the subsequent multi-system symbol strings are stopped being transmitted; if the first time slot of a pair of uplink and downlink optical fibers and all the time slots of a second pair of uplink and downlink optical fibers of the optical fiber data bus are occupied, if the data to be sent is only required to be transmitted in one data time slot, the data to be sent is sent to the one pair of uplink and downlink optical fibers through the T-shaped optical coupler by the data transmission module at the second data time slot of the next time slot, and stopping sending the subsequent multi-system symbol string, if the data to be sent needs a complete time slice for transmission and a third pair of idle uplink and downlink optical fibers are available, then sending the data to be sent to the third pair of idle uplink and downlink optical fibers through the T-shaped optical coupler by the data transmission module at the beginning of the next time slice, and stopping sending the subsequent multi-system symbol strings, if no third pair of uplink and downlink optical fibers exist, stopping sending the multi-system symbol strings, and waiting for the next time slice to participate in competition again; if all time slots of a pair of uplink and downlink optical fibers of the optical fiber data bus and a first time slot of a second pair of uplink and downlink optical fibers are occupied, if data to be sent is only required to be transmitted in one data time slot, the data to be sent is started to be sent to the second pair of uplink and downlink optical fibers through a T-shaped optical coupler by a data transmission module in the second data time slot of the next time slice, and stopping sending the subsequent multi-system symbol string, if the data to be sent needs a complete time slice for transmission and a third pair of idle uplink and downlink optical fibers are available, then sending the data to be sent to the third pair of idle uplink and downlink optical fibers through the T-shaped optical coupler by the data transmission module at the beginning of the next time slice, and stopping sending the subsequent multi-system symbol strings, if no third pair of uplink and downlink optical fibers exists, stopping sending the multi-system symbol strings, and waiting for the next time slice to participate in competition again; if all time slots of a pair of uplink and downlink optical fibers of the optical fiber data bus and all time slots of a second pair of uplink and downlink optical fibers are occupied, data transmission is carried out on the third pair of uplink and downlink optical fibers as long as the system has the third pair of idle uplink and downlink optical fibers, no matter the occupied time slot transmission or time slice transmission is carried out, if no third pair of uplink and downlink optical fibers exists, the sending of the binary symbol string is stopped, and the next time slice participates in competition again.
And the data received by the node equipment from the bus is compared with the own equipment identifier according to the destination equipment identifier in the data frame, if the data is consistent with the destination equipment identifier in the data frame, the data is stored in the cache module, and if the data is inconsistent with the destination equipment identifier in the data frame, the data is directly discarded.
In a third mode, as shown in fig. 2, the optical fiber data bus at least includes 2 pairs of uplink and downlink optical fibers, the arbitration bus includes a fast arbitration bus and a slow arbitration bus, and the number of backbone interfaces connected to the data transmission modules of each node, the number of T-type optical couplers, and the number of optical fibers are the same. The lengths of the time slices on the fast arbitration bus and the optical fiber data bus are set to be consistent, the long time slice of the slow arbitration bus is the duration of a plurality of slow arbitration time slots, the slow arbitration time slots are longer than 2 times of the fast arbitration time slots, the number of the fast arbitration time slots and the slow arbitration time slots is not less than the number of the upper optical fiber pairs and the lower optical fiber pairs in the optical fiber data bus, and the duration of the long time slice is usually longer than 2 times of the duration of the time slices.
When the node equipment has data to send, the interface control module repeatedly sends a multilevel symbol string to the fast arbitration bus in each fast arbitration time slot in a time slice, and simultaneously repeatedly sends the multilevel symbol string to the slow arbitration bus in each slow arbitration time slot in a long time slice, the arbitration control module in the interface control module compares the multilevel symbol string with the voltage on the arbitration bus bit by bit, if the priority of the multilevel symbol is higher than the voltage priority on the arbitration bus, the multilevel symbol is output to the arbitration bus, and simultaneously the first arbitration frames respectively received on the fast arbitration bus and the slow arbitration bus in the time slice are detected and compared; if the priority of the multilevel system symbol is lower than the voltage priority on the arbitration bus, stopping sending of a subsequent unsent symbol of the multilevel system symbol string, resending the multilevel system symbol string in the next time slot, and caching the data to be sent when the node equipment does not successfully send the multilevel system symbol string;
if the transmitted multi-system symbol strings in the first arbitration frame respectively received by the fast arbitration bus and the slow arbitration bus in one time slice are completely the same, the slow arbitration bus stops sending the arbitration frame and the fast arbitration bus simultaneously enters the arbitration of the next time slice; the interface control module successfully sends the complete multilevel system symbol string through the fast arbitration bus at the first fast arbitration time slot, sends the data to be sent to a pair of uplink and downlink optical fibers through the data transmission module and the T-shaped optical coupler at the beginning of the next time slice, and sends the data to be sent to the other pair of uplink and downlink optical fibers through the T-shaped optical coupler at the beginning of the next time slice until all the optical fibers are distributed, and then enters the arbitration of the next time slice;
if the multi-system symbol strings which are transmitted in the first arbitration frame detected from the fast arbitration bus and the slow arbitration bus are not identical, the fast arbitration bus stops the transmission of the arbitration frame until the slow arbitration bus completes the arbitration of a long time slice, and enters the arbitration of the next time slice together with the slow arbitration bus; the interface control module successfully sends the complete multilevel system symbol string through the slow arbitration bus in the first slow arbitration time slot, sends the data to be sent to a pair of uplink and downlink optical fibers through the data transmission module and the T-shaped optical coupler at the beginning of the next slow time slice, and successfully sends the complete multilevel system symbol string through the slow arbitration bus in the second slow arbitration time slot, and sends the data to be sent to the other pair of uplink and downlink optical fibers through the data transmission module and the T-shaped optical coupler at the beginning of the next slow time slice until all the optical fibers are distributed, and then the arbitration of the next time slice is started.
And the data received by the node equipment from the bus is compared with the own equipment identifier according to the destination equipment identifier in the data frame, if the data is consistent with the destination equipment identifier in the data frame, the data is stored in the cache module, and if the data is inconsistent with the destination equipment identifier in the data frame, the data is directly discarded.
In the third scheme, the arbitration is performed by using the double arbitration buses, so that the arbitration efficiency is improved, and the accuracy of the arbitration result is ensured.
The bus type networking system for bidirectional optical fiber communication disclosed by the invention has the beneficial effects that: the node equipment hung on the bus adopts the arbitration control module to compete on the arbitration bus for the sequence of data transmission on the optical fiber bus in the next time slice, so that the conflict problem of the multi-point communication shared medium in the optical fiber communication is solved. The arbitration signal of the node equipment is transmitted by an arbitration bus, and the data to be sent of the node equipment is transmitted by an optical fiber data bus. The bus system is divided into an arbitration bus and an optical fiber data bus, so that the arbitration bus and the optical fiber data bus can adopt different rates to transmit data, the arbitration bus and the optical fiber data bus can respectively reach the maximum transmission rate, and the overall data transmission rate is improved. The transmission mechanism of the bus system can be further optimized as follows: 1. the time slices are divided to form a plurality of arbitration time slots, the node equipment which is successfully sent in all the arbitration time slots in one time slice selects a group of data lines in sequence for transmission until all the optical fiber data buses are used up, data transmission on each optical fiber data bus in each time slice is guaranteed, the data transmission efficiency is greatly improved, and data collision is effectively avoided. 2. Dividing time slices to form a data time slot and an arbitration time slot, and defining that the competition time slot is higher than the priority of the competition time slice, or monitoring each optical fiber and the residual condition of the data time slot on each optical fiber in real time in one time slice, and dynamically adjusting a transmission bus and a transmission time slot occupied by data to be sent, so that the utilization rate of each group of linear optical fibers can be ensured to be maximum, and the data transmission efficiency is improved; 3. and a group of arbitration buses is added, and arbitration frames of the two groups of arbitration buses are transmitted according to different rates, so that the accuracy of arbitration results is ensured on the aspect of improving arbitration efficiency.
Drawings
Fig. 1 is a block diagram of a bus-type networking system for bidirectional optical fiber communication according to an embodiment of the present invention.
Fig. 2 is a block diagram of a bidirectional fiber-optic communication bus-based networking system according to an embodiment of the present invention, in which the arbitration buses include a fast arbitration bus and a slow arbitration bus.
Fig. 3 is a schematic circuit diagram of logical wired-OR of a bus-type networking system for bidirectional optical fiber communication according to the present invention.
Fig. 4 is a circuit diagram of an arbitration circuit of a bus-type networking system for bidirectional optical fiber communication according to the present invention.
Detailed Description
The invention will be further elucidated and described with reference to the embodiments and drawings of the specification:
referring to fig. 2, a bus-type networking system based on bidirectional optical fiber communication includes:
the optical fiber data bus at least comprises two pairs of uplink and downlink optical fibers, the arbitration bus comprises a fast arbitration bus and a slow arbitration bus, and the number of the main interfaces connected with the data transmission modules of each node, the number of the T-shaped optical couplers and the number of the optical fibers are consistent. The electricity-based arbitration system utilizes the arbitration control module to carry out numerical value comparison on the multi-system character strings bit by bit to control the output of symbols on the arbitration bus, and simultaneously, the data sending sequence of each node device of the next time slice is specified by detecting the integrity of an arbitration frame, so that the problem of data conflict and delay is effectively avoided, namely, the problem of shared medium conflict in multipoint communication in optical fiber transmission is solved.
In this embodiment, it is specified that the lengths of the time slices on the fast arbitration bus and the optical fiber data bus are the same, the long time slice of the slow arbitration bus is the duration of a plurality of slow arbitration time slots, the slow arbitration time slot is longer than 2 times of the fast arbitration time slot, the numbers of the fast arbitration time slot and the slow arbitration time slot are not less than the numbers of the upper optical fiber group and the lower optical fiber group in the optical fiber data bus, and the duration of the long time slice is usually longer than 2 times of the duration of the time slice.
It is emphasized here that the multilevel symbol string sent to the fast arbitration bus is sent in the fast arbitration slot at a faster rate; the strings of multilevel symbols sent to the slow arbitration bus are sent in the slow arbitration slots at a slower rate.
For convenience of explanation, specific numerical values are exemplified below. For example, one: taking the length of a multi-system symbol string as 10 symbols, the fast arbitration bus rate as 2.5M symbols per second, and the time slot length of the fast arbitration bus as 5 microseconds; the slow arbitration bus rate is 1M symbol per second, and the slow arbitration bus time slot length is 14 microseconds; three groups of uplink and downlink optical fibers, the time slice lasts for 16 microseconds and comprises 3 fast arbitration time slots, and the long time slice lasts for 45 microseconds and comprises 3 slow arbitration time slots.
When the node equipment has data to be sent, at the beginning of an arbitration time slot, an arbitration control module compares the corresponding multi-system symbol string with the voltage of an arbitration bus bit by bit, if the priority of the multi-system symbol is higher than the priority of the arbitration bus voltage, the multi-system symbol is output to the arbitration bus, if the priority of the multi-system symbol is lower than the priority of the sub-arbitration bus voltage, the sending of the rest symbols is stopped, the arbitration control module stops the competition of the rest multi-system symbols in the time slot, the data line competition is carried out in the next arbitration time slot, and when the node equipment does not successfully send the multi-system symbol string, the data to be sent is cached.
Comparing the multilevel symbol string that has been transmitted in the first arbitration frame on the fast arbitration bus and the slow arbitration bus in a time slice, when the transmission of the first arbitration frame on the first slow arbitration bus is finished, 10 symbols last 10 microseconds, which is shorter than the slot length of the slow arbitration bus, 14 microseconds, and shorter than the duration of the time slice, 16 microseconds. The first arbitration frame on the fast arbitration bus ends transmission within 4 microseconds. Thus, during the period of time from 10 microseconds to 16 microseconds, the arbitration circuit can compare 10 multilevel symbol strings of the same content sent on two arbitration buses of different rates.
If the two are completely the same, the multilevel symbol strings successfully transmitted in all the fast arbitration time slots on the fast arbitration bus in the time slice are all considered to be correct. And starting after the next time slice, namely 16 microseconds, sequentially selecting a group of sub optical fiber data buses for transmitting the data to be transmitted of the node equipment until all the optical fiber data buses are distributed, wherein if no double-rate arbitration sensor for distributing the sub optical fiber data buses exists, the data to be transmitted of the node equipment enters the sub-bus competition of the next time slice after the time slice, namely 16 microseconds, is finished.
If the two are not identical, the multilevel symbol string transmitted by the sub-slow arbitration bus is used as a basis for data transmission, and the data to be transmitted of the node equipment corresponding to the multilevel symbol string is sequentially transmitted to a pair of uplink and downlink optical fibers through the data transmission module and the T-shaped optical coupler after the next long time slice, namely 45 microseconds, until all the optical fibers are distributed and no node equipment for distributing the optical fibers exists, the data enters the bus competition of the next time slice after the long time slice, namely 45 microseconds, is finished.
Example two: taking 10 symbols with the length of the multi-system symbol string; the fast arbitration bus rate is 2.5M symbols per second, and the time slot length of the fast arbitration bus is 5 microseconds; the slow arbitration bus rate is 0.5M symbol per second, and the time slot length is 25 microseconds; three groups of uplink and downlink optical fibers, the time slice lasts 18 microseconds and comprises 3 fast arbitration time slots, and the long time slice lasts 90 microseconds and comprises 3 slow arbitration time slots.
At the beginning of an arbitration time slot, an arbitration control module compares the corresponding multi-system symbol string with the voltage of an arbitration bus bit by bit, if the priority of the multi-system symbol is higher than the priority of the arbitration bus voltage, the multi-system symbol is output to the arbitration bus, if the priority of the multi-system symbol is lower than the priority of the arbitration bus voltage, the sending of the rest symbols is stopped, the corresponding arbitration control module waits for the competition of a data line of the next arbitration time slot, and when the node equipment does not successfully send the multi-system symbol string, the data to be sent is cached.
And comparing the transmitted multi-system symbol strings of the first arbitration frame on the fast arbitration bus and the slow arbitration bus in a time slice. When in a time slice, 3 arbitration frames on the fast arbitration bus are transmitted within 15 microseconds, while the slow arbitration bus transmits 7.5 symbols within 15 microseconds, that is, the multilevel symbol string of the first slow arbitration frame has a completion rate of only 75%. Thus, during the period of time between the 15 th microsecond and the 18 th microsecond, the arbitration circuit may compare the strings of multilevel symbols that have completed transmission in the first arbitration frame sent on the two arbitration buses of different rates.
If the two are completely the same, the multilevel symbol strings successfully transmitted in all the fast arbitration time slots on the fast arbitration bus in the time slice are all considered to be correct. And starting after the next time slice, namely 18 microseconds, the data to be transmitted of the node equipment corresponding to the multilevel symbol string is sequentially transmitted to a group of uplink and downlink optical fibers through the data transmission module and the T-shaped optical coupler until all the optical fibers are distributed and no node equipment for distributing the optical fibers exists, and entering the bus competition of the next time slice after the time slice, namely 18 microseconds, ends.
If the two are not identical, the multilevel symbol string transmitted by the slow arbitration bus is used as a basis for data transmission, and the data to be transmitted of the node equipment corresponding to the multilevel symbol string is sequentially transmitted to a group of uplink and downlink optical fibers through a data transmission module and a T-shaped optical coupler after the next long time slice, namely 90 microseconds, until all the optical fibers are distributed and no node equipment for distributing the optical fibers exists, the data enters the bus competition of the next time slice after the current long time slice, namely 90 microseconds finishes.
In order to prevent the cache and the control module of the node device from having overflow risk, the multilevel symbol string of the arbitration frame includes a data volume identifier, the data volume identifier is used for representing the data volume of the data to be sent, and the voltage amplitude of the multilevel symbol with more data to be sent is higher than the voltage amplitude of the multilevel symbol with less data to be sent. And meanwhile, when the node equipment receives data from the optical fiber data bus, the node equipment compares the target equipment identifier in the data frame with the equipment identifier of the node equipment, if the target equipment identifier is consistent with the equipment identifier of the node equipment, the data is stored in the cache module, and if the target equipment identifier is inconsistent with the equipment identifier of the node equipment, the data is directly discarded.
Further, referring to fig. 3, the interface control module of the node device, the bus control module, and the interface control module of the sensor include an arbitration circuit, the arbitration circuit includes a logic wired or circuit, the logic wired or circuit includes a field-effect transistor and a first comparator, a drain of the field-effect transistor serves as an input end of the logic wired or circuit, a gate of the field-effect transistor is connected to an output end of the first comparator, a source of the field-effect transistor serves as an output end of the logic wired or circuit, an inverting input end of the first comparator is connected to a source of the field-effect transistor, and a non-inverting input end of the first comparator is connected to a.
If the voltage of the input end of the logic wired-OR circuit is higher than the voltage of the output end of the logic wired-OR circuit, namely the voltage of the in-phase input end of the first comparator is higher than the voltage of the reverse phase input end of the first comparator, the first comparator outputs high level to drive the field effect tube to be conducted, the conducting voltage of the field effect tube is reduced because the field effect tube is used as a switch, the voltage of the output end of the field effect tube is clamped to be slightly smaller than the voltage of the input end of the field effect tube, the field effect tube is equivalent to the field effect tube, the input multi-system.
The logic wired-OR circuit further comprises an input buffer, and the output end of the input buffer is connected with the input end of the field effect tube.
The logic line or circuit further comprises a clearing circuit, the clearing circuit comprises a pull-down resistor and a switch tube, one end of the pull-down resistor is connected with the logic line or the output end, the other end of the pull-down resistor is connected with the input end of the switch tube, the output end of the switch tube is grounded, the control end of the switch tube is connected with the logic line or circuit input end, and the switch tube is controlled to be switched on when the time slot is finished. The parasitic capacitance exists in the lead in a high-frequency state, which can affect the multilevel symbol output by the logic line or the circuit, and the parasitic capacitance is introduced to the conducting switch tube to eliminate the grounding at the end of the time slot, so that the influence of the parasitic capacitance can be avoided at the beginning of the next time slot, namely the output of the next multilevel symbol. Normally, a field effect transistor is selected as the switching transistor.
Further, the arbitration circuit further comprises an error elimination circuit, an input end of the error elimination circuit is connected with the logic line or the circuit output end, an output end of the error elimination circuit is connected with the logic line or the circuit input end, and the error elimination circuit comprises:
a threshold circuit for providing a plurality of threshold voltages corresponding to the multilevel symbols, the threshold voltages being used to distinguish states of the different voltage amplitudes;
the regenerative circuit comprises a plurality of second comparators corresponding to a threshold voltage and a plurality of divider resistors, wherein the in-phase input end of each second comparator is connected with the arbitration bus, the reverse phase input end of each second comparator is used for inputting different threshold voltages, the output end of each second comparator is connected with one divider resistor in series, the divider resistors are connected in parallel, the second comparators compare the multilevel symbols with the threshold voltages to generate logic levels, all the logic levels are divided by the divider resistors to generate standard voltages corresponding to the multilevel symbols, the standard voltages output by the error elimination circuit are compared with the multilevel symbols output by the logic line or circuit input end equipment, and if the two standard voltages are consistent, the equipment successfully sends the multilevel symbols;
and the zero-gain operational amplifier is used for buffering the standard voltage and outputting the standard voltage.
The arbitration control module compares the multilevel symbol with a voltage on the arbitration bus, has a priority if the voltage value of the multilevel symbol is higher than the voltage on the arbitration bus, and outputs the multilevel symbol to the arbitration bus. The characteristic is called 'OR' function, namely, the function is equivalent to logic 'OR' operation, the output end automatically selects the multilevel symbol with large voltage value for output, and collision detection is not needed. Node equipment which usually participates in arbitration outputs a multilevel symbol string, the multilevel symbol strings are compared bit by bit, multilevel symbols with priorities are output, next-bit multilevel symbols are continuously sent, equipment which completely sends a multilevel symbol string sequence can obtain arbitration priority, and data to be sent is sent to relay equipment.
Referring to fig. 4, in the present invention, the multilevel representation multilevel symbol is used to transmit the arbitration signal, and compared with the binary symbol to transmit the arbitration signal, more information can be transmitted within the same time, thereby greatly improving the arbitration efficiency.
The specific implementation process is as follows:
three node devices are set to participate in priority arbitration.
Correspondingly, the bus control module has 3 sensors connected thereto, and correspondingly has three logic lines or circuits 100 and three error cancellation circuits 200. The output of the logical wired-or circuit 100 is connected to the input of the error cancellation circuit 200, and the output of the error cancellation circuit 200 is connected to the device at the input of the logical wired-or circuit 100.
Since the three error elimination circuits have the same structure, only three logic wired-OR circuits and one error elimination circuit are included in FIG. 3 for convenience of description.
The circuit is explained by a 5V logic system, and the multilevel symbol comprises five states, wherein the level 0 is defined to be lower than 1V, and the standard voltage is 0.5V; the level 1 is between 1.1V and 1.9V, and the standard voltage is 1.5V; the level 2 is between 2.1V and 2.9V, and the standard voltage is 2.5V; the level 3 is between 3.1V and 3.9V, and the standard voltage is 3.5V; the voltage of 4.1V or more is level 4, and the standard voltage thereof is 4.5V. Other voltage values are level transition voltages, requiring the nearest level to be rounded up. When all input ports are not switched in and assume a high impedance state, a level 0 is output by default.
The circuit of this embodiment can be used for arbitration signaling of the penta symbol. Level 0 represents the symbol "0", level 1 represents the symbol "1", and so on.
As can be seen from the above, the multilevel symbol includes four threshold voltages, which are 1V, 2V, 3V and 4V respectively. Correspondingly, the threshold circuit comprises 5 resistors connected in series, each resistor is divided into 1V voltage, and the corresponding threshold voltages are respectively 4V, 3V, 2V and 1V and respectively correspond to nodes 10-13 in FIG. 3.
Correspondingly, the regeneration circuit comprises 4 comparators and 4 divider resistors, wherein the in-phase input end of each comparator is connected with the same multi-system symbol input, the reverse phase input end of each comparator is connected with different threshold voltages, the output end of each comparator is connected with one divider resistor in series, and the divider resistors are connected in parallel. When the voltage of the non-inverting input end of the comparator is higher than that of the inverting input end, the comparator outputs a logic high level, otherwise, the comparator outputs a logic low level. And the logic high level or the logic low level output by all the comparators generates a standard voltage corresponding to the multilevel symbol after being subjected to voltage division by the voltage division resistors.
It can be known from the circuit of the embodiment that, if deriving the arbitration signal transmission circuit with other multilevel symbols, only the number of the threshold voltages needs to be changed, and the corresponding number change is performed on the comparators and the divider resistors.
In this embodiment, for convenience of understanding, the high level and the low level output by the comparator are 4.5V and 0.5V, and the resistance values of the voltage dividing resistors connected in series with the output end of the comparator are all equal to each other, so that the resistance value is R. It should be noted that, in practice, the high level amplitude, the low level amplitude and the resistance of the divider resistor output by the comparator can be calculated according to the required result.
Assume that node 1 inputs level 3, the reference voltage is 3.5V, node 2 inputs level 2, the reference voltage is 2.5V, and node 3 inputs level 1, and the reference voltage is 1.5V.
From the above analysis, the node 4 is a high level output, and the output voltage of the node 5 is slightly less than 3.5V. I.e. output level 3.
Since 3.5V is only less than the threshold voltage of 4V, node 6 outputs 0.5V low and nodes 7, 8 and 9 all output 4.5V high. The voltage of the output out at this time is:
Figure BDA0002451607280000141
exactly the standard voltage for level 3. The interface control module compares the standard voltage output by the error elimination circuit with the input level, finally judges that the standard voltage is consistent with the input level of the node 1, and the node equipment connected with the node 1 obtains arbitration priority.
Assuming that the first bit level is inputted, the node 1 is inputted with the level 2, the standard voltage is 2.5V, the node 2 is inputted with the level 2, the standard voltage is 2.5V, the node 3 is inputted with the level 1, and the standard voltage is 1.5V. Assume that the level is disturbed during transmission and becomes 2.7V at node 1, 2.2V at node 2 and 1.3V at node 1.
From the above analysis, it can be seen that the node 4 is a high output, and the output voltage of the node 5 is slightly lower than 2.7V. Since 2.7V is higher than 2V and less than 3V, nodes 9 and 8 output 4.5V high, and nodes 6 and 7 both output 0.5V low.
The voltage of the output out at this time is:
Figure BDA0002451607280000151
exactly the standard voltage for level 2.
When the second bit level is input, the node 1 inputs the level 4, the standard voltage is 4.5V, the node 2 inputs the level 2, the standard voltage is 2.5V, the node 3 inputs the level 3, and the standard voltage is 3.5V. From the above analysis, the node 4 is a high level output, and the output voltage of the node 5 is slightly less than 4.5V. Assuming interference during transmission, 4.5V becomes 4.8V.
Since 4.8V is higher than all threshold voltages, nodes 9, 8, 7 and 6 all output a high level of 4.5V. The voltage of the output out at this time is 4.5V, which is exactly the standard voltage corresponding to level 4. The standard voltage output by the error elimination circuit is compared with the input level of the logic line or the input end device, when the first bit level comparison is carried out, the node 1 and the node 2 are consistent with the input level, the second bit level comparison is continued, only the node 1 is consistent with the input level, finally, the level consistent with the input level of the node 1 is judged, and the device connected with the node 1 obtains arbitration priority.
According to the above, the logic line or circuit can select the multilevel symbol with the highest output voltage value, the multilevel symbol generates a plurality of logic levels after passing through the regeneration circuit, and the plurality of logic levels generate the standard voltage corresponding to the multilevel symbol through the divider resistor, namely the multilevel symbol, so that the accuracy of the logic judgment of the digital circuit is ensured, and meanwhile, the on-state voltage of the logic line or circuit is reduced, and more levels in different states can be divided under the same voltage amplitude. The multi-system symbol is compared with the threshold voltage to generate a logic level, and the transmission noise and the error of the multi-system symbol are eliminated firstly. Further, since the multilevel symbol string is compared with the threshold voltage, the generated logic level carries the information and characteristics of the multilevel symbol, and the logic level is converted into the standard voltage corresponding to the multilevel symbol according to the information and characteristics. As can be seen from the conventional knowledge, the more levels are divided within the same voltage amplitude, the smaller the voltage difference between the levels of the adjacent states is, which easily causes the logic judgment of the digital circuit to be misplaced. The circuit uses multilevel to represent the multilevel symbol, and simultaneously eliminates the transmission error of the multilevel symbol through the error regeneration circuit, thereby improving the accuracy of the judgment of the state of the multilevel symbol.
Finally, it should be noted that the above embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the protection scope of the present invention, although the present invention is described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that modifications or equivalent substitutions can be made on the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention.

Claims (8)

1. A bus-type networking system for bidirectional optical fiber communication is characterized by comprising an electricity-based arbitration system and an optical fiber-based transmission system, the electricity-based arbitration system comprises an electricity-based arbitration bus, a trunk interface and an arbitration control module of a node device, the transmission system based on the optical fiber comprises a plurality of groups of optical fiber data buses based on the optical fiber, a trunk interface, a T-shaped optical coupler, a data transmission module of node equipment and a cache and control module of the node equipment, the arbitration control module of the node equipment and the data transmission module of the node equipment are simultaneously connected with the cache and control module of the node equipment, the arbitration control module of the node equipment is connected with an arbitration bus through a trunk interface, and the data transmission module of the node equipment couples the node equipment to an optical fiber data bus through the trunk interface and a T-shaped optical coupler;
the electricity-based arbitration system arbitrates the sequence of data transmission of each node device of the next time slice in the optical fiber data bus on the arbitration bus through the arbitration control module, wherein the time slice is the duration time required by the optical fiber data bus for transmitting a data frame;
the transmission system based on the optical fiber converts data to be sent in the cache and control of the node equipment into optical signals in sequence according to the arbitration result through the data transmission module for data transmission on the optical fiber data bus.
2. A bus-type networking system for two-way fiber optic communications according to claim 1, wherein the data frame structure comprises: a target device identifier for identifying a node device that is to receive data; a source device identifier for identifying a node device to which data is to be transmitted; a data length for specifying a length of valid data; data indicating contents to be transmitted by the valid data;
the arbitration bus comprises a pair of copper twisted pairs, and a multilevel symbol string is transmitted in an arbitration time slot of the time slice through an arbitration frame, the arbitration time slot is the duration required by the arbitration bus to transmit one arbitration frame, the multilevel symbol is represented by multilevel, the multilevel comprises different voltage amplitude states separated by a plurality of thresholds, and the higher the voltage amplitude is, the higher the priority is; the arbitration frame structure comprises: the priority code is used for representing the priority of the node equipment of the data to be sent; a source device identifier for identifying a node device to send data.
3. The bus-type networking system for bidirectional optical fiber communication according to claim 2, wherein the multilevel symbol string of the arbitration frame includes a data volume identifier, the data volume identifier is used to indicate a data volume of data to be transmitted, a voltage amplitude of the multilevel symbol with more data to be transmitted is higher than a voltage amplitude of the multilevel symbol with less data to be transmitted, and the data to be transmitted is buffered when the node device fails to transmit the multilevel symbol string.
4. A bidirectional optical fiber communication bus-type networking system as claimed in claim 3, wherein the data transmission module comprises an identification module, the identification module stores the arriving data in the local cache and control module only when detecting the identification information matching with the node device from the data received from the optical fiber data bus, and directly discards the data received from the optical fiber data bus when not detecting the identification information matching with the node device.
5. The bus-based networking system of claim 4, wherein the arbitration buses comprise a fast arbitration bus and a slow arbitration bus, and the arbitration efficiency and the data transmission rate are dynamically adjusted according to the correctness of the two arbitration buses completing the transmission of the multilevel symbol string in the first arbitration slot of the time slice.
6. The bus-type networking system for bidirectional optical fiber communication according to claim 4, wherein the arbitration control module comprises an arbitration circuit, the arbitration circuit comprises a logic wired-OR circuit, the logic wired-OR circuit comprises a FET and a first comparator, the FET drain serves as the logic wired-OR circuit input terminal, the FET gate is connected to the first comparator output terminal, the FET source serves as the logic wired-OR circuit output terminal, the inverting input terminal of the first comparator is connected to the FET source, the non-inverting input terminal of the first comparator is connected to the FET drain, if the FET drain voltage is higher than the FET source voltage, the first comparator outputs a high level to drive the FET to be turned on, and the FET outputs an input multilevel symbol, otherwise, the first comparator outputs low level, and the field effect tube is cut off.
7. A bus-type networking system for bidirectional fiber optic communications as recited in claim 6, wherein the arbitration circuit further comprises an error cancellation circuit having an input coupled to the logical-or circuit output and an output coupled to a device at the logical-or circuit input, the error cancellation circuit comprising:
a threshold circuit for providing a plurality of threshold voltages corresponding to the multilevel symbols, the threshold voltages being used to distinguish the different voltage amplitude states;
the regenerative circuit comprises a plurality of second comparators corresponding to the threshold voltage and a plurality of divider resistors, wherein the in-phase input end of each second comparator is connected with the logic line or the output end of the logic line, the reverse phase input end of each second comparator is used for inputting different threshold voltages, the output end of each second comparator is connected with one divider resistor in series, the divider resistors are connected in parallel, the second comparators compare the multilevel symbols with the threshold voltages to generate logic levels, and all the logic levels are divided by the divider resistors to generate standard voltages corresponding to the multilevel symbols;
the equipment compares the standard voltage output by the error elimination circuit with the multilevel symbol output by the error elimination circuit, and if the standard voltage and the multilevel symbol are consistent, the equipment successfully sends the multilevel symbol.
8. The bus-type networking system for bidirectional optical fiber communication according to claim 6, wherein the logic wired-OR circuit further comprises a clearing circuit, the clearing circuit comprises a pull-down resistor and a switch tube, one end of the pull-down resistor is connected to the logic wired-OR output end, the other end of the pull-down resistor is connected to the input end of the switch tube, the output end of the switch tube is grounded, the control end of the switch tube is connected to a device of the logic wired-OR input end, and the device controls the switch tube to be turned on at the end of a time slot.
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